ARM: gic: Add support to access GIC in secure mode
Currently gic secure mode is enabled for all the v7 cpus.
For 8x25 we do not want to access GIC in secure mode as
we are observe issues of not able to clear the pending clear
registers when we come out of power collapse.
The Kconfig should make it flexible for targets who want to
support GIC in secure/non-secure modes.
Change-Id: Id7c85f5b741346233993966752607e5c4fb23e74
Signed-off-by: Taniya Das <tdas@codeaurora.org>
diff --git a/arch/arm/common/gic.c b/arch/arm/common/gic.c
index bb4d971..4e43cb2 100644
--- a/arch/arm/common/gic.c
+++ b/arch/arm/common/gic.c
@@ -156,7 +156,7 @@
return d->hwirq;
}
-#ifdef CONFIG_CPU_V7
+#if defined(CONFIG_CPU_V7) && defined(CONFIG_GIC_SECURE)
static const inline bool is_cpu_secure(void)
{
unsigned int dscr;