)]}'
{
  "commit": "b2a5c19ca0315723cecb9489ff8b67c4f17367b4",
  "tree": "e218cd12701ef2a180e283b99697a277ab0f70c0",
  "parents": [
    "61407f80f72970d52d4339f81c6c3cd03f4ca0f0"
  ],
  "author": {
    "name": "Matt Carlson",
    "email": "mcarlson@broadcom.com",
    "time": "Thu Apr 03 21:44:44 2008 -0700"
  },
  "committer": {
    "name": "David S. Miller",
    "email": "davem@davemloft.net",
    "time": "Thu Apr 03 21:44:44 2008 -0700"
  },
  "message": "[TG3]: Add PHY workaround for 5784\n\nThe 5784 B step and newer chips require the PHY DSPs to be fine-tuned\nbased on one-time programmable values stored in the chip.  This is\nessential to achieve optimal PHY operations especially when using\nlong cables.  We also need to properly handle the 10Mbit RX bit in the\nCPMU_CTRL register during PHY reset.\n\nUpdate version to 3.89.\n\nSigned-off-by: Matt Carlson \u003cmcarlson@broadcom.com\u003e\nSigned-off-by: Michael Chan \u003cmchan@broadcom.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "f9ef8bd8b11edbbc8c56bd72c5c28e9419f05654",
      "old_mode": 33188,
      "old_path": "drivers/net/tg3.c",
      "new_id": "d4655b2d1f3fd6128d220236c1dd7265d40cebd7",
      "new_mode": 33188,
      "new_path": "drivers/net/tg3.c"
    },
    {
      "type": "modify",
      "old_id": "3938eb35ce8cd479507131b3673ffa5e77dd8d96",
      "old_mode": 33188,
      "old_path": "drivers/net/tg3.h",
      "new_id": "c1075a73d66c08dba2c6132113939a2a23e52f21",
      "new_mode": 33188,
      "new_path": "drivers/net/tg3.h"
    }
  ]
}