OMAP: DSS2: HDMI: change regn definition
regn divider is currently programmed to the registers without change,
but when calculating clock frequencies it is used as regn+1.
To make this similar to how DSI handles the dividers this patch changes
the regn value to be used as such for calculations, but the value
programmed to registers is regn-1.
This simplifies the clock frequency calculations, makes it similar to
DSI, and also allows us to use regn value 0 as undefined.
Cc: Mythri P K <mythripk@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
diff --git a/drivers/video/omap2/dss/hdmi.c b/drivers/video/omap2/dss/hdmi.c
index 52731b5..4752137 100644
--- a/drivers/video/omap2/dss/hdmi.c
+++ b/drivers/video/omap2/dss/hdmi.c
@@ -60,7 +60,7 @@
#define OMAP_HDMI_TIMINGS_NB 34
-#define HDMI_DEFAULT_REGN 15
+#define HDMI_DEFAULT_REGN 16
#define HDMI_DEFAULT_REGM2 1
static struct {
@@ -426,7 +426,7 @@
else
pi->regn = dssdev->clocks.hdmi.regn;
- refclk = clkin / (pi->regn + 1);
+ refclk = clkin / pi->regn;
/*
* multiplier is pixel_clk/ref_clk
@@ -452,7 +452,7 @@
* is greater than 1000MHz
*/
pi->dcofreq = phy > 1000 * 100;
- pi->regsd = ((pi->regm * clkin / 10) / ((pi->regn + 1) * 250) + 5) / 10;
+ pi->regsd = ((pi->regm * clkin / 10) / (pi->regn * 250) + 5) / 10;
/* Set the reference clock to sysclk reference */
pi->refsel = HDMI_REFSEL_SYSCLK;