msm: dcvs: Add thermal interfaces.
The algorithm needs thermal inputs for all the cores. Create members in
the internal core_info strucutre and platform data/device tree to pass
in the sensors they use.
Update the dcvs code to notify the temperature to TZ.
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
(cherry picked from commit fc7dca4c325725492af997fa282e07b9d03154d1)
Signed-off-by: Ram Kumar Chakravarthy Chebathini <rcheba@codeaurora.org>
(cherry picked from commit eb478c5b7b55ea8a57e0336e4cf9979be935b289)
Change-Id: I505903eb8b9779f2065aebfab5b3f2aefc874200
Signed-off-by: Sudhir Sharma <sudsha@codeaurora.org>
diff --git a/drivers/gpu/msm/adreno.c b/drivers/gpu/msm/adreno.c
index 8361430..fb67fc1 100644
--- a/drivers/gpu/msm/adreno.c
+++ b/drivers/gpu/msm/adreno.c
@@ -912,6 +912,19 @@
info->freq_tbl[index].leakage_energy_offset = 0;
}
+ if (adreno_of_read_property(node, "qcom,num-cores", &info->num_cores))
+ goto err;
+
+ info->sensors = kzalloc(info->num_cores *
+ sizeof(int),
+ GFP_KERNEL);
+
+ for (count = 0; count < info->num_cores; count++) {
+ if (adreno_of_read_property(node, "qcom,sensors",
+ &(info->sensors[count])))
+ goto err;
+ }
+
if (adreno_of_read_property(node, "qcom,core-core-type",
&info->core_param.core_type))
goto err;
diff --git a/drivers/gpu/msm/kgsl_pwrscale_msm.c b/drivers/gpu/msm/kgsl_pwrscale_msm.c
index 4b08e52..ae34d22 100644
--- a/drivers/gpu/msm/kgsl_pwrscale_msm.c
+++ b/drivers/gpu/msm/kgsl_pwrscale_msm.c
@@ -149,7 +149,8 @@
low_level = pwr->num_pwrlevels - KGSL_PWRLEVEL_LAST_OFFSET;
for (i = 0; i <= low_level; i++)
tbl[i].freq = pwr->pwrlevels[low_level - i].gpu_freq / 1000;
- ret = msm_dcvs_register_core(device->name, priv->core_info);
+ ret = msm_dcvs_register_core(device->name, priv->core_info,
+ priv->core_info->sensors[0]);
if (ret) {
KGSL_PWR_ERR(device, "msm_dcvs_register_core failed");
goto err;