msm: pm2: Do not program the register which are not needed for 8x25
On 8x25 all the clock halts being taken care by SPM when the cores
execute the 'wfi' instructoin. Hence no need to configure the sleep
registers like how we do for legacy targets.
Change-Id: Ieb9a31af7f01c3c8c3d4731a04a38152326d25aa
Signed-off-by: Murali Nalajala <mnalajal@codeaurora.org>
diff --git a/arch/arm/mach-msm/pm2.c b/arch/arm/mach-msm/pm2.c
index ee78a31..6d8f2a2 100644
--- a/arch/arm/mach-msm/pm2.c
+++ b/arch/arm/mach-msm/pm2.c
@@ -455,30 +455,21 @@
static void msm_pm_config_hw_before_power_down(void)
{
if (cpu_is_msm7x30() || cpu_is_msm8x55()) {
- __raw_writel(1, APPS_PWRDOWN);
- mb();
__raw_writel(4, APPS_SECOP);
- mb();
} else if (cpu_is_msm7x27()) {
__raw_writel(0x1f, APPS_CLK_SLEEP_EN);
- mb();
- __raw_writel(1, APPS_PWRDOWN);
- mb();
} else if (cpu_is_msm7x27a() || cpu_is_msm7x27aa() ||
cpu_is_msm7x25a() || cpu_is_msm7x25aa() ||
cpu_is_msm7x25ab()) {
__raw_writel(0x7, APPS_CLK_SLEEP_EN);
- mb();
- __raw_writel(1, APPS_PWRDOWN);
- mb();
- } else {
+ } else if (cpu_is_qsd8x50()) {
__raw_writel(0x1f, APPS_CLK_SLEEP_EN);
mb();
- __raw_writel(1, APPS_PWRDOWN);
- mb();
__raw_writel(0, APPS_STANDBY_CTL);
- mb();
}
+ mb();
+ __raw_writel(1, APPS_PWRDOWN);
+ mb();
}
/*
@@ -559,13 +550,11 @@
__raw_writel(0, APPS_PWRDOWN);
mb();
msm_spm_reinit();
- } else {
+ } else if (cpu_is_msm8625()) {
__raw_writel(0, APPS_PWRDOWN);
mb();
- __raw_writel(0, APPS_CLK_SLEEP_EN);
- mb();
- if (cpu_is_msm8625() && power_collapsed) {
+ if (power_collapsed) {
/*
* enable the SCU while coming out of power
* collapse.
@@ -576,6 +565,11 @@
*/
configure_top_csr();
}
+ } else {
+ __raw_writel(0, APPS_PWRDOWN);
+ mb();
+ __raw_writel(0, APPS_CLK_SLEEP_EN);
+ mb();
}
}