Revert "msm: timer: Enable ARCH_HAS_READ_CURRENT_TIMER for all MSMs"
This reverts commit ef18f6c9d36e34bee999b8bd3d3961e7d91fcd3e.
Change-Id: Iaf9325e58e40818829c684f35c0221390f18c838
Signed-off-by: Taniya Das <tdas@codeaurora.org>
diff --git a/arch/arm/mach-msm/acpuclock-7x30.c b/arch/arm/mach-msm/acpuclock-7x30.c
index 598b7c5..54d2aa9 100644
--- a/arch/arm/mach-msm/acpuclock-7x30.c
+++ b/arch/arm/mach-msm/acpuclock-7x30.c
@@ -76,6 +76,7 @@
unsigned int vdd_mv;
unsigned int vdd_raw;
struct pll *pll_rate;
+ unsigned long lpj; /* loops_per_jiffy */
};
static struct clock_state drv_state = { 0 };
@@ -258,6 +259,7 @@
/* Perform the frequency switch */
acpuclk_set_src(tgt_s);
drv_state.current_speed = tgt_s;
+ loops_per_jiffy = tgt_s->lpj;
if (tgt_s->src == PLL_2 && strt_s->src == PLL_2)
clk_disable(acpuclk_sources[backup_s->src]);
@@ -390,6 +392,19 @@
return;
}
+/* Initalize the lpj field in the acpu_freq_tbl. */
+static void __init lpj_init(void)
+{
+ int i;
+ const struct clkctl_acpu_speed *base_clk = drv_state.current_speed;
+
+ for (i = 0; acpu_freq_tbl[i].acpu_clk_khz; i++) {
+ acpu_freq_tbl[i].lpj = cpufreq_scale(loops_per_jiffy,
+ base_clk->acpu_clk_khz,
+ acpu_freq_tbl[i].acpu_clk_khz);
+ }
+}
+
#ifdef CONFIG_CPU_FREQ_MSM
static struct cpufreq_frequency_table cpufreq_tbl[ARRAY_SIZE(acpu_freq_tbl)];
@@ -464,6 +479,7 @@
pll2_fixup();
populate_plls();
acpuclk_hw_init();
+ lpj_init();
setup_cpufreq_table();
acpuclk_register(&acpuclk_7x30_data);
diff --git a/arch/arm/mach-msm/include/mach/timex.h b/arch/arm/mach-msm/include/mach/timex.h
index ca7c4c7..61f1996 100644
--- a/arch/arm/mach-msm/include/mach/timex.h
+++ b/arch/arm/mach-msm/include/mach/timex.h
@@ -18,6 +18,8 @@
#define CLOCK_TICK_RATE 1000000
+#ifdef CONFIG_MSM_SMP
#define ARCH_HAS_READ_CURRENT_TIMER
+#endif
#endif
diff --git a/arch/arm/mach-msm/timer.c b/arch/arm/mach-msm/timer.c
index 2dfde6f..0bc080c 100644
--- a/arch/arm/mach-msm/timer.c
+++ b/arch/arm/mach-msm/timer.c
@@ -1123,8 +1123,11 @@
}
msm_sched_clock_init();
- __raw_writel(1, msm_clocks[MSM_CLOCK_DGT].regbase + TIMER_ENABLE);
- set_delay_fn(read_current_timer_delay_loop);
+ if (is_smp()) {
+ __raw_writel(1,
+ msm_clocks[MSM_CLOCK_DGT].regbase + TIMER_ENABLE);
+ set_delay_fn(read_current_timer_delay_loop);
+ }
}
#ifdef CONFIG_SMP