mmc: msm_sdcc: vote for msm bus bandwidth
If there is no voting for the system fabric clock, it may run at the
minimum clock speed. If system fabric is running at lower speed (than what
is needed by SDCC workload), SDCC read & write throughput numbers may be
degraded.
This patch adds the msm bus voting for bandwidth required by SDCC driver
based on card clock speed and bus width.
CRs-Fixed: 355327
Change-Id: I2542a3b9d2b9909d48304d52b3256ec607e433e2
Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
diff --git a/arch/arm/mach-msm/board-8960-storage.c b/arch/arm/mach-msm/board-8960-storage.c
index df1d846..10a6903 100644
--- a/arch/arm/mach-msm/board-8960-storage.c
+++ b/arch/arm/mach-msm/board-8960-storage.c
@@ -17,12 +17,12 @@
#include <linux/bootmem.h>
#include <asm/mach-types.h>
#include <asm/mach/mmc.h>
-#include <mach/msm_bus_board.h>
#include <mach/board.h>
#include <mach/gpio.h>
#include <mach/gpiomux.h>
#include "devices.h"
#include "board-8960.h"
+#include "board-storage-common-a.h"
/* MSM8960 has 5 SDCC controllers */
enum sdcc_controllers {
@@ -299,6 +299,7 @@
.vreg_data = &mmc_slot_vreg_data[SDCC1],
.pin_data = &mmc_slot_pin_data[SDCC1],
.mpm_sdiowakeup_int = MSM_MPM_PIN_SDC1_DAT1,
+ .msm_bus_voting_data = &sps_to_ddr_bus_voting_data,
};
#endif
@@ -316,6 +317,7 @@
.vreg_data = &mmc_slot_vreg_data[SDCC2],
.pin_data = &mmc_slot_pin_data[SDCC2],
.sdiowakeup_irq = MSM_GPIO_TO_INT(90),
+ .msm_bus_voting_data = &sps_to_ddr_bus_voting_data,
};
#endif
@@ -342,6 +344,7 @@
MMC_CAP_UHS_SDR50 | MMC_CAP_UHS_DDR50 |
MMC_CAP_UHS_SDR104 | MMC_CAP_MAX_CURRENT_600),
.mpm_sdiowakeup_int = MSM_MPM_PIN_SDC3_DAT1,
+ .msm_bus_voting_data = &sps_to_ddr_bus_voting_data,
};
#endif
@@ -359,6 +362,7 @@
.vreg_data = &mmc_slot_vreg_data[SDCC4],
.pin_data = &mmc_slot_pin_data[SDCC4],
.sdiowakeup_irq = MSM_GPIO_TO_INT(85),
+ .msm_bus_voting_data = &sps_to_ddr_bus_voting_data,
};
#endif