)]}'
{
  "commit": "c04cb34725fdcf5fdb4135d8fdfaf6f318f10e99",
  "tree": "e4194a9f1a9914a25590dab0ca60285b29c9ac15",
  "parents": [
    "8ed5d97e5e0be0fb1aebad16f4c464613a0e472d"
  ],
  "author": {
    "name": "Michael Chan",
    "email": "mchan@broadcom.com",
    "time": "Mon May 07 00:26:15 2007 -0700"
  },
  "committer": {
    "name": "David S. Miller",
    "email": "davem@davemloft.net",
    "time": "Mon May 07 00:26:15 2007 -0700"
  },
  "message": "[TG3]: Eliminate spurious interrupts.\n\nSpurious interrupts are often encountered especially on systems\nusing the 8259 PIC mode.  This is because the I/O write to deassert\nthe interrupt is posted and won\u0027t get to the chip immediately.  As\na result, the IRQ may remain asserted after the IRQ handler exits,\ncausing spurious interrupts.\n\nFlush the interrupt mailbox in non-MSI handlers to de-assert the\nIRQ immediately.  This seems to be the most straight forward approach\nafter discussion with Jeff Garzik and David Miller.\n\nSigned-off-by: Michael Chan \u003cmchan@broadcom.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "630c8a6c9f738126fe1adc50da079a9cad520491",
      "old_mode": 33188,
      "old_path": "drivers/net/tg3.c",
      "new_id": "6f849bd5a7e7c41c50850fce85a56bd3131c78b4",
      "new_mode": 33188,
      "new_path": "drivers/net/tg3.c"
    }
  ]
}