spi_aic3254 driver
diff --git a/include/linux/spi_aic3254.h b/include/linux/spi_aic3254.h
new file mode 100644
index 0000000..1718770
--- /dev/null
+++ b/include/linux/spi_aic3254.h
@@ -0,0 +1,159 @@
+/* linux/driver/spi/spi_aic3254.h
+ *
+ * Copyright (C) 2009 HTC Corporation.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#ifndef __SPI_AIC3254_H__
+#define __SPI_AIC3254_H__
+
+#include <linux/ioctl.h>
+
+typedef struct _CODEC_SPI_CMD {
+ unsigned char act;
+ unsigned char reg;
+ unsigned char data;
+} CODEC_SPI_CMD;
+
+typedef struct _CODEC_SPI_CMD_PARAM {
+ CODEC_SPI_CMD *data;
+ unsigned int len;
+} CODEC_SPI_CMD_PARAM;
+
+struct AIC3254_PARAM {
+ unsigned int row_num;
+ unsigned int col_num;
+ void *cmd_data;
+};
+
+struct CODEC_CFG {
+ unsigned char tb_idx;
+ unsigned char index;
+};
+
+/* IO CONTROL definition of AIC3254 */
+#define AIC3254_IOCTL_MAGIC 's'
+#define AIC3254_SET_TX_PARAM _IOW(AIC3254_IOCTL_MAGIC, 0x10, unsigned)
+#define AIC3254_SET_RX_PARAM _IOW(AIC3254_IOCTL_MAGIC, 0x11, unsigned)
+#define AIC3254_CONFIG_TX _IOW(AIC3254_IOCTL_MAGIC, 0x12, unsigned int)
+#define AIC3254_CONFIG_RX _IOW(AIC3254_IOCTL_MAGIC, 0x13, unsigned int)
+#define AIC3254_SET_DSP_PARAM _IOW(AIC3254_IOCTL_MAGIC, 0x20, unsigned)
+#define AIC3254_CONFIG_MEDIA _IOW(AIC3254_IOCTL_MAGIC, 0x21, unsigned int)
+#define AIC3254_CONFIG_VOICE _IOW(AIC3254_IOCTL_MAGIC, 0x22, unsigned int)
+#define AIC3254_CONFIG_VOLUME_L _IOW(AIC3254_IOCTL_MAGIC, 0x23, unsigned int)
+#define AIC3254_CONFIG_VOLUME_R _IOW(AIC3254_IOCTL_MAGIC, 0x24, unsigned int)
+#define AIC3254_POWERDOWN _IOW(AIC3254_IOCTL_MAGIC, 0x25, unsigned int)
+#define AIC3254_LOOPBACK _IOW(AIC3254_IOCTL_MAGIC, 0x26, unsigned int)
+#define AIC3254_DUMP_PAGES _IOW(AIC3254_IOCTL_MAGIC, 0x30, unsigned int)
+#define AIC3254_READ_REG _IOWR(AIC3254_IOCTL_MAGIC, 0x31, unsigned)
+#define AIC3254_WRITE_REG _IOW(AIC3254_IOCTL_MAGIC, 0x32, unsigned)
+#define AIC3254_RESET _IOW(AIC3254_IOCTL_MAGIC, 0x33, unsigned int)
+
+#define AIC3254_MAX_PAGES 255
+#define AIC3254_MAX_REGS 128
+#define AIC3254_MAX_RETRY 10
+
+#define IO_CTL_ROW_MAX 64
+#define IO_CTL_COL_MAX 1024
+#define MINIDSP_ROW_MAX 32
+#define MINIDSP_COL_MAX 16384
+
+enum aic3254_uplink_mode {
+ INITIAL = 0,
+ CALL_UPLINK_IMIC_RECEIVER = 1,
+ CALL_UPLINK_EMIC_HEADSET,
+ CALL_UPLINK_IMIC_HEADSET,
+ CALL_UPLINK_IMIC_SPEAKER,
+ CALL_UPLINK_IMIC_RECEIVER_DUALMIC,
+ CALL_UPLINK_EMIC_HEADSET_DUALMIC,
+ CALL_UPLINK_IMIC_SPEAKER_DUALMIC,
+ CALL_UPLINK_IMIC_RECIVER_TESTSIM,
+ CALL_UPLINK_EMIC_HEADSET_TESTSIM,
+ CALL_UPLINK_IMIC_SPEAKER_TESTSIM,
+ VOICERECORD_IMIC = 15,
+ VOICERECORD_EMIC,
+ VIDEORECORD_IMIC,
+ VIDEORECORD_EMIC,
+ VOICERECOGNITION_IMIC,
+ VOICERECOGNITION_EMIC,
+ FM_IN_SPEAKER,
+ FM_IN_HEADSET,
+ TTY_IN_HCO,
+ TTY_IN_VCO,
+ TTY_IN_FULL,
+ UPLINK_OFF = 29,
+ UPLINK_WAKEUP,
+ POWER_OFF,
+ SLEEP_WITH_HP_IN,
+ VOICERECORD_IMIC_PLAYBACK_SPEAKER,
+ VOICERECORD_EMIC_PLAYBACK_HEADSET,
+ VOICERECORD_IMIC_PLAYBACK_HEADSET,
+};
+
+enum aic3254_downlink_mode {
+ CALL_DOWNLINK_IMIC_RECEIVER = 1,
+ CALL_DOWNLINK_EMIC_HEADSET,
+ CALL_DOWNLINK_IMIC_HEADSET,
+ CALL_DOWNLINK_IMIC_SPEAKER,
+ CALL_DOWNLINK_IMIC_RECEIVER_DUALMIC,
+ CALL_DOWNLINK_EMIC_HEADSET_DUALMIC,
+ CALL_DOWNLINK_IMIC_SPEAKER_DUALMIC,
+ CALL_DOWNLINK_IMIC_RECIVER_TESTSIM,
+ CALL_DOWNLINK_EMIC_HEADSET_TESTSIM,
+ CALL_DOWNLINK_IMIC_SPEAKER_TESTSIM,
+ PLAYBACK_RECEIVER,
+ PLAYBACK_HEADSET,
+ PLAYBACK_SPEAKER = 13,
+ RING_HEADSET_SPEAKER,
+ PLAYBACK_SPEAKER_ALT,
+ USB_AUDIO,
+ FM_OUT_SPEAKER = 21,
+ FM_OUT_HEADSET,
+ TTY_OUT_HCO,
+ TTY_OUT_VCO,
+ TTY_OUT_FULL,
+ MUSE,
+ HAC,
+ LPM_IMIC_RECEIVER,
+ DOWNLINK_OFF = 29,
+ DOWNLINK_WAKEUP,
+};
+
+struct aic3254_ctl_ops {
+ void (*tx_amp_enable)(int en);
+ void (*rx_amp_enable)(int en);
+ int (*panel_sleep_in)(void);
+ void (*reset_3254)(void);
+ void (*spibus_enable)(int en);
+ CODEC_SPI_CMD_PARAM *downlink_off;
+ CODEC_SPI_CMD_PARAM *uplink_off;
+ CODEC_SPI_CMD_PARAM *downlink_on;
+ CODEC_SPI_CMD_PARAM *uplink_on;
+ CODEC_SPI_CMD_PARAM *lb_dsp_init;
+ CODEC_SPI_CMD_PARAM *lb_downlink_receiver;
+ CODEC_SPI_CMD_PARAM *lb_downlink_speaker;
+ CODEC_SPI_CMD_PARAM *lb_downlink_headset;
+ CODEC_SPI_CMD_PARAM *lb_uplink_imic;
+ CODEC_SPI_CMD_PARAM *lb_uplink_emic;
+ CODEC_SPI_CMD_PARAM *lb_receiver_imic;
+ CODEC_SPI_CMD_PARAM *lb_speaker_imic;
+ CODEC_SPI_CMD_PARAM *lb_headset_emic;
+ CODEC_SPI_CMD_PARAM *lb_receiver_bmic;
+ CODEC_SPI_CMD_PARAM *lb_speaker_bmic;
+ CODEC_SPI_CMD_PARAM *lb_headset_bmic;
+};
+
+void aic3254_register_ctl_ops(struct aic3254_ctl_ops *ops);
+void aic3254_set_mode(int config, int mode);
+void aic3254_set_mic_bias(int en);
+void aic3254_force_powerdown(void);
+#endif /* __SPI_AIC3254_H__*/
diff --git a/include/linux/spi_aic3254_reg.h b/include/linux/spi_aic3254_reg.h
new file mode 100644
index 0000000..2639b84
--- /dev/null
+++ b/include/linux/spi_aic3254_reg.h
@@ -0,0 +1,314 @@
+/* linux/driver/spi/spi_aic3254_reg.h
+ *
+ * Copyright (C) 2010 HTC Corporation.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#ifndef __SPI_AIC3254_REG_H__
+#define __SPI_AIC3254_REG_H__
+/* The default setting for TI AIC3254 audio codec */
+#if 0
+static CODEC_SPI_CMD CODEC_INIT_REG[] = {
+ /* A00,Initial */
+ {'w', 0x00, 0x01},
+ {'w', 0x01, 0x00},
+ {'w', 0x02, 0x21},
+ {'w', 0x7B, 0x01},
+ {'w', 0x00, 0x00},
+ {'w', 0x06, 0x18},
+ {'w', 0x05, 0x51},
+ {'w', 0x04, 0x03},
+ {'w', 0x05, 0xD1},
+ {'w', 0x0B, 0x83},
+ {'w', 0x0C, 0x85},
+ {'w', 0x12, 0x83},
+ {'w', 0x13, 0x85},
+ {'w', 0x00, 0x01},
+ {'w', 0x0A, 0x3B},
+ {'w', 0x0C, 0x08},
+ {'w', 0x0D, 0x08},
+ {'w', 0x0E, 0x08},
+ {'w', 0x0F, 0x08},
+ {'w', 0x10, 0x00},
+ {'w', 0x11, 0x00},
+ {'w', 0x12, 0x00},
+ {'w', 0x13, 0x00},
+ {'w', 0x00, 0x00},
+ {'w', 0x40, 0x00},
+ {'w', 0x52, 0x00},
+ {'w', 0x1B, 0x00},
+ {'w', 0x1E, 0x00}
+};
+#endif
+
+static CODEC_SPI_CMD Uplink_EMIC[] = {
+ {'w', 0x00, 0x01},
+ {'w', 0x0F, 0x02},
+ {'w', 0x09, 0x0D},
+ {'w', 0x37, 0x08},
+ {'w', 0x39, 0x80},
+ {'w', 0x3B, 0x28},
+ {'w', 0x3C, 0x28},
+ {'w', 0x00, 0x00},
+ {'w', 0x51, 0x40},
+ {'w', 0x53, 0x00},
+ {'w', 0x54, 0x00}
+};
+
+#if 0
+static CODEC_SPI_CMD Uplink_IMIC[] = {
+ /* A01,Call_Uplink_IMIC_Receiver */
+ {'w', 0x00, 0x01},
+ {'w', 0x34, 0x08},
+ {'w', 0x36, 0x80},
+ {'w', 0x3B, 0x28},
+ {'w', 0x3C, 0x28},
+ {'w', 0x00, 0x00},
+ {'w', 0x51, 0x80},
+ {'w', 0x53, 0x00},
+ {'w', 0x54, 0x00}
+};
+
+static CODEC_SPI_CMD Uplink_IMIC_LineOut[] = {
+ /* B02 */
+ {'w', 0x00, 0x01},
+ {'w', 0x0E, 0x02},
+ {'w', 0x09, 0x3F},
+ {'w', 0x12, 0x3E},
+ {'w', 0x13, 0x3E},
+ {'w', 0x00, 0x00},
+ {'w', 0x41, 0x00},
+ {'w', 0x42, 0x00},
+ {'w', 0x3F, 0xF6}
+};
+
+static CODEC_SPI_CMD Uplink_EMIC_LineOut[] = {
+ {'w', 0x00, 0x01},
+ {'w', 0x0E, 0x02},
+ {'w', 0x09, 0x3D},
+ {'w', 0x12, 0x03},
+ {'w', 0x13, 0x3E},
+ {'w', 0x00, 0x00},
+ {'w', 0x41, 0x00},
+ {'w', 0x42, 0x00},
+ {'w', 0x3F, 0xD6}
+};
+#endif
+
+static CODEC_SPI_CMD Downlink_IMIC_Receiver[] = {
+ /* B08 */
+ {'w', 0x00, 0x01},
+ {'w', 0x09, 0x3F},
+ {'w', 0x10, 0x00},
+ {'w', 0x11, 0x00},
+ {'w', 0x0D, 0x10},
+ {'w', 0x00, 0x00},
+ {'w', 0x41, 0x0C},
+ {'w', 0x42, 0x0C},
+ {'w', 0x3F, 0xF6},
+ {'w', 0x40, 0x80},
+};
+
+static CODEC_SPI_CMD CODEC_UPLINK_OFF[] = {
+ /* A29,Uplink_Off */
+ {'w', 0x00, 0x01},
+ {'w', 0x34, 0x00},
+ {'w', 0x36, 0x00},
+ {'w', 0x39, 0x00},
+ {'w', 0x37, 0x00},
+ {'w', 0x3B, 0x80},
+ {'w', 0x3C, 0x80},
+ {'w', 0x00, 0x00},
+ {'w', 0x52, 0x88},
+ {'w', 0x53, 0x00},
+ {'w', 0x54, 0x00},
+ {'w', 0x54, 0x00}
+};
+
+static CODEC_SPI_CMD CODEC_UPLINK_ON[] = {
+ /* A30, Uplink_Wakeup */
+ {'w', 0x00, 0x01},
+ {'w', 0x01, 0x08},
+ {'w', 0x02, 0x21},
+ {'w', 0x3D, 0x00},
+ {'w', 0x47, 0x32},
+ {'w', 0x00, 0x00},
+ {'w', 0x3D, 0x01},
+ {'w', 0x52, 0x00},
+ {'w', 0x05, 0xD1},
+ {'w', 0x12, 0x83},
+ {'w', 0x13, 0x85},
+ {'w', 0x1E, 0x94},
+};
+
+static CODEC_SPI_CMD CODEC_DOWNLINK_OFF[] = {
+ /* B29,Downlink_Off */
+ {'w', 0x00, 0x01},
+ {'w', 0x09, 0x00},
+ {'w', 0x10, 0x40},
+ {'w', 0x11, 0x40},
+ {'w', 0x12, 0x40},
+ {'w', 0x13, 0x40},
+ {'w', 0x00, 0x00},
+ {'w', 0x3F, 0x16},
+ {'w', 0x40, 0x0C},
+ {'w', 0x41, 0x00},
+ {'w', 0x42, 0x00},
+ {'w', 0x40, 0x00},
+ {'w', 0x0B, 0x03},
+ {'w', 0x0C, 0x05},
+};
+
+static CODEC_SPI_CMD CODEC_DOWNLINK_ON[] = {
+ /* B30, Downlink_Wakeup */
+ {'w', 0x00, 0x01},
+ {'w', 0x01, 0x08},
+ {'w', 0x02, 0x21},
+ {'w', 0x14, 0x25},
+ {'w', 0x47, 0x32},
+ {'w', 0x00, 0x00},
+ {'w', 0x3C, 0x08},
+ {'w', 0x40, 0x00},
+ {'w', 0x05, 0xD1},
+ {'w', 0x0B, 0x83},
+ {'w', 0x0C, 0x85},
+ {'w', 0x1E, 0x94}
+};
+
+static CODEC_SPI_CMD CODEC_POWER_OFF[] = {
+ /* A31, Power_Off */
+ {'w', 0x00, 0x00},
+ {'w', 0x1E, 0x14},
+ {'w', 0x0B, 0x03},
+ {'w', 0x0C, 0x05},
+ {'w', 0x12, 0x03},
+ {'w', 0x13, 0x05},
+ {'w', 0x05, 0x51},
+ {'w', 0x51, 0x00},
+ {'w', 0x3F, 0x16},
+ {'w', 0x00, 0x01},
+ {'w', 0x33, 0x00},
+ {'w', 0x01, 0x00},
+ {'w', 0x02, 0x28}
+};
+
+static CODEC_SPI_CMD FM_In_Headphone[] = {
+ /* A22 */
+ {'w', 0x00, 0x01},
+ {'w', 0x0C, 0x02},
+ {'w', 0x0D, 0x02},
+ {'w', 0x09, 0x33},
+ {'w', 0x34, 0x20},
+ {'w', 0x36, 0x80},
+ {'w', 0x37, 0x20},
+ {'w', 0x39, 0x80},
+ {'w', 0x3B, 0x28},
+ {'w', 0x3C, 0x28},
+ {'w', 0x00, 0x00},
+ {'w', 0x51, 0xC0},
+ {'w', 0x53, 0x00},
+ {'w', 0x54, 0x00},
+};
+
+static CODEC_SPI_CMD FM_Out_Headphone[] = {
+ /* B22 */
+ {'w', 0x00, 0x01},
+ {'w', 0x09, 0x33},
+ {'w', 0x10, 0x3E},
+ {'w', 0x11, 0x3E},
+ {'w', 0x00, 0x00},
+ {'w', 0x41, 0x00},
+ {'w', 0x42, 0x00},
+ {'w', 0x3F, 0xD6},
+};
+
+static CODEC_SPI_CMD FM_In_SPK[] = {
+ /* A21 */
+ {'w', 0x00, 0x01},
+ {'w', 0x0C, 0x02},
+ {'w', 0x0D, 0x02},
+ {'w', 0x09, 0x33},
+ {'w', 0x34, 0x20},
+ {'w', 0x36, 0x80},
+ {'w', 0x37, 0x20},
+ {'w', 0x39, 0x80},
+ {'w', 0x3B, 0x28},
+ {'w', 0x3C, 0x28},
+ {'w', 0x00, 0x00},
+ {'w', 0x51, 0xC0},
+ {'w', 0x53, 0x00},
+ {'w', 0x54, 0x00},
+};
+
+static CODEC_SPI_CMD FM_Out_SPK[] = {
+ /* B21 */
+ {'w', 0x00, 0x01},
+ {'w', 0x09, 0x33},
+ {'w', 0x10, 0x00},
+ {'w', 0x11, 0x00},
+ {'w', 0x00, 0x00},
+ {'w', 0x41, 0x00},
+ {'w', 0x42, 0x00},
+ {'w', 0x3F, 0x96},
+ {'w', 0x40, 0x80},
+};
+
+static CODEC_SPI_CMD MECHA_Uplink_IMIC[] = {
+ {'w', 0x00, 0x01},
+ {'w', 0x34, 0x20},
+ {'w', 0x36, 0x20},
+ {'w', 0x37, 0x00},
+ {'w', 0x39, 0x00},
+ {'w', 0x3B, 0x28},
+
+ {'w', 0x3C, 0xA8},
+ {'w', 0x00, 0x00},
+ {'w', 0x51, 0x80},
+ {'w', 0x52, 0x08},
+ {'w', 0x53, 0x00},
+ {'w', 0x54, 0x00},
+ {'w', 0x00, 0x01},
+ {'w', 0x0E, 0x02},
+ {'w', 0x0F, 0x02},
+ {'w', 0x09, 0x3F},
+ {'w', 0x12, 0x3E},
+ {'w', 0x13, 0x3E},
+ {'w', 0x00, 0x00},
+ {'w', 0x40, 0x0C},
+ {'w', 0x41, 0x00},
+ {'w', 0x42, 0x00},
+ {'w', 0x3F, 0xD6},
+};
+
+static CODEC_SPI_CMD CODEC_SET_VOLUME_L[] = {
+ {'w', 0x00, 0x00},
+ {'w', 0x41, 0x00}
+};
+
+static CODEC_SPI_CMD CODEC_SET_VOLUME_R[] = {
+ {'w', 0x00, 0x00},
+ {'w', 0x42, 0x00}
+};
+
+static CODEC_SPI_CMD CODEC_MICBIAS_ON[] = {
+ {'w', 0x00, 0x01},
+ {'w', 0x01, 0x08},
+ {'w', 0x02, 0x21},
+ {'w', 0x33, 0x68}
+};
+
+static CODEC_SPI_CMD CODEC_MICBIAS_OFF[] = {
+ {'w', 0x00, 0x01},
+ {'w', 0x33, 0x28}
+};
+
+#endif /* __SPI_AIC3254_REG_H__*/