msm: acpuclock-8974: Allow SVS voltage when L2 is running at its slowest
Update the placeholder/conservative voltage data to allow vdd_dig to
drop to SVS levels when the L2 is running at its slowest. The values
will be updated again when real data is available.
Change-Id: I483865261354e1f397238cfb165d0389c1fd2102
Signed-off-by: Matt Wagantall <mattw@codeaurora.org>
diff --git a/arch/arm/mach-msm/acpuclock-8974.c b/arch/arm/mach-msm/acpuclock-8974.c
index c67109e..8cf9c2b 100644
--- a/arch/arm/mach-msm/acpuclock-8974.c
+++ b/arch/arm/mach-msm/acpuclock-8974.c
@@ -123,8 +123,8 @@
#define L2(x) (&l2_freq_tbl[(x)])
static struct l2_level l2_freq_tbl[] = {
- [0] = { {STBY_KHZ, QSB, 0, 0, 0 }, LVL_NOM, 1050000, 0 },
- [1] = { { 300000, PLL_0, 0, 2, 0 }, LVL_NOM, 1050000, 2 },
+ [0] = { {STBY_KHZ, QSB, 0, 0, 0 }, LVL_LOW, 1050000, 0 },
+ [1] = { { 300000, PLL_0, 0, 2, 0 }, LVL_LOW, 1050000, 2 },
[2] = { { 384000, HFPLL, 2, 0, 40 }, LVL_NOM, 1050000, 2 },
[3] = { { 460800, HFPLL, 2, 0, 48 }, LVL_NOM, 1050000, 2 },
[4] = { { 537600, HFPLL, 1, 0, 28 }, LVL_NOM, 1050000, 2 },