Perf: Restore counter after powercollapse for generic ARM PMU's
The MSM SoC's which have ARM's CPU's can power collapse. Ensure
the CPU side PMU's correctly restore the counters after coming
out of power collapse.
Change-Id: I544a1dd8ced26f726ba115d14867d9e34c2a7944
Signed-off-by: Ashwin Chaugule <ashwinc@codeaurora.org>
diff --git a/arch/arm/kernel/perf_event_v7.c b/arch/arm/kernel/perf_event_v7.c
index 678c55d..58e9068 100644
--- a/arch/arm/kernel/perf_event_v7.c
+++ b/arch/arm/kernel/perf_event_v7.c
@@ -997,6 +997,7 @@
{
unsigned long flags;
struct pmu_hw_events *events = cpu_pmu->get_hw_events();
+ unsigned long long prev_count = local64_read(&hwc->prev_count);
/*
* Enable counter and interrupt, and set the counter to count
@@ -1022,6 +1023,9 @@
*/
armv7_pmnc_enable_intens(idx);
+ /* Restore prev val */
+ armv7pmu_write_counter(idx, prev_count & 0xffffffff);
+
/*
* Enable counter
*/
diff --git a/arch/arm/mach-msm/perf_debug.c b/arch/arm/mach-msm/perf_debug.c
index 52e58a2..eefe3268 100644
--- a/arch/arm/mach-msm/perf_debug.c
+++ b/arch/arm/mach-msm/perf_debug.c
@@ -23,6 +23,7 @@
*/
static char *descriptions =
"0 msm: perf: add debug patch logging framework\n"
+ "1 Perf: Restore counter after powercollapse for generic ARM PMU's\n"
;
static ssize_t desc_read(struct file *fp, char __user *buf,