msm: adsp: Make pmem adsp as cached.
Make pmem adsp region as cached. This change is required to get
H.264 FWVGA 30fps performance through flash application.
The cahed buffers need to be invalidated before accessing them
and need to be flushed after modification.
Signed-off-by: Mahesh Lanka <mlanka@codeaurora.org>
diff --git a/arch/arm/mach-msm/board-msm7x27a.c b/arch/arm/mach-msm/board-msm7x27a.c
index e4f03f3..8cd55cf 100644
--- a/arch/arm/mach-msm/board-msm7x27a.c
+++ b/arch/arm/mach-msm/board-msm7x27a.c
@@ -1514,7 +1514,7 @@
static struct android_pmem_platform_data android_pmem_adsp_pdata = {
.name = "pmem_adsp",
.allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
- .cached = 0,
+ .cached = 1,
.memory_type = MEMTYPE_EBI1,
};
diff --git a/arch/arm/mach-msm/qdsp5/adsp_video_verify_cmd.c b/arch/arm/mach-msm/qdsp5/adsp_video_verify_cmd.c
index f884a29..b1d2ee8 100644
--- a/arch/arm/mach-msm/qdsp5/adsp_video_verify_cmd.c
+++ b/arch/arm/mach-msm/qdsp5/adsp_video_verify_cmd.c
@@ -23,6 +23,8 @@
#include "adsp.h"
#include <mach/debug_mm.h>
+#define MAX_FLUSH_SIZE 160
+
static inline void *high_low_short_to_ptr(unsigned short high,
unsigned short low)
{
@@ -110,7 +112,18 @@
&filp, &offset))
return -1;
Codec_Id = pkt->codec_selection_word;
-
+ /*Invalidate cache before accessing the cached pmem buffer*/
+ if (filp) {
+ pmem_addr.vaddr = subframe_pkt_addr;
+ pmem_addr.length = (((subframe_pkt_size*2) + 31) & (~31)) + 32;
+ pmem_addr.offset = offset;
+ if (pmem_cache_maint (filp, PMEM_INV_CACHES, &pmem_addr)) {
+ MM_ERR("Cache operation failed for phys addr high %x"
+ " addr low %x\n", pkt->subframe_packet_high,
+ pkt->subframe_packet_low);
+ return -EINVAL;
+ }
+ }
/* deref those ptrs and check if they are a frame header packet */
frame_header_pkt = (unsigned short *)subframe_pkt_addr;
switch (frame_header_pkt[0]) {
@@ -203,11 +216,12 @@
NULL, NULL, NULL, NULL))
return -EINVAL;
}
+ /*Flush the cached pmem subframe packet before sending to DSP*/
if (filp) {
pmem_addr.vaddr = subframe_pkt_addr;
- pmem_addr.length = ((subframe_pkt_size + 31) & (~31)) + 32;
+ pmem_addr.length = MAX_FLUSH_SIZE;
pmem_addr.offset = offset;
- if (pmem_cache_maint (filp, PMEM_CLEAN_CACHES, &pmem_addr)) {
+ if (pmem_cache_maint(filp, PMEM_CLEAN_CACHES, &pmem_addr)) {
MM_ERR("Cache operation failed for phys addr high %x"
" addr low %x\n", pkt->subframe_packet_high,
pkt->subframe_packet_low);