)]}'
{
  "commit": "c6d4267eced79775399f256fbb4adb671e9b597e",
  "tree": "211acc4464342ba2d87365367c3afb4ce509038d",
  "parents": [
    "09a54101e15f43607722dee55f33d1962653c6cb"
  ],
  "author": {
    "name": "Paul Mackerras",
    "email": "paulus@samba.org",
    "time": "Fri Aug 10 14:07:38 2007 +1000"
  },
  "committer": {
    "name": "Paul Mackerras",
    "email": "paulus@samba.org",
    "time": "Fri Aug 17 11:01:55 2007 +1000"
  },
  "message": "[POWERPC] Handle alignment faults on new FP load/store instructions\n\nThis adds code to handle alignment traps generated by the following\nnew floating-point load/store instructions, by emulating the\ninstruction in the kernel (as is done for other instructions that\ngenerate alignment traps):\n\nlfiwax\tload floating-point as integer word algebraic indexed\nstfiwx\tstore floating-point as integer word indexed\nlfdp\tload floating-point double pair\nlfdpx\tload floating-point double pair indexed\nstfdp\tstore floating-point double pair\nstfdpx\tstore floating-point double pair indexed\n\nAll these except stfiwx are new in POWER6.\n\nlfdp/lfdpx/stfdp/stfdpx load and store 16 bytes of memory into an\neven/odd FP register pair.  In little-endian mode each 8-byte value is\nbyte-reversed separately (i.e. not as a 16-byte unit).  lfiwax/stfiwx\nload or store the lower 4 bytes of a floating-point register from/to\nmemory; lfiwax sets the upper 4 bytes of the FP register to the sign\nextension of the value loaded.\n\nSigned-off-by: Paul Mackerras \u003cpaulus@samba.org\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "5c9ff7f5c44ef903822ee04585e1d47789c6282c",
      "old_mode": 33188,
      "old_path": "arch/powerpc/kernel/align.c",
      "new_id": "4c47f9cc0d9acbcadcdf561bb3a015e4ce4fd0e4",
      "new_mode": 33188,
      "new_path": "arch/powerpc/kernel/align.c"
    }
  ]
}