arm: cache-l2x0: Restore the data latency ctrl register after suspend.
Signed-off-by: Maheshkumar Sivasubramanian <msivasub@codeaurora.org>
diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c
index 25a4260..95a7079 100644
--- a/arch/arm/mm/cache-l2x0.c
+++ b/arch/arm/mm/cache-l2x0.c
@@ -28,6 +28,7 @@
static void __iomem *l2x0_base;
static uint32_t aux_ctrl_save;
+static uint32_t data_latency_ctrl;
static DEFINE_SPINLOCK(l2x0_lock);
static uint32_t l2x0_way_mask; /* Bitmask of active ways */
static uint32_t l2x0_size;
@@ -413,6 +414,7 @@
{
/* Save aux control register value */
aux_ctrl_save = readl_relaxed(l2x0_base + L2X0_AUX_CTRL);
+ data_latency_ctrl = readl_relaxed(l2x0_base + L2X0_DATA_LATENCY_CTRL);
/* Flush all cache */
l2x0_flush_all();
/* Disable the cache */
@@ -430,6 +432,8 @@
/* Restore aux control register value */
writel_relaxed(aux_ctrl_save, l2x0_base + L2X0_AUX_CTRL);
+ writel_relaxed(data_latency_ctrl, l2x0_base +
+ L2X0_DATA_LATENCY_CTRL);
/* Invalidate the cache */
l2x0_inv_all();