)]}'
{
  "commit": "c86845ede8b643ca025aec277dec1892d0ccac01",
  "tree": "f8c79ef42af9866f37de9287535f6c801cab8b36",
  "parents": [
    "fda9d86100e0b412d0c8a16abe0651c8c8e39e81"
  ],
  "author": {
    "name": "Anton Blanchard",
    "email": "anton@samba.org",
    "time": "Sun Jan 31 20:33:18 2010 +0000"
  },
  "committer": {
    "name": "Benjamin Herrenschmidt",
    "email": "benh@kernel.crashing.org",
    "time": "Wed Feb 17 14:02:48 2010 +1100"
  },
  "message": "powerpc: Rework /proc/interrupts\n\nOn a large machine I noticed the columns of /proc/interrupts failed to line up\nwith the header after CPU9. At sufficiently large numbers of CPUs it becomes\nimpossible to line up the CPU number with the counts.\n\nWhile fixing this I noticed x86 has a number of updates that we may as well\npull in. On PowerPC we currently omit an interrupt completely if there is no\nactive handler, whereas on x86 it is printed if there is a non zero count.\n\nThe x86 code also spaces the first column correctly based on nr_irqs.\n\nSigned-off-by: Anton Blanchard \u003canton@samba.org\u003e\nSigned-off-by: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "c6ac5583672a7b73f3733cc5f389688ad4985296",
      "old_mode": 33188,
      "old_path": "arch/powerpc/kernel/irq.c",
      "new_id": "b9cbb457004869f84000bd80c72decf0a89e5910",
      "new_mode": 33188,
      "new_path": "arch/powerpc/kernel/irq.c"
    }
  ]
}