msm: board-qrd7627a: Add support for 7627a QRD device
Signed-off-by: Taniya Das <tdas@codeaurora.org>
diff --git a/arch/arm/mach-msm/board-qrd7627a.c b/arch/arm/mach-msm/board-qrd7627a.c
new file mode 100644
index 0000000..b09352c
--- /dev/null
+++ b/arch/arm/mach-msm/board-qrd7627a.c
@@ -0,0 +1,1996 @@
+/* Copyright (c) 2011, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/gpio_event.h>
+#include <linux/usb/android_composite.h>
+#include <linux/platform_device.h>
+#include <linux/io.h>
+#include <linux/gpio.h>
+#include <linux/mtd/nand.h>
+#include <linux/mtd/partitions.h>
+#include <linux/i2c.h>
+#include <linux/android_pmem.h>
+#include <linux/bootmem.h>
+#include <linux/mfd/marimba.h>
+#include <linux/power_supply.h>
+#include <asm/mach/mmc.h>
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+#include <mach/board.h>
+#include <mach/msm_iomap.h>
+#include <mach/msm_hsusb.h>
+#include <mach/rpc_hsusb.h>
+#include <mach/rpc_pmapp.h>
+#include <mach/usbdiag.h>
+#include <mach/usb_gadget_fserial.h>
+#include <mach/msm_memtypes.h>
+#include <mach/msm_serial_hs.h>
+#include <mach/vreg.h>
+#include <mach/pmic.h>
+#include <mach/socinfo.h>
+#include <mach/vreg.h>
+#include <mach/rpc_pmapp.h>
+#include <mach/msm_battery.h>
+#include <mach/rpc_server_handset.h>
+#include <mach/socinfo.h>
+
+#include "devices.h"
+#include "devices-msm7x2xa.h"
+#include "pm.h"
+#include "timer.h"
+
+#define PMEM_KERNEL_EBI1_SIZE 0x3A000
+#define MSM_PMEM_AUDIO_SIZE 0x5B000
+#define BAHAMA_SLAVE_ID_FM_ADDR 0x2A
+#define BAHAMA_SLAVE_ID_QMEMBIST_ADDR 0x7B
+#define BAHAMA_SLAVE_ID_FM_REG 0x02
+#define FM_GPIO 83
+
+enum {
+ GPIO_HOST_VBUS_EN = 107,
+ GPIO_BT_SYS_REST_EN = 114,
+ GPIO_WAKE_ON_WIRELESS,
+ GPIO_BACKLIGHT_EN,
+ GPIO_CAM_3MP_PWDN,
+ GPIO_WLAN_EN,
+ GPIO_CAM_5MP_SHDN_EN,
+ GPIO_CAM_5MP_RESET,
+};
+
+ /* FM Platform power and shutdown routines */
+#define FPGA_MSM_CNTRL_REG2 0x90008010
+
+static void config_pcm_i2s_mode(int mode)
+{
+ void __iomem *cfg_ptr;
+ u8 reg2;
+
+ cfg_ptr = ioremap_nocache(FPGA_MSM_CNTRL_REG2, sizeof(char));
+
+ if (!cfg_ptr)
+ return;
+ if (mode) {
+ /*enable the pcm mode in FPGA*/
+ reg2 = readb_relaxed(cfg_ptr);
+ if (reg2 == 0) {
+ reg2 = 1;
+ writeb_relaxed(reg2, cfg_ptr);
+ }
+ } else {
+ /*enable i2s mode in FPGA*/
+ reg2 = readb_relaxed(cfg_ptr);
+ if (reg2 == 1) {
+ reg2 = 0;
+ writeb_relaxed(reg2, cfg_ptr);
+ }
+ }
+ iounmap(cfg_ptr);
+}
+
+static unsigned fm_i2s_config_power_on[] = {
+ /*FM_I2S_SD*/
+ GPIO_CFG(68, 1, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
+ /*FM_I2S_WS*/
+ GPIO_CFG(70, 1, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
+ /*FM_I2S_SCK*/
+ GPIO_CFG(71, 1, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
+};
+
+static unsigned fm_i2s_config_power_off[] = {
+ /*FM_I2S_SD*/
+ GPIO_CFG(68, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
+ /*FM_I2S_WS*/
+ GPIO_CFG(70, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
+ /*FM_I2S_SCK*/
+ GPIO_CFG(71, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
+};
+
+static unsigned bt_config_power_on[] = {
+ /*RFR*/
+ GPIO_CFG(43, 2, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
+ /*CTS*/
+ GPIO_CFG(44, 2, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
+ /*RX*/
+ GPIO_CFG(45, 2, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
+ /*TX*/
+ GPIO_CFG(46, 2, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
+};
+static unsigned bt_config_pcm_on[] = {
+ /*PCM_DOUT*/
+ GPIO_CFG(68, 1, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
+ /*PCM_DIN*/
+ GPIO_CFG(69, 1, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
+ /*PCM_SYNC*/
+ GPIO_CFG(70, 1, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
+ /*PCM_CLK*/
+ GPIO_CFG(71, 1, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
+};
+static unsigned bt_config_power_off[] = {
+ /*RFR*/
+ GPIO_CFG(43, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
+ /*CTS*/
+ GPIO_CFG(44, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
+ /*RX*/
+ GPIO_CFG(45, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
+ /*TX*/
+ GPIO_CFG(46, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
+};
+static unsigned bt_config_pcm_off[] = {
+ /*PCM_DOUT*/
+ GPIO_CFG(68, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
+ /*PCM_DIN*/
+ GPIO_CFG(69, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
+ /*PCM_SYNC*/
+ GPIO_CFG(70, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
+ /*PCM_CLK*/
+ GPIO_CFG(71, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
+};
+
+
+static int config_i2s(int mode)
+{
+ int pin, rc = 0;
+
+ if (mode == FM_I2S_ON) {
+ if (machine_is_msm7627a_qrd1())
+ config_pcm_i2s_mode(0);
+ pr_err("%s mode = FM_I2S_ON", __func__);
+ for (pin = 0; pin < ARRAY_SIZE(fm_i2s_config_power_on);
+ pin++) {
+ rc = gpio_tlmm_config(
+ fm_i2s_config_power_on[pin],
+ GPIO_CFG_ENABLE
+ );
+ if (rc < 0)
+ return rc;
+ }
+ } else if (mode == FM_I2S_OFF) {
+ pr_err("%s mode = FM_I2S_OFF", __func__);
+ for (pin = 0; pin < ARRAY_SIZE(fm_i2s_config_power_off);
+ pin++) {
+ rc = gpio_tlmm_config(
+ fm_i2s_config_power_off[pin],
+ GPIO_CFG_ENABLE
+ );
+ if (rc < 0)
+ return rc;
+ }
+ }
+ return rc;
+}
+static int config_pcm(int mode)
+{
+ int pin, rc = 0;
+
+ if (mode == BT_PCM_ON) {
+ if (machine_is_msm7627a_qrd1())
+ config_pcm_i2s_mode(1);
+ pr_err("%s mode =BT_PCM_ON", __func__);
+ for (pin = 0; pin < ARRAY_SIZE(bt_config_pcm_on);
+ pin++) {
+ rc = gpio_tlmm_config(bt_config_pcm_on[pin],
+ GPIO_CFG_ENABLE);
+ if (rc < 0)
+ return rc;
+ }
+ } else if (mode == BT_PCM_OFF) {
+ pr_err("%s mode =BT_PCM_OFF", __func__);
+ for (pin = 0; pin < ARRAY_SIZE(bt_config_pcm_off);
+ pin++) {
+ rc = gpio_tlmm_config(bt_config_pcm_off[pin],
+ GPIO_CFG_ENABLE);
+ if (rc < 0)
+ return rc;
+ }
+
+ }
+
+ return rc;
+}
+
+static int msm_bahama_setup_pcm_i2s(int mode)
+{
+ int fm_state = 0, bt_state = 0;
+ int rc = 0;
+ struct marimba config = { .mod_id = SLAVE_ID_BAHAMA};
+
+ fm_state = marimba_get_fm_status(&config);
+ bt_state = marimba_get_bt_status(&config);
+
+ switch (mode) {
+ case BT_PCM_ON:
+ case BT_PCM_OFF:
+ if (!fm_state)
+ rc = config_pcm(mode);
+ break;
+ case FM_I2S_ON:
+ rc = config_i2s(mode);
+ break;
+ case FM_I2S_OFF:
+ if (bt_state)
+ rc = config_pcm(BT_PCM_ON);
+ else
+ rc = config_i2s(mode);
+ break;
+ default:
+ rc = -EIO;
+ pr_err("%s:Unsupported mode", __func__);
+ }
+ return rc;
+}
+
+static int bt_set_gpio(int on)
+{
+ int rc = 0;
+ struct marimba config = { .mod_id = SLAVE_ID_BAHAMA};
+
+ if (on) {
+ rc = gpio_direction_output(GPIO_BT_SYS_REST_EN, 1);
+ msleep(100);
+ } else {
+ if (!marimba_get_fm_status(&config) &&
+ !marimba_get_bt_status(&config)) {
+ gpio_set_value_cansleep(GPIO_BT_SYS_REST_EN, 0);
+ rc = gpio_direction_input(GPIO_BT_SYS_REST_EN);
+ msleep(100);
+ }
+ }
+ if (rc)
+ pr_err("%s: BT sys_reset_en GPIO : Error", __func__);
+
+ return rc;
+}
+static struct vreg *fm_regulator;
+static int fm_radio_setup(struct marimba_fm_platform_data *pdata)
+{
+ int rc = 0;
+ const char *id = "FMPW";
+ uint32_t irqcfg;
+ struct marimba config = { .mod_id = SLAVE_ID_BAHAMA};
+ u8 value;
+
+ /* Voting for 1.8V Regulator */
+ fm_regulator = vreg_get(NULL , "msme1");
+ if (IS_ERR(fm_regulator)) {
+ pr_err("%s: vreg get failed with : (%ld)\n",
+ __func__, PTR_ERR(fm_regulator));
+ return -EINVAL;
+ }
+
+ /* Set the voltage level to 1.8V */
+ rc = vreg_set_level(fm_regulator, 1800);
+ if (rc < 0) {
+ pr_err("%s: set regulator level failed with :(%d)\n",
+ __func__, rc);
+ goto fm_vreg_fail;
+ }
+
+ /* Enabling the 1.8V regulator */
+ rc = vreg_enable(fm_regulator);
+ if (rc) {
+ pr_err("%s: enable regulator failed with :(%d)\n",
+ __func__, rc);
+ goto fm_vreg_fail;
+ }
+
+ /* Voting for 19.2MHz clock */
+ rc = pmapp_clock_vote(id, PMAPP_CLOCK_ID_D1,
+ PMAPP_CLOCK_VOTE_ON);
+ if (rc < 0) {
+ pr_err("%s: clock vote failed with :(%d)\n",
+ __func__, rc);
+ goto fm_clock_vote_fail;
+ }
+
+ rc = bt_set_gpio(1);
+ if (rc) {
+ pr_err("%s: bt_set_gpio = %d", __func__, rc);
+ goto fm_gpio_config_fail;
+ }
+ /*re-write FM Slave Id, after reset*/
+ value = BAHAMA_SLAVE_ID_FM_ADDR;
+ rc = marimba_write_bit_mask(&config,
+ BAHAMA_SLAVE_ID_FM_REG, &value, 1, 0xFF);
+ if (rc < 0) {
+ pr_err("%s: FM Slave ID rewrite Failed = %d", __func__, rc);
+ goto fm_gpio_config_fail;
+ }
+ /* Configuring the FM GPIO */
+ irqcfg = GPIO_CFG(FM_GPIO, 0, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL,
+ GPIO_CFG_2MA);
+
+ rc = gpio_tlmm_config(irqcfg, GPIO_CFG_ENABLE);
+ if (rc) {
+ pr_err("%s: gpio_tlmm_config(%#x)=%d\n",
+ __func__, irqcfg, rc);
+ goto fm_gpio_config_fail;
+ }
+
+ return 0;
+
+fm_gpio_config_fail:
+ pmapp_clock_vote(id, PMAPP_CLOCK_ID_D1,
+ PMAPP_CLOCK_VOTE_OFF);
+ bt_set_gpio(0);
+fm_clock_vote_fail:
+ vreg_disable(fm_regulator);
+
+fm_vreg_fail:
+ vreg_put(fm_regulator);
+
+ return rc;
+};
+
+static void fm_radio_shutdown(struct marimba_fm_platform_data *pdata)
+{
+ int rc;
+ const char *id = "FMPW";
+
+ /* Releasing the GPIO line used by FM */
+ uint32_t irqcfg = GPIO_CFG(FM_GPIO, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_UP,
+ GPIO_CFG_2MA);
+
+ rc = gpio_tlmm_config(irqcfg, GPIO_CFG_ENABLE);
+ if (rc)
+ pr_err("%s: gpio_tlmm_config(%#x)=%d\n",
+ __func__, irqcfg, rc);
+
+ /* Releasing the 1.8V Regulator */
+ if (fm_regulator != NULL) {
+ rc = vreg_disable(fm_regulator);
+ if (rc)
+ pr_err("%s: disable regulator failed:(%d)\n",
+ __func__, rc);
+ fm_regulator = NULL;
+ }
+
+ /* Voting off the clock */
+ rc = pmapp_clock_vote(id, PMAPP_CLOCK_ID_D1,
+ PMAPP_CLOCK_VOTE_OFF);
+ if (rc < 0)
+ pr_err("%s: voting off failed with :(%d)\n",
+ __func__, rc);
+ rc = bt_set_gpio(0);
+ if (rc)
+ pr_err("%s: bt_set_gpio = %d", __func__, rc);
+}
+
+static struct marimba_fm_platform_data marimba_fm_pdata = {
+ .fm_setup = fm_radio_setup,
+ .fm_shutdown = fm_radio_shutdown,
+ .irq = MSM_GPIO_TO_INT(FM_GPIO),
+ .vreg_s2 = NULL,
+ .vreg_xo_out = NULL,
+ /* Configuring the FM SoC as I2S Master */
+ .is_fm_soc_i2s_master = true,
+ .config_i2s_gpio = msm_bahama_setup_pcm_i2s,
+};
+
+static struct platform_device msm_wlan_ar6000_pm_device = {
+ .name = "wlan_ar6000_pm_dev",
+ .id = -1,
+};
+
+#if defined(CONFIG_BT) && defined(CONFIG_MARIMBA_CORE)
+
+static struct platform_device msm_bt_power_device = {
+ .name = "bt_power",
+};
+struct bahama_config_register {
+ u8 reg;
+ u8 value;
+ u8 mask;
+};
+struct bt_vreg_info {
+ const char *name;
+ unsigned int pmapp_id;
+ unsigned int level;
+ unsigned int is_pin_controlled;
+ struct vreg *vregs;
+};
+static struct bt_vreg_info bt_vregs[] = {
+ {"msme1", 2, 1800, 0, NULL},
+ {"bt", 21, 2900, 1, NULL}
+};
+
+static int bahama_bt(int on)
+{
+
+ int rc = 0;
+ int i;
+
+ struct marimba config = { .mod_id = SLAVE_ID_BAHAMA};
+
+ struct bahama_variant_register {
+ const size_t size;
+ const struct bahama_config_register *set;
+ };
+
+ const struct bahama_config_register *p;
+
+ u8 version;
+
+ const struct bahama_config_register v10_bt_on[] = {
+ { 0xE9, 0x00, 0xFF },
+ { 0xF4, 0x80, 0xFF },
+ { 0xE4, 0x00, 0xFF },
+ { 0xE5, 0x00, 0x0F },
+#ifdef CONFIG_WLAN
+ { 0xE6, 0x38, 0x7F },
+ { 0xE7, 0x06, 0xFF },
+#endif
+ { 0xE9, 0x21, 0xFF },
+ { 0x01, 0x0C, 0x1F },
+ { 0x01, 0x08, 0x1F },
+ };
+
+ const struct bahama_config_register v20_bt_on_fm_off[] = {
+ { 0x11, 0x0C, 0xFF },
+ { 0x13, 0x01, 0xFF },
+ { 0xF4, 0x80, 0xFF },
+ { 0xF0, 0x00, 0xFF },
+ { 0xE9, 0x00, 0xFF },
+#ifdef CONFIG_WLAN
+ { 0x81, 0x00, 0x7F },
+ { 0x82, 0x00, 0xFF },
+ { 0xE6, 0x38, 0x7F },
+ { 0xE7, 0x06, 0xFF },
+#endif
+ { 0x8E, 0x15, 0xFF },
+ { 0x8F, 0x15, 0xFF },
+ { 0x90, 0x15, 0xFF },
+
+ { 0xE9, 0x21, 0xFF },
+ };
+
+ const struct bahama_config_register v20_bt_on_fm_on[] = {
+ { 0x11, 0x0C, 0xFF },
+ { 0x13, 0x01, 0xFF },
+ { 0xF4, 0x86, 0xFF },
+ { 0xF0, 0x06, 0xFF },
+ { 0xE9, 0x00, 0xFF },
+#ifdef CONFIG_WLAN
+ { 0x81, 0x00, 0x7F },
+ { 0x82, 0x00, 0xFF },
+ { 0xE6, 0x38, 0x7F },
+ { 0xE7, 0x06, 0xFF },
+#endif
+ { 0xE9, 0x21, 0xFF },
+ };
+
+ const struct bahama_config_register v10_bt_off[] = {
+ { 0xE9, 0x00, 0xFF },
+ };
+
+ const struct bahama_config_register v20_bt_off_fm_off[] = {
+ { 0xF4, 0x84, 0xFF },
+ { 0xF0, 0x04, 0xFF },
+ { 0xE9, 0x00, 0xFF }
+ };
+
+ const struct bahama_config_register v20_bt_off_fm_on[] = {
+ { 0xF4, 0x86, 0xFF },
+ { 0xF0, 0x06, 0xFF },
+ { 0xE9, 0x00, 0xFF }
+ };
+ const struct bahama_variant_register bt_bahama[2][3] = {
+ {
+ { ARRAY_SIZE(v10_bt_off), v10_bt_off },
+ { ARRAY_SIZE(v20_bt_off_fm_off), v20_bt_off_fm_off },
+ { ARRAY_SIZE(v20_bt_off_fm_on), v20_bt_off_fm_on }
+ },
+ {
+ { ARRAY_SIZE(v10_bt_on), v10_bt_on },
+ { ARRAY_SIZE(v20_bt_on_fm_off), v20_bt_on_fm_off },
+ { ARRAY_SIZE(v20_bt_on_fm_on), v20_bt_on_fm_on }
+ }
+ };
+
+ u8 offset = 0; /* index into bahama configs */
+ on = on ? 1 : 0;
+ version = marimba_read_bahama_ver(&config);
+ if ((int)version < 0 || version == BAHAMA_VER_UNSUPPORTED) {
+ dev_err(&msm_bt_power_device.dev, "%s: Bahama \
+ version read Error, version = %d \n",
+ __func__, version);
+ return -EIO;
+ }
+
+ if (version == BAHAMA_VER_2_0) {
+ if (marimba_get_fm_status(&config))
+ offset = 0x01;
+ }
+
+ p = bt_bahama[on][version + offset].set;
+
+ dev_info(&msm_bt_power_device.dev,
+ "%s: found version %d\n", __func__, version);
+
+ for (i = 0; i < bt_bahama[on][version + offset].size; i++) {
+ u8 value = (p+i)->value;
+ rc = marimba_write_bit_mask(&config,
+ (p+i)->reg,
+ &value,
+ sizeof((p+i)->value),
+ (p+i)->mask);
+ if (rc < 0) {
+ dev_err(&msm_bt_power_device.dev,
+ "%s: reg %x write failed: %d\n",
+ __func__, (p+i)->reg, rc);
+ return rc;
+ }
+ dev_dbg(&msm_bt_power_device.dev,
+ "%s: reg 0x%02x write value 0x%02x mask 0x%02x\n",
+ __func__, (p+i)->reg,
+ value, (p+i)->mask);
+ value = 0;
+ rc = marimba_read_bit_mask(&config,
+ (p+i)->reg, &value,
+ sizeof((p+i)->value), (p+i)->mask);
+ if (rc < 0)
+ dev_err(&msm_bt_power_device.dev, "%s marimba_read_bit_mask- error",
+ __func__);
+ dev_dbg(&msm_bt_power_device.dev,
+ "%s: reg 0x%02x read value 0x%02x mask 0x%02x\n",
+ __func__, (p+i)->reg,
+ value, (p+i)->mask);
+ }
+ /* Update BT Status */
+ if (on)
+ marimba_set_bt_status(&config, true);
+ else
+ marimba_set_bt_status(&config, false);
+ return rc;
+}
+static int bluetooth_switch_regulators(int on)
+{
+ int i, rc = 0;
+ const char *id = "BTPW";
+
+ for (i = 0; i < ARRAY_SIZE(bt_vregs); i++) {
+ if (!bt_vregs[i].vregs) {
+ pr_err("%s: vreg_get %s failed(%d)\n",
+ __func__, bt_vregs[i].name, rc);
+ goto vreg_fail;
+ }
+ rc = on ? vreg_set_level(bt_vregs[i].vregs,
+ bt_vregs[i].level) : 0;
+
+ if (rc < 0) {
+ pr_err("%s: vreg set level failed (%d)\n",
+ __func__, rc);
+ goto vreg_set_level_fail;
+ }
+ if (bt_vregs[i].is_pin_controlled == 1) {
+ rc = pmapp_vreg_pincntrl_vote(id,
+ bt_vregs[i].pmapp_id,
+ PMAPP_CLOCK_ID_D1,
+ on ? PMAPP_CLOCK_VOTE_ON :
+ PMAPP_CLOCK_VOTE_OFF);
+ } else {
+ rc = on ? vreg_enable(bt_vregs[i].vregs) :
+ vreg_disable(bt_vregs[i].vregs);
+ }
+
+ if (rc < 0) {
+ pr_err("%s: vreg %s %s failed(%d)\n",
+ __func__, bt_vregs[i].name,
+ on ? "enable" : "disable", rc);
+ goto vreg_fail;
+ }
+ }
+
+ return rc;
+
+vreg_fail:
+ while (i) {
+ if (on)
+ vreg_disable(bt_vregs[--i].vregs);
+ }
+vreg_set_level_fail:
+ vreg_put(bt_vregs[0].vregs);
+ vreg_put(bt_vregs[1].vregs);
+ return rc;
+}
+
+static unsigned int msm_bahama_setup_power(void)
+{
+ int rc = 0;
+ struct vreg *vreg_s3 = NULL;
+
+ vreg_s3 = vreg_get(NULL, "msme1");
+ if (IS_ERR(vreg_s3)) {
+ pr_err("%s: vreg get failed (%ld)\n",
+ __func__, PTR_ERR(vreg_s3));
+ return PTR_ERR(vreg_s3);
+ }
+ rc = vreg_set_level(vreg_s3, 1800);
+ if (rc < 0) {
+ pr_err("%s: vreg set level failed (%d)\n",
+ __func__, rc);
+ goto vreg_fail;
+ }
+ rc = vreg_enable(vreg_s3);
+ if (rc < 0) {
+ pr_err("%s: vreg enable failed (%d)\n",
+ __func__, rc);
+ goto vreg_fail;
+ }
+
+ /*setup Bahama_sys_reset_n*/
+ rc = gpio_request(GPIO_BT_SYS_REST_EN, "bahama sys_rst_n");
+ if (rc < 0) {
+ pr_err("%s: gpio_request %d = %d\n", __func__,
+ GPIO_BT_SYS_REST_EN, rc);
+ goto vreg_fail;
+ }
+ rc = bt_set_gpio(1);
+ if (rc < 0) {
+ pr_err("%s: bt_set_gpio %d = %d\n", __func__,
+ GPIO_BT_SYS_REST_EN, rc);
+ goto gpio_fail;
+ }
+ return rc;
+
+gpio_fail:
+ gpio_free(GPIO_BT_SYS_REST_EN);
+vreg_fail:
+ vreg_put(vreg_s3);
+ return rc;
+}
+
+static unsigned int msm_bahama_shutdown_power(int value)
+{
+ int rc = 0;
+ struct vreg *vreg_s3 = NULL;
+
+ vreg_s3 = vreg_get(NULL, "msme1");
+ if (IS_ERR(vreg_s3)) {
+ pr_err("%s: vreg get failed (%ld)\n",
+ __func__, PTR_ERR(vreg_s3));
+ return PTR_ERR(vreg_s3);
+ }
+ rc = vreg_disable(vreg_s3);
+ if (rc) {
+ pr_err("%s: vreg disable failed (%d)\n",
+ __func__, rc);
+ vreg_put(vreg_s3);
+ return rc;
+ }
+ if (value == BAHAMA_ID) {
+ rc = bt_set_gpio(0);
+ if (rc) {
+ pr_err("%s: bt_set_gpio = %d\n",
+ __func__, rc);
+ }
+ }
+ return rc;
+}
+
+static unsigned int msm_bahama_core_config(int type)
+{
+ int rc = 0;
+
+ if (type == BAHAMA_ID) {
+ int i;
+ struct marimba config = { .mod_id = SLAVE_ID_BAHAMA};
+ const struct bahama_config_register v20_init[] = {
+ /* reg, value, mask */
+ { 0xF4, 0x84, 0xFF }, /* AREG */
+ { 0xF0, 0x04, 0xFF } /* DREG */
+ };
+ if (marimba_read_bahama_ver(&config) == BAHAMA_VER_2_0) {
+ for (i = 0; i < ARRAY_SIZE(v20_init); i++) {
+ u8 value = v20_init[i].value;
+ rc = marimba_write_bit_mask(&config,
+ v20_init[i].reg,
+ &value,
+ sizeof(v20_init[i].value),
+ v20_init[i].mask);
+ if (rc < 0) {
+ pr_err("%s: reg %d write failed: %d\n",
+ __func__, v20_init[i].reg, rc);
+ return rc;
+ }
+ pr_debug("%s: reg 0x%02x value 0x%02x"
+ " mask 0x%02x\n",
+ __func__, v20_init[i].reg,
+ v20_init[i].value, v20_init[i].mask);
+ }
+ }
+ }
+ rc = bt_set_gpio(0);
+ if (rc) {
+ pr_err("%s: bt_set_gpio = %d\n",
+ __func__, rc);
+ }
+ pr_debug("core type: %d\n", type);
+ return rc;
+}
+
+static int bluetooth_power(int on)
+{
+ int pin, rc = 0;
+ const char *id = "BTPW";
+ int cid = 0;
+
+ cid = adie_get_detected_connectivity_type();
+ if (cid != BAHAMA_ID) {
+ pr_err("%s: unexpected adie connectivity type: %d\n",
+ __func__, cid);
+ return -ENODEV;
+ }
+ if (on) {
+ /*setup power for BT SOC*/
+ rc = bt_set_gpio(on);
+ if (rc) {
+ pr_err("%s: bt_set_gpio = %d\n",
+ __func__, rc);
+ goto exit;
+ }
+ rc = bluetooth_switch_regulators(on);
+ if (rc < 0) {
+ pr_err("%s: bluetooth_switch_regulators rc = %d",
+ __func__, rc);
+ goto exit;
+ }
+ /*setup BT GPIO lines*/
+ for (pin = 0; pin < ARRAY_SIZE(bt_config_power_on);
+ pin++) {
+ rc = gpio_tlmm_config(bt_config_power_on[pin],
+ GPIO_CFG_ENABLE);
+ if (rc < 0) {
+ pr_err("%s: gpio_tlmm_config(%#x)=%d\n",
+ __func__,
+ bt_config_power_on[pin],
+ rc);
+ goto fail_power;
+ }
+ }
+ /*Setup BT clocks*/
+ rc = pmapp_clock_vote(id, PMAPP_CLOCK_ID_D1,
+ PMAPP_CLOCK_VOTE_ON);
+ if (rc < 0) {
+ pr_err("Failed to vote for TCXO_D1 ON\n");
+ goto fail_clock;
+ }
+ msleep(20);
+
+ /*I2C config for Bahama*/
+ rc = bahama_bt(1);
+ if (rc < 0) {
+ pr_err("%s: bahama_bt rc = %d", __func__, rc);
+ goto fail_i2c;
+ }
+ msleep(20);
+
+ /*setup BT PCM lines*/
+ rc = msm_bahama_setup_pcm_i2s(BT_PCM_ON);
+ if (rc < 0) {
+ pr_err("%s: msm_bahama_setup_pcm_i2s , rc =%d\n",
+ __func__, rc);
+ goto fail_power;
+ }
+ rc = pmapp_clock_vote(id, PMAPP_CLOCK_ID_D1,
+ PMAPP_CLOCK_VOTE_PIN_CTRL);
+ if (rc < 0)
+ pr_err("%s:Pin Control Failed, rc = %d",
+ __func__, rc);
+
+ } else {
+ rc = bahama_bt(0);
+ if (rc < 0)
+ pr_err("%s: bahama_bt rc = %d", __func__, rc);
+
+ rc = bt_set_gpio(on);
+ if (rc) {
+ pr_err("%s: bt_set_gpio = %d\n",
+ __func__, rc);
+ }
+fail_i2c:
+ rc = pmapp_clock_vote(id, PMAPP_CLOCK_ID_D1,
+ PMAPP_CLOCK_VOTE_OFF);
+ if (rc < 0)
+ pr_err("%s: Failed to vote Off D1\n", __func__);
+fail_clock:
+ for (pin = 0; pin < ARRAY_SIZE(bt_config_power_off);
+ pin++) {
+ rc = gpio_tlmm_config(bt_config_power_off[pin],
+ GPIO_CFG_ENABLE);
+ if (rc < 0) {
+ pr_err("%s: gpio_tlmm_config(%#x)=%d\n",
+ __func__, bt_config_power_off[pin], rc);
+ }
+ }
+ rc = msm_bahama_setup_pcm_i2s(BT_PCM_OFF);
+ if (rc < 0) {
+ pr_err("%s: msm_bahama_setup_pcm_i2s, rc =%d\n",
+ __func__, rc);
+ }
+fail_power:
+ rc = bluetooth_switch_regulators(0);
+ if (rc < 0) {
+ pr_err("%s: switch_regulators : rc = %d",\
+ __func__, rc);
+ goto exit;
+ }
+ }
+ return rc;
+exit:
+ pr_err("%s: failed with rc = %d", __func__, rc);
+ return rc;
+}
+
+static int __init bt_power_init(void)
+{
+ int i, rc = 0;
+ for (i = 0; i < ARRAY_SIZE(bt_vregs); i++) {
+ bt_vregs[i].vregs = vreg_get(NULL,
+ bt_vregs[i].name);
+ if (IS_ERR(bt_vregs[i].vregs)) {
+ pr_err("%s: vreg get %s failed (%ld)\n",
+ __func__, bt_vregs[i].name,
+ PTR_ERR(bt_vregs[i].vregs));
+ rc = PTR_ERR(bt_vregs[i].vregs);
+ goto vreg_get_fail;
+ }
+ }
+
+ msm_bt_power_device.dev.platform_data = &bluetooth_power;
+
+ return rc;
+
+vreg_get_fail:
+ while (i)
+ vreg_put(bt_vregs[--i].vregs);
+ return rc;
+}
+
+static struct marimba_platform_data marimba_pdata = {
+ .slave_id[SLAVE_ID_BAHAMA_FM] = BAHAMA_SLAVE_ID_FM_ADDR,
+ .slave_id[SLAVE_ID_BAHAMA_QMEMBIST] = BAHAMA_SLAVE_ID_QMEMBIST_ADDR,
+ .bahama_setup = msm_bahama_setup_power,
+ .bahama_shutdown = msm_bahama_shutdown_power,
+ .bahama_core_config = msm_bahama_core_config,
+ .fm = &marimba_fm_pdata,
+};
+
+#endif
+
+#if defined(CONFIG_BT) && defined(CONFIG_MARIMBA_CORE)
+static struct i2c_board_info bahama_devices[] = {
+{
+ I2C_BOARD_INFO("marimba", 0xc),
+ .platform_data = &marimba_pdata,
+},
+};
+#endif
+
+static struct msm_gpio qup_i2c_gpios_io[] = {
+ { GPIO_CFG(60, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
+ "qup_scl" },
+ { GPIO_CFG(61, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
+ "qup_sda" },
+ { GPIO_CFG(131, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
+ "qup_scl" },
+ { GPIO_CFG(132, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
+ "qup_sda" },
+};
+
+static struct msm_gpio qup_i2c_gpios_hw[] = {
+ { GPIO_CFG(60, 1, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
+ "qup_scl" },
+ { GPIO_CFG(61, 1, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
+ "qup_sda" },
+ { GPIO_CFG(131, 2, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
+ "qup_scl" },
+ { GPIO_CFG(132, 2, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
+ "qup_sda" },
+};
+
+static void gsbi_qup_i2c_gpio_config(int adap_id, int config_type)
+{
+ int rc;
+
+ if (adap_id < 0 || adap_id > 1)
+ return;
+
+ /* Each adapter gets 2 lines from the table */
+ if (config_type)
+ rc = msm_gpios_request_enable(&qup_i2c_gpios_hw[adap_id*2], 2);
+ else
+ rc = msm_gpios_request_enable(&qup_i2c_gpios_io[adap_id*2], 2);
+ if (rc < 0)
+ pr_err("QUP GPIO request/enable failed: %d\n", rc);
+}
+
+static struct msm_i2c_platform_data msm_gsbi0_qup_i2c_pdata = {
+ .clk_freq = 100000,
+ .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
+};
+
+static struct msm_i2c_platform_data msm_gsbi1_qup_i2c_pdata = {
+ .clk_freq = 100000,
+ .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
+};
+
+#ifdef CONFIG_ARCH_MSM7X27A
+#define MSM_PMEM_MDP_SIZE 0x1DD1000
+#define MSM_PMEM_ADSP_SIZE 0x1000000
+
+#ifdef CONFIG_FB_MSM_TRIPLE_BUFFER
+#define MSM_FB_SIZE 0x260000
+#else
+#define MSM_FB_SIZE 0x195000
+#endif
+
+#endif
+
+static char *usb_functions_default[] = {
+ "diag",
+ "modem",
+ "nmea",
+ "rmnet",
+ "usb_mass_storage",
+};
+
+static char *usb_functions_default_adb[] = {
+ "diag",
+ "adb",
+ "modem",
+ "nmea",
+ "rmnet",
+ "usb_mass_storage",
+};
+
+static char *usb_functions_rndis[] = {
+ "rndis",
+};
+
+static char *usb_functions_rndis_adb[] = {
+ "rndis",
+ "adb",
+};
+
+static char *usb_functions_all[] = {
+#ifdef CONFIG_USB_ANDROID_RNDIS
+ "rndis",
+#endif
+#ifdef CONFIG_USB_ANDROID_DIAG
+ "diag",
+#endif
+ "adb",
+#ifdef CONFIG_USB_F_SERIAL
+ "modem",
+ "nmea",
+#endif
+#ifdef CONFIG_USB_ANDROID_RMNET
+ "rmnet",
+#endif
+ "usb_mass_storage",
+};
+
+static struct android_usb_product usb_products[] = {
+ {
+ .product_id = 0x9026,
+ .num_functions = ARRAY_SIZE(usb_functions_default),
+ .functions = usb_functions_default,
+ },
+ {
+ .product_id = 0x9025,
+ .num_functions = ARRAY_SIZE(usb_functions_default_adb),
+ .functions = usb_functions_default_adb,
+ },
+ {
+ .product_id = 0xf00e,
+ .num_functions = ARRAY_SIZE(usb_functions_rndis),
+ .functions = usb_functions_rndis,
+ },
+ {
+ .product_id = 0x9024,
+ .num_functions = ARRAY_SIZE(usb_functions_rndis_adb),
+ .functions = usb_functions_rndis_adb,
+ },
+};
+
+static struct usb_mass_storage_platform_data mass_storage_pdata = {
+ .nluns = 1,
+ .vendor = "Qualcomm Incorporated",
+ .product = "Mass storage",
+ .release = 0x0100,
+
+};
+
+static struct platform_device usb_mass_storage_device = {
+ .name = "usb_mass_storage",
+ .id = -1,
+ .dev = {
+ .platform_data = &mass_storage_pdata,
+ },
+};
+
+static struct android_usb_platform_data android_usb_pdata = {
+ .vendor_id = 0x05C6,
+ .product_id = 0x9026,
+ .version = 0x0100,
+ .product_name = "Qualcomm HSUSB Device",
+ .manufacturer_name = "Qualcomm Incorporated",
+ .num_products = ARRAY_SIZE(usb_products),
+ .products = usb_products,
+ .num_functions = ARRAY_SIZE(usb_functions_all),
+ .functions = usb_functions_all,
+ .serial_number = "1234567890ABCDEF",
+};
+
+static struct platform_device android_usb_device = {
+ .name = "android_usb",
+ .id = -1,
+ .dev = {
+ .platform_data = &android_usb_pdata,
+ },
+};
+
+static struct usb_ether_platform_data rndis_pdata = {
+ .vendorID = 0x05C6,
+ .vendorDescr = "Qualcomm Incorporated",
+};
+
+static struct platform_device rndis_device = {
+ .name = "rndis",
+ .id = -1,
+ .dev = {
+ .platform_data = &rndis_pdata,
+ },
+};
+
+static int __init board_serialno_setup(char *serialno)
+{
+ int i;
+ char *src = serialno;
+
+ /* create a fake MAC address from our serial number.
+ * first byte is 0x02 to signify locally administered.
+ */
+ rndis_pdata.ethaddr[0] = 0x02;
+ for (i = 0; *src; i++) {
+ /* XOR the USB serial across the remaining bytes */
+ rndis_pdata.ethaddr[i % (ETH_ALEN - 1) + 1] ^= *src++;
+ }
+
+ android_usb_pdata.serial_number = serialno;
+ return 1;
+}
+__setup("androidboot.serialno=", board_serialno_setup);
+
+#ifdef CONFIG_USB_EHCI_MSM_72K
+static void msm_hsusb_vbus_power(unsigned phy_info, int on)
+{
+ int rc = 0;
+ unsigned gpio;
+
+ gpio = GPIO_HOST_VBUS_EN;
+
+ rc = gpio_request(gpio, "i2c_host_vbus_en");
+ if (rc < 0) {
+ pr_err("failed to request %d GPIO\n", gpio);
+ return;
+ }
+ gpio_direction_output(gpio, !!on);
+ gpio_set_value_cansleep(gpio, !!on);
+ gpio_free(gpio);
+}
+
+static struct msm_usb_host_platform_data msm_usb_host_pdata = {
+ .phy_info = (USB_PHY_INTEGRATED | USB_PHY_MODEL_45NM),
+};
+
+static void __init msm7627a_init_host(void)
+{
+ msm_add_host(0, &msm_usb_host_pdata);
+}
+#endif
+
+#ifdef CONFIG_USB_MSM_OTG_72K
+static int hsusb_rpc_connect(int connect)
+{
+ if (connect)
+ return msm_hsusb_rpc_connect();
+ else
+ return msm_hsusb_rpc_close();
+}
+
+static struct vreg *vreg_3p3;
+static int msm_hsusb_ldo_init(int init)
+{
+ if (init) {
+ vreg_3p3 = vreg_get(NULL, "usb");
+ if (IS_ERR(vreg_3p3))
+ return PTR_ERR(vreg_3p3);
+ } else
+ vreg_put(vreg_3p3);
+
+ return 0;
+}
+
+static int msm_hsusb_ldo_enable(int enable)
+{
+ static int ldo_status;
+
+ if (!vreg_3p3 || IS_ERR(vreg_3p3))
+ return -ENODEV;
+
+ if (ldo_status == enable)
+ return 0;
+
+ ldo_status = enable;
+
+ if (enable)
+ return vreg_enable(vreg_3p3);
+
+ return vreg_disable(vreg_3p3);
+}
+
+#ifndef CONFIG_USB_EHCI_MSM_72K
+static int msm_hsusb_pmic_notif_init(void (*callback)(int online), int init)
+{
+ int ret = 0;
+
+ if (init)
+ ret = msm_pm_app_rpc_init(callback);
+ else
+ msm_pm_app_rpc_deinit(callback);
+
+ return ret;
+}
+#endif
+
+static struct msm_otg_platform_data msm_otg_pdata = {
+#ifndef CONFIG_USB_EHCI_MSM_72K
+ .pmic_vbus_notif_init = msm_hsusb_pmic_notif_init,
+#else
+ .vbus_power = msm_hsusb_vbus_power,
+#endif
+ .rpc_connect = hsusb_rpc_connect,
+ .core_clk = 1,
+ .pemp_level = PRE_EMPHASIS_WITH_20_PERCENT,
+ .cdr_autoreset = CDR_AUTO_RESET_DISABLE,
+ .drv_ampl = HS_DRV_AMPLITUDE_DEFAULT,
+ .se1_gating = SE1_GATING_DISABLE,
+ .ldo_init = msm_hsusb_ldo_init,
+ .ldo_enable = msm_hsusb_ldo_enable,
+ .chg_init = hsusb_chg_init,
+ .chg_connected = hsusb_chg_connected,
+ .chg_vbus_draw = hsusb_chg_vbus_draw,
+};
+#endif
+
+static struct msm_hsusb_gadget_platform_data msm_gadget_pdata = {
+ .is_phy_status_timer_on = 1,
+};
+
+#if (defined(CONFIG_MMC_MSM_SDC1_SUPPORT)\
+ || defined(CONFIG_MMC_MSM_SDC2_SUPPORT)\
+ || defined(CONFIG_MMC_MSM_SDC3_SUPPORT)\
+ || defined(CONFIG_MMC_MSM_SDC4_SUPPORT))
+
+static unsigned long vreg_sts, gpio_sts;
+static struct vreg *vreg_mmc;
+static struct vreg *vreg_emmc;
+
+struct sdcc_vreg {
+ struct vreg *vreg_data;
+ unsigned level;
+};
+
+static struct sdcc_vreg sdcc_vreg_data[4];
+
+struct sdcc_gpio {
+ struct msm_gpio *cfg_data;
+ uint32_t size;
+ struct msm_gpio *sleep_cfg_data;
+};
+
+/**
+ * Due to insufficient drive strengths for SDC GPIO lines some old versioned
+ * SD/MMC cards may cause data CRC errors. Hence, set optimal values
+ * for SDC slots based on timing closure and marginality. SDC1 slot
+ * require higher value since it should handle bad signal quality due
+ * to size of T-flash adapters.
+ */
+static struct msm_gpio sdc1_cfg_data[] = {
+ {GPIO_CFG(51, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_14MA),
+ "sdc1_dat_3"},
+ {GPIO_CFG(52, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_14MA),
+ "sdc1_dat_2"},
+ {GPIO_CFG(53, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_14MA),
+ "sdc1_dat_1"},
+ {GPIO_CFG(54, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_14MA),
+ "sdc1_dat_0"},
+ {GPIO_CFG(55, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_14MA),
+ "sdc1_cmd"},
+ {GPIO_CFG(56, 1, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_14MA),
+ "sdc1_clk"},
+};
+
+static struct msm_gpio sdc2_cfg_data[] = {
+ {GPIO_CFG(62, 2, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
+ "sdc2_clk"},
+ {GPIO_CFG(63, 2, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
+ "sdc2_cmd"},
+ {GPIO_CFG(64, 2, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
+ "sdc2_dat_3"},
+ {GPIO_CFG(65, 2, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
+ "sdc2_dat_2"},
+ {GPIO_CFG(66, 2, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
+ "sdc2_dat_1"},
+ {GPIO_CFG(67, 2, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
+ "sdc2_dat_0"},
+};
+
+static struct msm_gpio sdc2_sleep_cfg_data[] = {
+ {GPIO_CFG(62, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
+ "sdc2_clk"},
+ {GPIO_CFG(63, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
+ "sdc2_cmd"},
+ {GPIO_CFG(64, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
+ "sdc2_dat_3"},
+ {GPIO_CFG(65, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
+ "sdc2_dat_2"},
+ {GPIO_CFG(66, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
+ "sdc2_dat_1"},
+ {GPIO_CFG(67, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
+ "sdc2_dat_0"},
+};
+static struct msm_gpio sdc3_cfg_data[] = {
+ {GPIO_CFG(88, 1, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
+ "sdc3_clk"},
+ {GPIO_CFG(89, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
+ "sdc3_cmd"},
+ {GPIO_CFG(90, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
+ "sdc3_dat_3"},
+ {GPIO_CFG(91, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
+ "sdc3_dat_2"},
+ {GPIO_CFG(92, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
+ "sdc3_dat_1"},
+ {GPIO_CFG(93, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
+ "sdc3_dat_0"},
+#ifdef CONFIG_MMC_MSM_SDC3_8_BIT_SUPPORT
+ {GPIO_CFG(19, 3, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
+ "sdc3_dat_7"},
+ {GPIO_CFG(20, 3, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
+ "sdc3_dat_6"},
+ {GPIO_CFG(21, 3, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
+ "sdc3_dat_5"},
+ {GPIO_CFG(108, 3, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
+ "sdc3_dat_4"},
+#endif
+};
+
+static struct msm_gpio sdc4_cfg_data[] = {
+ {GPIO_CFG(19, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
+ "sdc4_dat_3"},
+ {GPIO_CFG(20, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
+ "sdc4_dat_2"},
+ {GPIO_CFG(21, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
+ "sdc4_dat_1"},
+ {GPIO_CFG(107, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
+ "sdc4_cmd"},
+ {GPIO_CFG(108, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
+ "sdc4_dat_0"},
+ {GPIO_CFG(109, 1, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
+ "sdc4_clk"},
+};
+
+static struct sdcc_gpio sdcc_cfg_data[] = {
+ {
+ .cfg_data = sdc1_cfg_data,
+ .size = ARRAY_SIZE(sdc1_cfg_data),
+ },
+ {
+ .cfg_data = sdc2_cfg_data,
+ .size = ARRAY_SIZE(sdc2_cfg_data),
+ .sleep_cfg_data = sdc2_sleep_cfg_data,
+ },
+ {
+ .cfg_data = sdc3_cfg_data,
+ .size = ARRAY_SIZE(sdc3_cfg_data),
+ },
+ {
+ .cfg_data = sdc4_cfg_data,
+ .size = ARRAY_SIZE(sdc4_cfg_data),
+ },
+};
+
+static int msm_sdcc_setup_gpio(int dev_id, unsigned int enable)
+{
+ int rc = 0;
+ struct sdcc_gpio *curr;
+
+ curr = &sdcc_cfg_data[dev_id - 1];
+ if (!(test_bit(dev_id, &gpio_sts)^enable))
+ return rc;
+
+ if (enable) {
+ set_bit(dev_id, &gpio_sts);
+ rc = msm_gpios_request_enable(curr->cfg_data, curr->size);
+ if (rc)
+ pr_err("%s: Failed to turn on GPIOs for slot %d\n",
+ __func__, dev_id);
+ } else {
+ clear_bit(dev_id, &gpio_sts);
+ if (curr->sleep_cfg_data) {
+ rc = msm_gpios_enable(curr->sleep_cfg_data, curr->size);
+ msm_gpios_free(curr->sleep_cfg_data, curr->size);
+ return rc;
+ }
+ msm_gpios_disable_free(curr->cfg_data, curr->size);
+ }
+ return rc;
+}
+
+static int msm_sdcc_setup_vreg(int dev_id, unsigned int enable)
+{
+ int rc = 0;
+ struct sdcc_vreg *curr;
+
+ curr = &sdcc_vreg_data[dev_id - 1];
+
+ if (!(test_bit(dev_id, &vreg_sts)^enable))
+ return rc;
+
+ if (enable) {
+ set_bit(dev_id, &vreg_sts);
+ rc = vreg_set_level(curr->vreg_data, curr->level);
+ if (rc)
+ pr_err("%s: vreg_set_level() = %d\n", __func__, rc);
+
+ rc = vreg_enable(curr->vreg_data);
+ if (rc)
+ pr_err("%s: vreg_enable() = %d\n", __func__, rc);
+ } else {
+ clear_bit(dev_id, &vreg_sts);
+ rc = vreg_disable(curr->vreg_data);
+ if (rc)
+ pr_err("%s: vreg_disable() = %d\n", __func__, rc);
+ }
+ return rc;
+}
+
+static uint32_t msm_sdcc_setup_power(struct device *dv, unsigned int vdd)
+{
+ int rc = 0;
+ struct platform_device *pdev;
+
+ pdev = container_of(dv, struct platform_device, dev);
+
+ rc = msm_sdcc_setup_gpio(pdev->id, !!vdd);
+ if (rc)
+ goto out;
+
+ rc = msm_sdcc_setup_vreg(pdev->id, !!vdd);
+out:
+ return rc;
+}
+
+#define GPIO_SDC1_HW_DET 85
+
+#if defined(CONFIG_MMC_MSM_SDC1_SUPPORT) \
+ && defined(CONFIG_MMC_MSM_CARD_HW_DETECTION)
+static unsigned int msm7627a_sdcc_slot_status(struct device *dev)
+{
+ int status;
+
+ status = gpio_tlmm_config(GPIO_CFG(GPIO_SDC1_HW_DET, 2, GPIO_CFG_INPUT,
+ GPIO_CFG_PULL_UP, GPIO_CFG_8MA), GPIO_CFG_ENABLE);
+ if (status)
+ pr_err("%s:Failed to configure tlmm for GPIO %d\n", __func__,
+ GPIO_SDC1_HW_DET);
+
+ status = gpio_request(GPIO_SDC1_HW_DET, "SD_HW_Detect");
+ if (status) {
+ pr_err("%s:Failed to request GPIO %d\n", __func__,
+ GPIO_SDC1_HW_DET);
+ } else {
+ status = gpio_direction_input(GPIO_SDC1_HW_DET);
+ if (!status)
+ status = gpio_get_value(GPIO_SDC1_HW_DET);
+ gpio_free(GPIO_SDC1_HW_DET);
+ }
+ return status;
+}
+#endif
+
+#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
+static struct mmc_platform_data sdc1_plat_data = {
+ .ocr_mask = MMC_VDD_28_29,
+ .translate_vdd = msm_sdcc_setup_power,
+ .mmc_bus_width = MMC_CAP_4_BIT_DATA,
+ .msmsdcc_fmin = 144000,
+ .msmsdcc_fmid = 24576000,
+ .msmsdcc_fmax = 49152000,
+#ifdef CONFIG_MMC_MSM_CARD_HW_DETECTION
+ .status = msm7627a_sdcc_slot_status,
+ .status_irq = MSM_GPIO_TO_INT(GPIO_SDC1_HW_DET),
+ .irq_flags = IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
+#endif
+};
+#endif
+
+#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
+static struct mmc_platform_data sdc2_plat_data = {
+ /*
+ * SDC2 supports only 1.8V, claim for 2.85V range is just
+ * for allowing buggy cards who advertise 2.8V even though
+ * they can operate at 1.8V supply.
+ */
+ .ocr_mask = MMC_VDD_28_29 | MMC_VDD_165_195,
+ .translate_vdd = msm_sdcc_setup_power,
+ .mmc_bus_width = MMC_CAP_4_BIT_DATA,
+#ifdef CONFIG_MMC_MSM_SDIO_SUPPORT
+ .sdiowakeup_irq = MSM_GPIO_TO_INT(66),
+#endif
+ .msmsdcc_fmin = 144000,
+ .msmsdcc_fmid = 24576000,
+ .msmsdcc_fmax = 49152000,
+#ifdef CONFIG_MMC_MSM_SDC2_DUMMY52_REQUIRED
+ .dummy52_required = 1,
+#endif
+};
+#endif
+
+#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT
+static struct mmc_platform_data sdc3_plat_data = {
+ .ocr_mask = MMC_VDD_28_29,
+ .translate_vdd = msm_sdcc_setup_power,
+#ifdef CONFIG_MMC_MSM_SDC3_8_BIT_SUPPORT
+ .mmc_bus_width = MMC_CAP_8_BIT_DATA,
+#else
+ .mmc_bus_width = MMC_CAP_4_BIT_DATA,
+#endif
+ .msmsdcc_fmin = 144000,
+ .msmsdcc_fmid = 24576000,
+ .msmsdcc_fmax = 49152000,
+ .nonremovable = 1,
+};
+#endif
+
+#if (defined(CONFIG_MMC_MSM_SDC4_SUPPORT)\
+ && !defined(CONFIG_MMC_MSM_SDC3_8_BIT_SUPPORT))
+static struct mmc_platform_data sdc4_plat_data = {
+ .ocr_mask = MMC_VDD_28_29,
+ .translate_vdd = msm_sdcc_setup_power,
+ .mmc_bus_width = MMC_CAP_4_BIT_DATA,
+ .msmsdcc_fmin = 144000,
+ .msmsdcc_fmid = 24576000,
+ .msmsdcc_fmax = 49152000,
+};
+#endif
+#endif
+
+#ifdef CONFIG_SERIAL_MSM_HS
+static struct msm_serial_hs_platform_data msm_uart_dm1_pdata = {
+ .inject_rx_on_wakeup = 1,
+ .rx_to_inject = 0xFD,
+};
+#endif
+static struct msm_pm_platform_data msm7627a_pm_data[MSM_PM_SLEEP_MODE_NR] = {
+ [MSM_PM_SLEEP_MODE_POWER_COLLAPSE] = {
+ .idle_supported = 1,
+ .suspend_supported = 1,
+ .idle_enabled = 1,
+ .suspend_enabled = 1,
+ .latency = 16000,
+ .residency = 20000,
+ },
+ [MSM_PM_SLEEP_MODE_POWER_COLLAPSE_NO_XO_SHUTDOWN] = {
+ .idle_supported = 1,
+ .suspend_supported = 1,
+ .idle_enabled = 1,
+ .suspend_enabled = 1,
+ .latency = 12000,
+ .residency = 20000,
+ },
+ [MSM_PM_SLEEP_MODE_RAMP_DOWN_AND_WAIT_FOR_INTERRUPT] = {
+ .idle_supported = 1,
+ .suspend_supported = 1,
+ .idle_enabled = 0,
+ .suspend_enabled = 1,
+ .latency = 2000,
+ .residency = 0,
+ },
+ [MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT] = {
+ .idle_supported = 1,
+ .suspend_supported = 1,
+ .idle_enabled = 1,
+ .suspend_enabled = 1,
+ .latency = 2,
+ .residency = 0,
+ },
+};
+
+static struct android_pmem_platform_data android_pmem_adsp_pdata = {
+ .name = "pmem_adsp",
+ .allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
+ .cached = 1,
+ .memory_type = MEMTYPE_EBI1,
+};
+
+static struct platform_device android_pmem_adsp_device = {
+ .name = "android_pmem",
+ .id = 1,
+ .dev = { .platform_data = &android_pmem_adsp_pdata },
+};
+
+static unsigned pmem_mdp_size = MSM_PMEM_MDP_SIZE;
+static int __init pmem_mdp_size_setup(char *p)
+{
+ pmem_mdp_size = memparse(p, NULL);
+ return 0;
+}
+
+early_param("pmem_mdp_size", pmem_mdp_size_setup);
+
+static unsigned pmem_adsp_size = MSM_PMEM_ADSP_SIZE;
+static int __init pmem_adsp_size_setup(char *p)
+{
+ pmem_adsp_size = memparse(p, NULL);
+ return 0;
+}
+
+early_param("pmem_adsp_size", pmem_adsp_size_setup);
+
+static unsigned fb_size = MSM_FB_SIZE;
+static int __init fb_size_setup(char *p)
+{
+ fb_size = memparse(p, NULL);
+ return 0;
+}
+
+early_param("fb_size", fb_size_setup);
+
+static void __init msm7627a_init_mmc(void)
+{
+ vreg_emmc = vreg_get(NULL, "emmc");
+ if (IS_ERR(vreg_emmc)) {
+ pr_err("%s: vreg get failed (%ld)\n",
+ __func__, PTR_ERR(vreg_emmc));
+ return;
+ }
+
+ vreg_mmc = vreg_get(NULL, "mmc");
+ if (IS_ERR(vreg_mmc)) {
+ pr_err("%s: vreg get failed (%ld)\n",
+ __func__, PTR_ERR(vreg_mmc));
+ return;
+ }
+
+ /* eMMC slot */
+#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT
+ sdcc_vreg_data[2].vreg_data = vreg_emmc;
+ sdcc_vreg_data[2].level = 3000;
+ msm_add_sdcc(3, &sdc3_plat_data);
+#endif
+ /* Micro-SD slot */
+#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
+ sdcc_vreg_data[0].vreg_data = vreg_mmc;
+ sdcc_vreg_data[0].level = 2850;
+ msm_add_sdcc(1, &sdc1_plat_data);
+#endif
+ /* SDIO WLAN slot */
+#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
+ sdcc_vreg_data[1].vreg_data = vreg_mmc;
+ sdcc_vreg_data[1].level = 2850;
+ msm_add_sdcc(2, &sdc2_plat_data);
+#endif
+ /* Not Used */
+#if (defined(CONFIG_MMC_MSM_SDC4_SUPPORT)\
+ && !defined(CONFIG_MMC_MSM_SDC3_8_BIT_SUPPORT))
+ sdcc_vreg_data[3].vreg_data = vreg_mmc;
+ sdcc_vreg_data[3].level = 2850;
+ msm_add_sdcc(4, &sdc4_plat_data);
+#endif
+}
+
+#define SND(desc, num) { .name = #desc, .id = num }
+static struct snd_endpoint snd_endpoints_list[] = {
+ SND(HANDSET, 0),
+ SND(MONO_HEADSET, 2),
+ SND(HEADSET, 3),
+ SND(SPEAKER, 6),
+ SND(TTY_HEADSET, 8),
+ SND(TTY_VCO, 9),
+ SND(TTY_HCO, 10),
+ SND(BT, 12),
+ SND(IN_S_SADC_OUT_HANDSET, 16),
+ SND(IN_S_SADC_OUT_SPEAKER_PHONE, 25),
+ SND(FM_DIGITAL_STEREO_HEADSET, 26),
+ SND(FM_DIGITAL_SPEAKER_PHONE, 27),
+ SND(FM_DIGITAL_BT_A2DP_HEADSET, 28),
+ SND(CURRENT, 34),
+ SND(FM_ANALOG_STEREO_HEADSET, 35),
+ SND(FM_ANALOG_STEREO_HEADSET_CODEC, 36),
+};
+#undef SND
+
+static struct msm_snd_endpoints msm_device_snd_endpoints = {
+ .endpoints = snd_endpoints_list,
+ .num = sizeof(snd_endpoints_list) / sizeof(struct snd_endpoint)
+};
+
+static struct platform_device msm_device_snd = {
+ .name = "msm_snd",
+ .id = -1,
+ .dev = {
+ .platform_data = &msm_device_snd_endpoints
+ },
+};
+
+#define DEC0_FORMAT ((1<<MSM_ADSP_CODEC_MP3)| \
+ (1<<MSM_ADSP_CODEC_AAC)|(1<<MSM_ADSP_CODEC_WMA)| \
+ (1<<MSM_ADSP_CODEC_WMAPRO)|(1<<MSM_ADSP_CODEC_AMRWB)| \
+ (1<<MSM_ADSP_CODEC_AMRNB)|(1<<MSM_ADSP_CODEC_WAV)| \
+ (1<<MSM_ADSP_CODEC_ADPCM)|(1<<MSM_ADSP_CODEC_YADPCM)| \
+ (1<<MSM_ADSP_CODEC_EVRC)|(1<<MSM_ADSP_CODEC_QCELP))
+#define DEC1_FORMAT ((1<<MSM_ADSP_CODEC_MP3)| \
+ (1<<MSM_ADSP_CODEC_AAC)|(1<<MSM_ADSP_CODEC_WMA)| \
+ (1<<MSM_ADSP_CODEC_WMAPRO)|(1<<MSM_ADSP_CODEC_AMRWB)| \
+ (1<<MSM_ADSP_CODEC_AMRNB)|(1<<MSM_ADSP_CODEC_WAV)| \
+ (1<<MSM_ADSP_CODEC_ADPCM)|(1<<MSM_ADSP_CODEC_YADPCM)| \
+ (1<<MSM_ADSP_CODEC_EVRC)|(1<<MSM_ADSP_CODEC_QCELP))
+#define DEC2_FORMAT ((1<<MSM_ADSP_CODEC_MP3)| \
+ (1<<MSM_ADSP_CODEC_AAC)|(1<<MSM_ADSP_CODEC_WMA)| \
+ (1<<MSM_ADSP_CODEC_WMAPRO)|(1<<MSM_ADSP_CODEC_AMRWB)| \
+ (1<<MSM_ADSP_CODEC_AMRNB)|(1<<MSM_ADSP_CODEC_WAV)| \
+ (1<<MSM_ADSP_CODEC_ADPCM)|(1<<MSM_ADSP_CODEC_YADPCM)| \
+ (1<<MSM_ADSP_CODEC_EVRC)|(1<<MSM_ADSP_CODEC_QCELP))
+#define DEC3_FORMAT ((1<<MSM_ADSP_CODEC_MP3)| \
+ (1<<MSM_ADSP_CODEC_AAC)|(1<<MSM_ADSP_CODEC_WMA)| \
+ (1<<MSM_ADSP_CODEC_WMAPRO)|(1<<MSM_ADSP_CODEC_AMRWB)| \
+ (1<<MSM_ADSP_CODEC_AMRNB)|(1<<MSM_ADSP_CODEC_WAV)| \
+ (1<<MSM_ADSP_CODEC_ADPCM)|(1<<MSM_ADSP_CODEC_YADPCM)| \
+ (1<<MSM_ADSP_CODEC_EVRC)|(1<<MSM_ADSP_CODEC_QCELP))
+#define DEC4_FORMAT (1<<MSM_ADSP_CODEC_MIDI)
+
+static unsigned int dec_concurrency_table[] = {
+ /* Audio LP */
+ (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DMA)), 0,
+ 0, 0, 0,
+
+ /* Concurrency 1 */
+ (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
+ (DEC1_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
+ (DEC2_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
+ (DEC3_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
+ (DEC4_FORMAT),
+
+ /* Concurrency 2 */
+ (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
+ (DEC1_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
+ (DEC2_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
+ (DEC3_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
+ (DEC4_FORMAT),
+
+ /* Concurrency 3 */
+ (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
+ (DEC1_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
+ (DEC2_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
+ (DEC3_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
+ (DEC4_FORMAT),
+
+ /* Concurrency 4 */
+ (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
+ (DEC1_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
+ (DEC2_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
+ (DEC3_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
+ (DEC4_FORMAT),
+
+ /* Concurrency 5 */
+ (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
+ (DEC1_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
+ (DEC2_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
+ (DEC3_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
+ (DEC4_FORMAT),
+
+ /* Concurrency 6 */
+ (DEC0_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
+ 0, 0, 0, 0,
+
+ /* Concurrency 7 */
+ (DEC0_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
+ (DEC1_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
+ (DEC2_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
+ (DEC3_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
+ (DEC4_FORMAT),
+};
+
+#define DEC_INFO(name, queueid, decid, nr_codec) { .module_name = name, \
+ .module_queueid = queueid, .module_decid = decid, \
+ .nr_codec_support = nr_codec}
+
+static struct msm_adspdec_info dec_info_list[] = {
+ DEC_INFO("AUDPLAY0TASK", 13, 0, 11), /* AudPlay0BitStreamCtrlQueue */
+ DEC_INFO("AUDPLAY1TASK", 14, 1, 11), /* AudPlay1BitStreamCtrlQueue */
+ DEC_INFO("AUDPLAY2TASK", 15, 2, 11), /* AudPlay2BitStreamCtrlQueue */
+ DEC_INFO("AUDPLAY3TASK", 16, 3, 11), /* AudPlay3BitStreamCtrlQueue */
+ DEC_INFO("AUDPLAY4TASK", 17, 4, 1), /* AudPlay4BitStreamCtrlQueue */
+};
+
+static struct msm_adspdec_database msm_device_adspdec_database = {
+ .num_dec = ARRAY_SIZE(dec_info_list),
+ .num_concurrency_support = (ARRAY_SIZE(dec_concurrency_table) / \
+ ARRAY_SIZE(dec_info_list)),
+ .dec_concurrency_table = dec_concurrency_table,
+ .dec_info_list = dec_info_list,
+};
+
+static struct platform_device msm_device_adspdec = {
+ .name = "msm_adspdec",
+ .id = -1,
+ .dev = {
+ .platform_data = &msm_device_adspdec_database
+ },
+};
+
+static struct android_pmem_platform_data android_pmem_audio_pdata = {
+ .name = "pmem_audio",
+ .allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
+ .cached = 0,
+ .memory_type = MEMTYPE_EBI1,
+};
+
+static struct platform_device android_pmem_audio_device = {
+ .name = "android_pmem",
+ .id = 2,
+ .dev = { .platform_data = &android_pmem_audio_pdata },
+};
+
+static struct android_pmem_platform_data android_pmem_pdata = {
+ .name = "pmem",
+ .allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
+ .cached = 1,
+ .memory_type = MEMTYPE_EBI1,
+};
+static struct platform_device android_pmem_device = {
+ .name = "android_pmem",
+ .id = 0,
+ .dev = { .platform_data = &android_pmem_pdata },
+};
+
+static u32 msm_calculate_batt_capacity(u32 current_voltage);
+
+static struct msm_psy_batt_pdata msm_psy_batt_data = {
+ .voltage_min_design = 2800,
+ .voltage_max_design = 4300,
+ .avail_chg_sources = AC_CHG | USB_CHG ,
+ .batt_technology = POWER_SUPPLY_TECHNOLOGY_LION,
+ .calculate_capacity = &msm_calculate_batt_capacity,
+};
+
+static u32 msm_calculate_batt_capacity(u32 current_voltage)
+{
+ u32 low_voltage = msm_psy_batt_data.voltage_min_design;
+ u32 high_voltage = msm_psy_batt_data.voltage_max_design;
+
+ return (current_voltage - low_voltage) * 100
+ / (high_voltage - low_voltage);
+}
+
+static struct platform_device msm_batt_device = {
+ .name = "msm-battery",
+ .id = -1,
+ .dev.platform_data = &msm_psy_batt_data,
+};
+
+static struct platform_device *qrd1_devices[] __initdata = {
+ &msm_device_dmov,
+ &msm_device_smd,
+ &msm_device_uart1,
+ &msm_device_uart_dm1,
+ &msm_gsbi0_qup_i2c_device,
+ &msm_gsbi1_qup_i2c_device,
+ &msm_device_otg,
+ &msm_device_gadget_peripheral,
+ &android_usb_device,
+ &android_pmem_device,
+ &android_pmem_adsp_device,
+ &usb_mass_storage_device,
+ &rndis_device,
+ &usb_diag_device,
+ &usb_gadget_fserial_device,
+ &android_pmem_audio_device,
+ &msm_device_snd,
+ &msm_device_adspdec,
+ &msm_batt_device,
+ &msm_kgsl_3d0,
+#ifdef CONFIG_BT
+ &msm_bt_power_device,
+#endif
+ &msm_wlan_ar6000_pm_device,
+ &asoc_msm_pcm,
+ &asoc_msm_dai0,
+ &asoc_msm_dai1,
+};
+
+static unsigned pmem_kernel_ebi1_size = PMEM_KERNEL_EBI1_SIZE;
+static int __init pmem_kernel_ebi1_size_setup(char *p)
+{
+ pmem_kernel_ebi1_size = memparse(p, NULL);
+ return 0;
+}
+early_param("pmem_kernel_ebi1_size", pmem_kernel_ebi1_size_setup);
+
+static unsigned pmem_audio_size = MSM_PMEM_AUDIO_SIZE;
+static int __init pmem_audio_size_setup(char *p)
+{
+ pmem_audio_size = memparse(p, NULL);
+ return 0;
+}
+early_param("pmem_audio_size", pmem_audio_size_setup);
+
+static void __init msm_msm7627a_allocate_memory_regions(void)
+{
+ pr_info("Dummy allocation for fb\n");
+}
+
+static struct memtype_reserve msm7627a_reserve_table[] __initdata = {
+ [MEMTYPE_SMI] = {
+ },
+ [MEMTYPE_EBI0] = {
+ .flags = MEMTYPE_FLAGS_1M_ALIGN,
+ },
+ [MEMTYPE_EBI1] = {
+ .flags = MEMTYPE_FLAGS_1M_ALIGN,
+ },
+};
+
+static void __init size_pmem_devices(void)
+{
+#ifdef CONFIG_ANDROID_PMEM
+ android_pmem_adsp_pdata.size = pmem_adsp_size;
+ android_pmem_pdata.size = pmem_mdp_size;
+ android_pmem_audio_pdata.size = pmem_audio_size;
+#endif
+}
+
+static void __init reserve_memory_for(struct android_pmem_platform_data *p)
+{
+ msm7627a_reserve_table[p->memory_type].size += p->size;
+}
+
+static void __init reserve_pmem_memory(void)
+{
+#ifdef CONFIG_ANDROID_PMEM
+ reserve_memory_for(&android_pmem_adsp_pdata);
+ reserve_memory_for(&android_pmem_pdata);
+ reserve_memory_for(&android_pmem_audio_pdata);
+ msm7627a_reserve_table[MEMTYPE_EBI1].size += pmem_kernel_ebi1_size;
+#endif
+}
+
+static void __init msm7627a_calculate_reserve_sizes(void)
+{
+ size_pmem_devices();
+ reserve_pmem_memory();
+}
+
+static int msm7627a_paddr_to_memtype(unsigned int paddr)
+{
+ return MEMTYPE_EBI1;
+}
+
+static struct reserve_info msm7627a_reserve_info __initdata = {
+ .memtype_reserve_table = msm7627a_reserve_table,
+ .calculate_reserve_sizes = msm7627a_calculate_reserve_sizes,
+ .paddr_to_memtype = msm7627a_paddr_to_memtype,
+};
+
+static void __init msm7627a_reserve(void)
+{
+ reserve_info = &msm7627a_reserve_info;
+ msm_reserve();
+}
+
+static void __init msm_device_i2c_init(void)
+{
+ msm_gsbi0_qup_i2c_device.dev.platform_data = &msm_gsbi0_qup_i2c_pdata;
+ msm_gsbi1_qup_i2c_device.dev.platform_data = &msm_gsbi1_qup_i2c_pdata;
+}
+
+static struct msm_handset_platform_data hs_platform_data = {
+ .hs_name = "7k_handset",
+ .pwr_key_delay_ms = 500, /* 0 will disable end key */
+};
+
+static struct platform_device hs_pdev = {
+ .name = "msm-handset",
+ .id = -1,
+ .dev = {
+ .platform_data = &hs_platform_data,
+ },
+};
+
+#define UART1DM_RX_GPIO 45
+static void __init msm_qrd1_init(void)
+{
+ msm7x2x_misc_init();
+ msm_device_i2c_init();
+ msm7627a_init_mmc();
+
+#ifdef CONFIG_SERIAL_MSM_HS
+ msm_uart_dm1_pdata.wakeup_irq = gpio_to_irq(UART1DM_RX_GPIO);
+ msm_device_uart_dm1.dev.platform_data = &msm_uart_dm1_pdata;
+#endif
+
+#ifdef CONFIG_USB_MSM_OTG_72K
+ msm_otg_pdata.swfi_latency = msm7627a_pm_data
+ [MSM_PM_SLEEP_MODE_RAMP_DOWN_AND_WAIT_FOR_INTERRUPT].latency;
+ msm_device_otg.dev.platform_data = &msm_otg_pdata;
+#endif
+ msm_device_gadget_peripheral.dev.platform_data =
+ &msm_gadget_pdata;
+ platform_add_devices(qrd1_devices,
+ ARRAY_SIZE(qrd1_devices));
+#ifdef CONFIG_USB_EHCI_MSM_72K
+ msm7627a_init_host();
+#endif
+ msm_pm_set_platform_data(msm7627a_pm_data,
+ ARRAY_SIZE(msm7627a_pm_data));
+
+#if defined(CONFIG_BT) && defined(CONFIG_MARIMBA_CORE)
+ i2c_register_board_info(MSM_GSBI1_QUP_I2C_BUS_ID,
+ bahama_devices,
+ ARRAY_SIZE(bahama_devices));
+ bt_power_init();
+#endif
+ platform_device_register(&hs_pdev);
+
+#ifdef CONFIG_MSM_RPC_VIBRATOR
+ msm_init_pmic_vibrator();
+#endif
+}
+
+static void __init qrd7627a_init_early(void)
+{
+ msm_msm7627a_allocate_memory_regions();
+}
+
+MACHINE_START(MSM7627A_QRD1, "QRD MSM7627a QRD1")
+ .boot_params = PHYS_OFFSET + 0x100,
+ .map_io = msm_common_io_init,
+ .reserve = msm7627a_reserve,
+ .init_irq = msm_init_irq,
+ .init_machine = msm_qrd1_init,
+ .timer = &msm_timer,
+ .init_early = qrd7627a_init_early,
+MACHINE_END