)]}'
{
  "commit": "caff2befffe899e63df5cc760b7ed01cfd902685",
  "tree": "fe07f997bd67d1e5ae3122db789d7e7361ddca28",
  "parents": [
    "69fef0d2e2c2c049ef4207a52e78b50d527bd85a"
  ],
  "author": {
    "name": "Peter Zijlstra",
    "email": "a.p.zijlstra@chello.nl",
    "time": "Wed Mar 03 12:02:30 2010 +0100"
  },
  "committer": {
    "name": "Ingo Molnar",
    "email": "mingo@elte.hu",
    "time": "Wed Mar 10 13:23:32 2010 +0100"
  },
  "message": "perf, x86: Implement simple LBR support\n\nImplement simple suport Intel Last-Branch-Record, it supports all\nhardware that implements FREEZE_LBRS_ON_PMI, but does not (yet) implement\nthe LBR config register.\n\nThe Intel LBR is a FIFO of From,To addresses describing the last few\nbranches the hardware took.\n\nThis patch does not add perf interface to the LBR, but merely provides an\ninterface for internal use.\n\nSigned-off-by: Peter Zijlstra \u003ca.p.zijlstra@chello.nl\u003e\nCc: Arnaldo Carvalho de Melo \u003cacme@infradead.org\u003e\nCc: paulus@samba.org\nCc: eranian@google.com\nCc: robert.richter@amd.com\nCc: fweisbec@gmail.com\nLKML-Reference: \u003c20100304140100.544191154@chello.nl\u003e\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n",
  "tree_diff": [
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      "new_mode": 33188,
      "new_path": "arch/x86/kernel/cpu/perf_event.c"
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      "old_mode": 33188,
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    },
    {
      "type": "add",
      "old_id": "0000000000000000000000000000000000000000",
      "old_mode": 0,
      "old_path": "/dev/null",
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      "new_mode": 33188,
      "new_path": "arch/x86/kernel/cpu/perf_event_intel_lbr.c"
    },
    {
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}