)]}'
{
  "commit": "cc4b7c1814c9ad375e8167ea4a9ec4a0ec1ada04",
  "tree": "d3bfb7c9c3a07c44519024f3d43a2ad08e6fe0ac",
  "parents": [
    "fae9ca791507876c3ccaa8ab686b2ce42dc7a560"
  ],
  "author": {
    "name": "Arnd Bergmann",
    "email": "arnd@arndb.de",
    "time": "Tue Feb 26 07:01:56 2008 +0100"
  },
  "committer": {
    "name": "Jeremy Kerr",
    "email": "jk@ozlabs.org",
    "time": "Fri Feb 29 15:17:49 2008 +1100"
  },
  "message": "[POWERPC] spufs: invalidate SLB translation before adding a new entry\n\nWhen we replace an SLB entry in the MFC after using up all the available\nentries, there is a short window in which an incorrect entry is marked\nas valid.\n\nThe problem is that the \u0027valid\u0027 bit is stored in the ESID, which is\nalways written after the VSID. Overwriting the VSID first will make the\noriginal ESID entry point to the new VSID, which means that any\nconcurrent DMA accessing the old ESID ends up being redirected to the\nnew virtual address.  A few cycles later, we write the new ESID and\neverything is fine again.\n\nThat race can be closed by writing a zero entry to the ESID first, which\nmakes sure that the VSID is not accessed until we write the new ESID.\n\nNote that we don\u0027t actually need to invalidate the SLB entry using the\ninvalidation register, which would also flush any ERAT entries for that\nsegment, because the segment translation does not become invalid but is\nonly removed from the SLB cache.\n\nSigned-off-by: Arnd Bergmann \u003carnd@arndb.de\u003e\nSigned-off-by: Jeremy Kerr \u003cjk@ozlabs.org\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "87eb07f94c5f111e345cdebe47640bb1d4a6a1ea",
      "old_mode": 33188,
      "old_path": "arch/powerpc/platforms/cell/spu_base.c",
      "new_id": "cfc28e93c825cb997054ce514f3abbd1d10783ce",
      "new_mode": 33188,
      "new_path": "arch/powerpc/platforms/cell/spu_base.c"
    }
  ]
}