commit cd42c82b23e1098becf59b95ba5fb64ff0f08d13
author Lucille Sylvester <lsylvest@codeaurora.org> Thu Sep 08 17:37:26 2011 -0600
committer Bryan Huntsman <bryanh@codeaurora.org> Mon Oct 03 16:18:37 2011 -0700
tree 9af2d3b5d56dcaafe88f08487a1d5f9802a6781f
parent 44873f7eda64c916759d18980f6f2331d46eef29

msm: kgsl: Clocks should be set to the active level during NAP

Fix a bug in the interaction between NAP and GPU DCVS.  Without
this change the clock freq recommended by DCVS might or might
not have been used.  Power levels should be stabilized for test
cases now.

Signed-off-by: Lucille Sylvester <lsylvest@codeaurora.org>

drivers/gpu/msm/kgsl_pwrctrl.c

diff --git a/drivers/gpu/msm/kgsl_pwrctrl.c b/drivers/gpu/msm/kgsl_pwrctrl.c
index 35cf12e..4fbd8c3 100644
--- a/drivers/gpu/msm/kgsl_pwrctrl.c
+++ b/drivers/gpu/msm/kgsl_pwrctrl.c
@@ -30,7 +30,8 @@
 		new_level >= pwr->thermal_pwrlevel &&
 		new_level != pwr->active_pwrlevel) {
 		pwr->active_pwrlevel = new_level;
-		if (test_bit(KGSL_PWRFLAGS_CLK_ON, &pwr->power_flags))
+		if ((test_bit(KGSL_PWRFLAGS_CLK_ON, &pwr->power_flags)) ||
+			(device->state == KGSL_STATE_NAP))
 			clk_set_rate(pwr->grp_clks[0],
 					pwr->pwrlevels[pwr->active_pwrlevel].
 					gpu_freq);