)]}'
{
  "commit": "cda3d4a069b915cf46e640bb6872a9d9aefeaabe",
  "tree": "f7022fceac378d444761da3f22e729d348482cf2",
  "parents": [
    "1df57c0c21c92a6d4fcfe5304c84151ed9beb7a2"
  ],
  "author": {
    "name": "Mike Habeck",
    "email": "habeck@sgi.com",
    "time": "Wed Apr 26 12:05:50 2006 -0500"
  },
  "committer": {
    "name": "Tony Luck",
    "email": "tony.luck@intel.com",
    "time": "Thu Apr 27 14:32:07 2006 -0700"
  },
  "message": "[IA64-SGI] fix SGI Altix tioce_reserve_m32() bug\n\nThe following patch fixes a bug in the SGI Altix tioce_reserve_m32()\ncode.  The bug was that we could walking past the end of the CE ASIC\n32/40bit PMU ATE Buffer, resulting in a PIO Reply Error.\n\nSigned-off-by: Mike Habeck \u003chabeck@sgi.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "fa073cc4b565fc6dbf535cfdbe32fec1e7aa8b28",
      "old_mode": 33188,
      "old_path": "arch/ia64/sn/pci/tioce_provider.c",
      "new_id": "833295624e5df3acd2284ef8d10e7226c037c513",
      "new_mode": 33188,
      "new_path": "arch/ia64/sn/pci/tioce_provider.c"
    }
  ]
}