)]}'
{
  "commit": "ce2f50b4ae71f700c7b4b0bf0ff11c328611dae8",
  "tree": "52570a06396baa2fa96eafe4b7403b9328b676ed",
  "parents": [
    "28562af3d4b21d687dd57c44006aeeed1036c781"
  ],
  "author": {
    "name": "Naveen Gupta",
    "email": "ngupta@google.com",
    "time": "Wed Aug 17 09:11:46 2005 +0200"
  },
  "committer": {
    "name": "Wim Van Sebroeck",
    "email": "wim@iguana.be",
    "time": "Sun Sep 11 21:51:18 2005 +0200"
  },
  "message": "[WATCHDOG] i6300esb-set_correct_reload_register_bit\n\nThis patch writes into bit 8 of the reload register to perform the\ncorrect \u0027Reload Sequence\u0027 instead of writing into bit 4 of Watchdog for\nIntel 6300ESB chipset.\n\nSigned-off-by: Naveen Gupta \u003cngupta@google.com\u003e\nSigned-off-by: David Hardeman \u003cdavid@2gen.com\u003e\nSigned-off-by: Wim Van Sebroeck \u003cwim@iguana.be\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "f0e96fbd6489ef6948b883aacbfd91be2264af6c",
      "old_mode": 33188,
      "old_path": "drivers/char/watchdog/i6300esb.c",
      "new_id": "c04b246858ae416993b73d08a6bbf936c16ea9f6",
      "new_mode": 33188,
      "new_path": "drivers/char/watchdog/i6300esb.c"
    },
    {
      "type": "modify",
      "old_id": "b5b47e3dda1a87db5839807e0c9662b7441fe615",
      "old_mode": 33188,
      "old_path": "drivers/char/watchdog/i6300esb.h",
      "new_id": "20c923bbb1c9be1edf24a8b885ffe4332bdc5979",
      "new_mode": 33188,
      "new_path": "drivers/char/watchdog/i6300esb.h"
    }
  ]
}