)]}'
{
  "commit": "cfbb1426bd76c4ba6ec4491c8df2a5dd3d984750",
  "tree": "4fe639274b651ea77c9130eae0ccca36e16d6d17",
  "parents": [
    "17e8ce0e9417eee1f57f9b3d4aad168425e043c3"
  ],
  "author": {
    "name": "Jack Steiner",
    "email": "steiner@sgi.com",
    "time": "Thu Dec 22 13:45:41 2005 -0600"
  },
  "committer": {
    "name": "Tony Luck",
    "email": "tony.luck@intel.com",
    "time": "Fri Jan 13 14:10:06 2006 -0800"
  },
  "message": "[IA64] Hole in IA64 TLB flushing from system threads\n\nI originally thought this was an bug only in the SN code, but I think I\nalso see a hole in the generic IA64 tlb code. (Separate patch was sent\nfor the SN problem).\n\nIt looks like there is a bug in the TLB flushing code. During context switch,\nkernel threads (kswapd, for example) inherit the mm of the task that was\npreviously running on the cpu. Normally, this is ok because the previous context\nis still loaded into the RR registers. However, if the owner of the mm\nmigrates to another cpu, changes it\u0027s context number, and references a\npage before kswapd issues a tlb_purge for that same page, the purge will be\ndone with a stale context number (\u0026 RR registers).\n\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "41105d45442366940006aac1945c425fa93ec8bf",
      "old_mode": 33188,
      "old_path": "arch/ia64/mm/tlb.c",
      "new_id": "6a4eec9113e8383efd029253a9a038637d6819d0",
      "new_mode": 33188,
      "new_path": "arch/ia64/mm/tlb.c"
    }
  ]
}