Perf: Fix counts across power collapse
After entry and exit from power collapse, the perf pm_notifier was
calling perf_pmu_disable/enable functions from perf core. Perf core
maintains a counter that it uses to match disable and enable calls but
since pm_notifier is invoked asynchronously, the counter was getting a
non-zero value which prevented the pmu from being enabled. As a result of
this, we were seeing zero counts for some cores across power collapse.
Make the architecture specific calls directly from pm_notifier.
Change-Id: I744e190906a20e70e1e4798235215c385018b121
Signed-off-by: Sheetal Sahasrabudhe <sheetals@codeaurora.org>
diff --git a/arch/arm/kernel/perf_event.c b/arch/arm/kernel/perf_event.c
index e8d2913..5b99903 100644
--- a/arch/arm/kernel/perf_event.c
+++ b/arch/arm/kernel/perf_event.c
@@ -860,11 +860,13 @@
static int perf_cpu_pm_notifier(struct notifier_block *self, unsigned long cmd,
void *v)
{
+ struct pmu *pmu;
switch (cmd) {
case CPU_PM_ENTER:
if (cpu_has_active_perf((int)v)) {
armpmu_update_counters();
- perf_pmu_disable(&cpu_pmu->pmu);
+ pmu = &cpu_pmu->pmu;
+ pmu->pmu_disable(pmu);
}
break;
@@ -877,7 +879,8 @@
*/
__get_cpu_var(from_idle) = 1;
cpu_pmu->reset(NULL);
- perf_pmu_enable(&cpu_pmu->pmu);
+ pmu = &cpu_pmu->pmu;
+ pmu->pmu_enable(pmu);
}
break;
}
diff --git a/arch/arm/mach-msm/perf_debug.c b/arch/arm/mach-msm/perf_debug.c
index 10374d2..8c7f30e 100644
--- a/arch/arm/mach-msm/perf_debug.c
+++ b/arch/arm/mach-msm/perf_debug.c
@@ -28,6 +28,7 @@
"3 Perf: Correct irq for CPU hotplug detection\n"
"4 Perf: Check perf activity on correct CPU\n"
"7 Perf: Add L1 counters to tracepoints\n"
+ "10 Perf: Fix counts across power collapse\n"
;
static ssize_t desc_read(struct file *fp, char __user *buf,