)]}'
{
  "commit": "d08ca26ceec4dfbcfdbada4ad728db742ccaecd1",
  "tree": "15c79eb89ce17fcb2b96f1497e52c352d433b0ff",
  "parents": [
    "856b5925047d73a85557203d124d62c5eea1fbd3"
  ],
  "author": {
    "name": "Steve Wise",
    "email": "swise@opengridcomputing.com",
    "time": "Mon Jan 21 14:42:11 2008 -0600"
  },
  "committer": {
    "name": "Roland Dreier",
    "email": "rolandd@cisco.com",
    "time": "Fri Jan 25 14:17:45 2008 -0800"
  },
  "message": "RDMA/cxgb3: Fix page shift calculation in build_phys_page_list()\n\nThe existing logic incorrectly maps this buffer list:\n\n    0: addr 0x10001000, size 0x1000\n    1: addr 0x10002000, size 0x1000\n\nTo this bogus page list:\n\n    0: 0x10000000\n    1: 0x10002000\n\nThe shift calculation must also take into account the address of the\nfirst entry masked by the page_mask as well as the last address+size\nrounded up to the next page size.\n\nSigned-off-by: Steve Wise \u003cswise@opengridcomputing.com\u003e\nSigned-off-by: Roland Dreier \u003crolandd@cisco.com\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "a6c2c4ba29e69244b896849b376698a5c2ab7cd2",
      "old_mode": 33188,
      "old_path": "drivers/infiniband/hw/cxgb3/iwch_mem.c",
      "new_id": "73bfd1656f86434bae2c36215a6d073607a07a7c",
      "new_mode": 33188,
      "new_path": "drivers/infiniband/hw/cxgb3/iwch_mem.c"
    }
  ]
}
