msm: acpuclock-8930{aa,ab}: Turn off inefficient frequencies
Given frequcies at the same voltage and the same L2 operating
point, the highest frequency is a more efficient choice. Update
the frequency tables for 8930, 8930aa, 8930ab to turn off the
inefficient frequencies.
Change-Id: I9e0d2c9566052ac1b50ae241b62fc8bd08b09776
Signed-off-by: Tianyi Gou <tgou@codeaurora.org>
Signed-off-by: Neha Pandey <nehap@codeaurora.org>
diff --git a/arch/arm/mach-msm/acpuclock-8930.c b/arch/arm/mach-msm/acpuclock-8930.c
index e46599a..948ecdd 100644
--- a/arch/arm/mach-msm/acpuclock-8930.c
+++ b/arch/arm/mach-msm/acpuclock-8930.c
@@ -155,19 +155,19 @@
static struct acpu_level acpu_freq_tbl_slow[] __initdata = {
{ 1, { 384000, PLL_8, 0, 0x00 }, L2(0), 950000 },
- { 1, { 432000, HFPLL, 2, 0x20 }, L2(5), 975000 },
+ { 0, { 432000, HFPLL, 2, 0x20 }, L2(5), 975000 },
{ 1, { 486000, HFPLL, 2, 0x24 }, L2(5), 975000 },
- { 1, { 540000, HFPLL, 2, 0x28 }, L2(5), 1000000 },
+ { 0, { 540000, HFPLL, 2, 0x28 }, L2(5), 1000000 },
{ 1, { 594000, HFPLL, 1, 0x16 }, L2(5), 1000000 },
- { 1, { 648000, HFPLL, 1, 0x18 }, L2(5), 1025000 },
+ { 0, { 648000, HFPLL, 1, 0x18 }, L2(5), 1025000 },
{ 1, { 702000, HFPLL, 1, 0x1A }, L2(5), 1025000 },
- { 1, { 756000, HFPLL, 1, 0x1C }, L2(10), 1075000 },
+ { 0, { 756000, HFPLL, 1, 0x1C }, L2(10), 1075000 },
{ 1, { 810000, HFPLL, 1, 0x1E }, L2(10), 1075000 },
- { 1, { 864000, HFPLL, 1, 0x20 }, L2(10), 1100000 },
+ { 0, { 864000, HFPLL, 1, 0x20 }, L2(10), 1100000 },
{ 1, { 918000, HFPLL, 1, 0x22 }, L2(10), 1100000 },
- { 1, { 972000, HFPLL, 1, 0x24 }, L2(10), 1125000 },
+ { 0, { 972000, HFPLL, 1, 0x24 }, L2(10), 1125000 },
{ 1, { 1026000, HFPLL, 1, 0x26 }, L2(10), 1125000 },
- { 1, { 1080000, HFPLL, 1, 0x28 }, L2(15), 1175000 },
+ { 0, { 1080000, HFPLL, 1, 0x28 }, L2(15), 1175000 },
{ 1, { 1134000, HFPLL, 1, 0x2A }, L2(15), 1175000 },
{ 1, { 1188000, HFPLL, 1, 0x2C }, L2(15), 1200000 },
{ 0, { 0 } }
@@ -175,19 +175,19 @@
static struct acpu_level acpu_freq_tbl_nom[] __initdata = {
{ 1, { 384000, PLL_8, 0, 0x00 }, L2(0), 925000 },
- { 1, { 432000, HFPLL, 2, 0x20 }, L2(5), 950000 },
+ { 0, { 432000, HFPLL, 2, 0x20 }, L2(5), 950000 },
{ 1, { 486000, HFPLL, 2, 0x24 }, L2(5), 950000 },
- { 1, { 540000, HFPLL, 2, 0x28 }, L2(5), 975000 },
+ { 0, { 540000, HFPLL, 2, 0x28 }, L2(5), 975000 },
{ 1, { 594000, HFPLL, 1, 0x16 }, L2(5), 975000 },
- { 1, { 648000, HFPLL, 1, 0x18 }, L2(5), 1000000 },
+ { 0, { 648000, HFPLL, 1, 0x18 }, L2(5), 1000000 },
{ 1, { 702000, HFPLL, 1, 0x1A }, L2(5), 1000000 },
- { 1, { 756000, HFPLL, 1, 0x1C }, L2(10), 1050000 },
+ { 0, { 756000, HFPLL, 1, 0x1C }, L2(10), 1050000 },
{ 1, { 810000, HFPLL, 1, 0x1E }, L2(10), 1050000 },
- { 1, { 864000, HFPLL, 1, 0x20 }, L2(10), 1075000 },
+ { 0, { 864000, HFPLL, 1, 0x20 }, L2(10), 1075000 },
{ 1, { 918000, HFPLL, 1, 0x22 }, L2(10), 1075000 },
- { 1, { 972000, HFPLL, 1, 0x24 }, L2(10), 1100000 },
+ { 0, { 972000, HFPLL, 1, 0x24 }, L2(10), 1100000 },
{ 1, { 1026000, HFPLL, 1, 0x26 }, L2(10), 1100000 },
- { 1, { 1080000, HFPLL, 1, 0x28 }, L2(15), 1150000 },
+ { 0, { 1080000, HFPLL, 1, 0x28 }, L2(15), 1150000 },
{ 1, { 1134000, HFPLL, 1, 0x2A }, L2(15), 1150000 },
{ 1, { 1188000, HFPLL, 1, 0x2C }, L2(15), 1175000 },
{ 0, { 0 } }
@@ -195,19 +195,19 @@
static struct acpu_level acpu_freq_tbl_fast[] __initdata = {
{ 1, { 384000, PLL_8, 0, 0x00 }, L2(0), 900000 },
- { 1, { 432000, HFPLL, 2, 0x20 }, L2(5), 900000 },
+ { 0, { 432000, HFPLL, 2, 0x20 }, L2(5), 900000 },
{ 1, { 486000, HFPLL, 2, 0x24 }, L2(5), 900000 },
- { 1, { 540000, HFPLL, 2, 0x28 }, L2(5), 925000 },
+ { 0, { 540000, HFPLL, 2, 0x28 }, L2(5), 925000 },
{ 1, { 594000, HFPLL, 1, 0x16 }, L2(5), 925000 },
- { 1, { 648000, HFPLL, 1, 0x18 }, L2(5), 950000 },
+ { 0, { 648000, HFPLL, 1, 0x18 }, L2(5), 950000 },
{ 1, { 702000, HFPLL, 1, 0x1A }, L2(5), 950000 },
- { 1, { 756000, HFPLL, 1, 0x1C }, L2(10), 1000000 },
+ { 0, { 756000, HFPLL, 1, 0x1C }, L2(10), 1000000 },
{ 1, { 810000, HFPLL, 1, 0x1E }, L2(10), 1000000 },
- { 1, { 864000, HFPLL, 1, 0x20 }, L2(10), 1025000 },
+ { 0, { 864000, HFPLL, 1, 0x20 }, L2(10), 1025000 },
{ 1, { 918000, HFPLL, 1, 0x22 }, L2(10), 1025000 },
- { 1, { 972000, HFPLL, 1, 0x24 }, L2(10), 1050000 },
+ { 0, { 972000, HFPLL, 1, 0x24 }, L2(10), 1050000 },
{ 1, { 1026000, HFPLL, 1, 0x26 }, L2(10), 1050000 },
- { 1, { 1080000, HFPLL, 1, 0x28 }, L2(15), 1100000 },
+ { 0, { 1080000, HFPLL, 1, 0x28 }, L2(15), 1100000 },
{ 1, { 1134000, HFPLL, 1, 0x2A }, L2(15), 1100000 },
{ 1, { 1188000, HFPLL, 1, 0x2C }, L2(15), 1125000 },
{ 0, { 0 } }