ASoC: msm: Disable 100 KHz level shifter when not in use
When 100KHz level shifter is enabled this is causing an i2c
Failures for the tuner chips sitting on the same bus, to avoid this
Errors the spdif 100KHz level shifter should be disabled when
The i2c read / write of cs8427 chip is not in use.
How 100KHz disabled is, as and when the driver tries to do I2C
Write / Read Level shifter is enabled and disabled after i2c
Read / Write is done, This is done for every read / write i2c
Transfers on cs8427 chip, though it adds and over head of enabling
And disabling level shifter every time, this is the only better way
To address this.
CRs-Fixed: 390239
Signed-off-by: Santosh Mardi <gsantosh@codeaurora.org>
(cherry picked from commit 3896ed363d0958bde89de2f31709616eb96cb489)
(cherry picked from commit a6fa21f13dac271fc6b9ba971f9746b5fe0d7093)
Change-Id: If0c953771295aac9ddfc2b72389ed30e94fedb9b
Signed-off-by: Sudhir Sharma <sudsha@codeaurora.org>
diff --git a/arch/arm/mach-msm/board-8064.c b/arch/arm/mach-msm/board-8064.c
index 0e05407..9c2c720 100644
--- a/arch/arm/mach-msm/board-8064.c
+++ b/arch/arm/mach-msm/board-8064.c
@@ -1160,8 +1160,10 @@
return ret;
}
gpio_direction_output(SX150X_GPIO(1, 10), 1);
- } else
+ } else {
+ gpio_direction_output(SX150X_GPIO(1, 10), 0);
gpio_free(SX150X_GPIO(1, 10));
+ }
return ret;
}