| commit | d9fa3d511cce224e595ccde1c6ae24199a2d5a67 | [log] [tgz] |
|---|---|---|
| author | Harsh Vardhan Dwivedi <hdwivedi@codeaurora.org> | Wed Apr 18 17:19:11 2012 -0600 |
| committer | Harsh Vardhan Dwivedi <hdwivedi@codeaurora.org> | Thu Apr 19 13:24:26 2012 -0600 |
| tree | 4b20c9cc7497d9934dcf325e257a2b87edf2a7ce | |
| parent | 2e9581fb01d6e7ae16d2e3d0547bb378d7f562a9 [diff] |
msm: kgsl: Use default hardcoded value for CP's ROQ queue size The command processor FIFO depth is different for A330 and A2xx GPUs. It is best to let each GPU use the default value which is hardcoded in the respective GPU. Change-Id: I5db6a1c0671d0ad4253dcad7f386429d78a4bd62 Signed-off-by: Harsh Vardhan Dwivedi <hdwivedi@codeaurora.org>