msm: dcvs: remove core name.

Currently core_name is used to identify which core the dcvs operates on.
Instead use a type and the type num while registration with dcvs and
return an id (dcvs_core_id) upon successfull registration.

The dcvs_core_id is used by the clients of msm_dcvs to call upon its
apis viz. freq_start, freq_stop, msm_dcvs_idle etc.

The dcvs inturn uses the type num passed in at registration time to
invoke apis on the clients viz. set_freq, get_freq, idle_enable.

This further cleans up the internal dcvs add_core and get_core
implementation. One need not pass around the core_name and use the type
instead.

Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
(cherry picked from commit 1bbc0321a6871e018c17da6f244b9df442faead6)

Signed-off-by: Ram Kumar Chakravarthy Chebathini <rcheba@codeaurora.org>
(cherry picked from commit 09456d7d7618e6d0fc6b907b7af75268ea08a942)

Change-Id: Id27751a8ec8f5d3d386bbe7c7625ed56757b8bd7
Signed-off-by: Sudhir Sharma <sudsha@codeaurora.org>
diff --git a/drivers/cpufreq/cpufreq_gov_msm.c b/drivers/cpufreq/cpufreq_gov_msm.c
index 2b68d2a..6ddbf4e 100644
--- a/drivers/cpufreq/cpufreq_gov_msm.c
+++ b/drivers/cpufreq/cpufreq_gov_msm.c
@@ -25,23 +25,19 @@
 #include <mach/msm_dcvs.h>
 
 struct cpu_idle_info {
-	int cpu;
-	int enabled;
-	int handle;
-	struct msm_dcvs_idle dcvs_notifier;
-	struct pm_qos_request pm_qos_req;
+	int			enabled;
+	int			dcvs_core_id;
+	struct pm_qos_request	pm_qos_req;
 };
 
 static DEFINE_PER_CPU_SHARED_ALIGNED(struct cpu_idle_info, cpu_idle_info);
 static DEFINE_PER_CPU_SHARED_ALIGNED(u64, iowait_on_cpu);
-static char core_name[NR_CPUS][10];
 static uint32_t latency;
 
-static int msm_dcvs_idle_notifier(struct msm_dcvs_idle *self,
+static int msm_dcvs_idle_notifier(int core_num,
 		enum msm_core_control_event event)
 {
-	struct cpu_idle_info *info = container_of(self,
-				struct cpu_idle_info, dcvs_notifier);
+	struct cpu_idle_info *info = &per_cpu(cpu_idle_info, core_num);
 
 	switch (event) {
 	case MSM_DCVS_ENABLE_IDLE_PULSE:
@@ -86,7 +82,7 @@
 		if (val == (u64)-1)
 			val = 0;
 		per_cpu(iowait_on_cpu, smp_processor_id()) = val;
-		msm_dcvs_idle(info->handle, MSM_DCVS_IDLE_ENTER, 0);
+		msm_dcvs_idle(info->dcvs_core_id, MSM_DCVS_IDLE_ENTER, 0);
 		break;
 
 	case CPU_PM_EXIT:
@@ -97,7 +93,7 @@
 			val = 0;
 		io_wait_us = val;
 		iowaited = (io_wait_us - prev_io_wait_us);
-		msm_dcvs_idle(info->handle, MSM_DCVS_IDLE_EXIT, iowaited);
+		msm_dcvs_idle(info->dcvs_core_id, MSM_DCVS_IDLE_EXIT, iowaited);
 		break;
 	}
 
@@ -108,52 +104,32 @@
 	.notifier_call = msm_cpuidle_notifier,
 };
 
-static void msm_gov_idle_source_init(int cpu)
+static void msm_gov_idle_source_init(int cpu, int dcvs_core_id)
 {
 	struct cpu_idle_info *info = NULL;
-	struct msm_dcvs_idle *inotify = NULL;
 
 	info = &per_cpu(cpu_idle_info, cpu);
-	info->cpu = cpu;
-	inotify = &info->dcvs_notifier;
-	snprintf(core_name[cpu], 10, "cpu%d", cpu);
-	inotify->core_name = core_name[cpu];
-	info->handle = msm_dcvs_idle_source_register(inotify);
-	BUG_ON(info->handle < 0);
+	info->dcvs_core_id = dcvs_core_id;
 
 	pm_qos_add_request(&info->pm_qos_req, PM_QOS_CPU_DMA_LATENCY,
 				PM_QOS_DEFAULT_VALUE);
 }
 
-static int msm_gov_idle_source_uninit(int cpu)
-{
-	struct cpu_idle_info *info = NULL;
-	struct msm_dcvs_idle *inotify = NULL;
-
-	info = &per_cpu(cpu_idle_info, cpu);
-	info->cpu = cpu;
-	inotify = &info->dcvs_notifier;
-	return msm_dcvs_idle_source_unregister(inotify);
-}
-
 struct msm_gov {
-	int cpu;
-	unsigned int cur_freq;
-	unsigned int min_freq;
-	unsigned int max_freq;
-	struct msm_dcvs_freq gov_notifier;
-	struct cpufreq_policy *policy;
+	int			cpu;
+	unsigned int		cur_freq;
+	unsigned int		min_freq;
+	unsigned int		max_freq;
+	struct cpufreq_policy	*policy;
+	int			dcvs_core_id;
 };
 
 static DEFINE_PER_CPU_SHARED_ALIGNED(struct mutex, gov_mutex);
 static DEFINE_PER_CPU_SHARED_ALIGNED(struct msm_gov, msm_gov_info);
-static char core_name[NR_CPUS][10];
 
 static void msm_gov_check_limits(struct cpufreq_policy *policy)
 {
 	struct msm_gov *gov = &per_cpu(msm_gov_info, policy->cpu);
-	struct msm_dcvs_freq *dcvs_notifier =
-			&(per_cpu(msm_gov_info, policy->cpu).gov_notifier);
 
 	if (policy->max < gov->cur_freq)
 		__cpufreq_driver_target(policy, policy->max,
@@ -168,15 +144,14 @@
 	gov->cur_freq = policy->cur;
 	gov->min_freq = policy->min;
 	gov->max_freq = policy->max;
-	msm_dcvs_update_limits(dcvs_notifier);
+	msm_dcvs_update_limits(gov->dcvs_core_id);
 }
 
-static int msm_dcvs_freq_set(struct msm_dcvs_freq *self,
+static int msm_dcvs_freq_set(int core_num,
 		unsigned int freq)
 {
 	int ret = -EINVAL;
-	struct msm_gov *gov =
-		container_of(self, struct msm_gov, gov_notifier);
+	struct msm_gov *gov = &per_cpu(msm_gov_info, core_num);
 
 	mutex_lock(&per_cpu(gov_mutex, gov->cpu));
 
@@ -200,11 +175,9 @@
 	return ret;
 }
 
-static unsigned int msm_dcvs_freq_get(struct msm_dcvs_freq *self)
+static unsigned int msm_dcvs_freq_get(int core_num)
 {
-	struct msm_gov *gov =
-		container_of(self, struct msm_gov, gov_notifier);
-
+	struct msm_gov *gov = &per_cpu(msm_gov_info, core_num);
 	/*
 	 * the rw_sem in cpufreq is always held when this is called.
 	 * The policy->cur won't be updated in this case - so it is safe to
@@ -220,8 +193,6 @@
 	int ret = 0;
 	int handle = 0;
 	struct msm_gov *gov = &per_cpu(msm_gov_info, policy->cpu);
-	struct msm_dcvs_freq *dcvs_notifier =
-			&(per_cpu(msm_gov_info, cpu).gov_notifier);
 
 	switch (event) {
 	case CPUFREQ_GOV_START:
@@ -231,15 +202,14 @@
 		mutex_lock(&per_cpu(gov_mutex, cpu));
 		per_cpu(msm_gov_info, cpu).cpu = cpu;
 		gov->policy = policy;
-		dcvs_notifier->core_name = core_name[cpu];
-		handle = msm_dcvs_freq_sink_start(dcvs_notifier);
+		handle = msm_dcvs_freq_sink_start(gov->dcvs_core_id);
 		BUG_ON(handle < 0);
 		msm_gov_check_limits(policy);
 		mutex_unlock(&per_cpu(gov_mutex, cpu));
 		break;
 
 	case CPUFREQ_GOV_STOP:
-		msm_dcvs_freq_sink_stop(dcvs_notifier);
+		msm_dcvs_freq_sink_stop(gov->dcvs_core_id);
 		break;
 
 	case CPUFREQ_GOV_LIMITS:
@@ -260,7 +230,6 @@
 
 static int __devinit msm_gov_probe(struct platform_device *pdev)
 {
-	int ret = 0;
 	int cpu;
 	struct msm_dcvs_core_info *core = NULL;
 	struct msm_dcvs_core_info *core_info = NULL;
@@ -272,19 +241,25 @@
 	latency = pdata->latency;
 
 	for_each_possible_cpu(cpu) {
+		struct msm_gov *gov = &per_cpu(msm_gov_info, cpu);
+
 		mutex_init(&per_cpu(gov_mutex, cpu));
-		snprintf(core_name[cpu], 10, "cpu%d", cpu);
 		if (cpu < core->num_cores)
 			sensor = core_info->sensors[cpu];
-		ret = msm_dcvs_register_core(core_name[cpu], core_info,
+		gov->dcvs_core_id = msm_dcvs_register_core(
+						MSM_DCVS_CORE_TYPE_CPU,
+						cpu,
+						core_info,
 						msm_dcvs_freq_set,
 						msm_dcvs_freq_get,
 						msm_dcvs_idle_notifier,
 						sensor);
-		if (ret)
+		if (gov->dcvs_core_id < 0) {
 			pr_err("Unable to register core for %d\n", cpu);
+			return -EINVAL;
+		}
 
-		msm_gov_idle_source_init(cpu);
+		msm_gov_idle_source_init(cpu, gov->dcvs_core_id);
 	}
 
 	cpu_pm_register_notifier(&idle_nb);
@@ -294,11 +269,6 @@
 
 static int __devexit msm_gov_remove(struct platform_device *pdev)
 {
-	int cpu;
-
-	for_each_possible_cpu(cpu) {
-		msm_gov_idle_source_uninit(cpu);
-	}
 	platform_set_drvdata(pdev, NULL);
 	return 0;
 }