)]}'
{
  "commit": "daf4219dbcbb2efcd638fcd3c29a622e1c18cc38",
  "tree": "8683d86a8a8de2060c83aed7efe5f66b94027a2b",
  "parents": [
    "43a1a3ed6bf5a1b9ae197b4f5f20033baf19db61"
  ],
  "author": {
    "name": "Dan Williams",
    "email": "dan.j.williams@intel.com",
    "time": "Wed Jul 01 16:12:53 2009 -0700"
  },
  "committer": {
    "name": "Dan Williams",
    "email": "dan.j.williams@intel.com",
    "time": "Wed Jul 01 16:12:53 2009 -0700"
  },
  "message": "dmaengine: move HIGHMEM64G restriction to ASYNC_TX_DMA\n\nOn HIGHMEM64G systems dma_addr_t is known to be larger than (void *)\nwhich precludes async_xor from performing dma address conversions by\nreusing the input parameter address list.  However, other parts of the\ndmaengine infrastructure do not suffer this constraint, so the\nHIGHMEM64G restriction can be down-levelled.\n\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n\n\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "95fe2c8d6c516ea0325b9287df8775adb542cee7",
      "old_mode": 33188,
      "old_path": "crypto/async_tx/async_xor.c",
      "new_id": "90dd3f8bd283171ca725d75f7daae52fd0089ab1",
      "new_mode": 33188,
      "new_path": "crypto/async_tx/async_xor.c"
    },
    {
      "type": "modify",
      "old_id": "3b3c01b6f1ee34333d0f57f558f25560f76b2d44",
      "old_mode": 33188,
      "old_path": "drivers/dma/Kconfig",
      "new_id": "babf214a509bb2c4300377e7b5ecfbfa37def4a1",
      "new_mode": 33188,
      "new_path": "drivers/dma/Kconfig"
    }
  ]
}