)]}'
{
  "commit": "dc0ee6435cb92ccc81b14ff28d163fecc5a7f120",
  "tree": "0a494946593f36516a997f64cb299d898cdf463f",
  "parents": [
    "e1d181efb14a93cf263d6c588a5395518edf3294"
  ],
  "author": {
    "name": "Haavard Skinnemoen",
    "email": "haavard.skinnemoen@atmel.com",
    "time": "Tue Jul 08 11:59:35 2008 -0700"
  },
  "committer": {
    "name": "Dan Williams",
    "email": "dan.j.williams@intel.com",
    "time": "Tue Jul 08 11:59:35 2008 -0700"
  },
  "message": "dmaengine: Add slave DMA interface\n\nThis patch adds the necessary interfaces to the DMA Engine framework\nto use functionality found on most embedded DMA controllers: DMA from\nand to I/O registers with hardware handshaking.\n\nIn this context, hardware hanshaking means that the peripheral that\nowns the I/O registers in question is able to tell the DMA controller\nwhen more data is available for reading, or when there is room for\nmore data to be written. This usually happens internally on the chip,\nbut these signals may also be exported outside the chip for things\nlike IDE DMA, etc.\n\nA new struct dma_slave is introduced. This contains information that\nthe DMA engine driver needs to set up slave transfers to and from a\nslave device. Most engines supporting DMA slave transfers will want to\nextend this structure with controller-specific parameters.  This\nadditional information is usually passed from the platform/board code\nthrough the client driver.\n\nA \"slave\" pointer is added to the dma_client struct. This must point\nto a valid dma_slave structure iff the DMA_SLAVE capability is\nrequested.  The DMA engine driver may use this information in its\ndevice_alloc_chan_resources hook to configure the DMA controller for\nslave transfers from and to the given slave device.\n\nA new operation for preparing slave DMA transfers is added to struct\ndma_device. This takes a scatterlist and returns a single descriptor\nrepresenting the whole transfer.\n\nAnother new operation for terminating all pending transfers is added as\nwell. The latter is needed because there may be errors outside the scope\nof the DMA Engine framework that may require DMA operations to be\nterminated prematurely.\n\nDMA Engine drivers may extend the dma_device, dma_chan and/or\ndma_slave_descriptor structures to allow controller-specific\noperations. The client driver can detect such extensions by looking at\nthe DMA Engine\u0027s struct device, or it can request a specific DMA\nEngine device by setting the dma_dev field in struct dma_slave.\n\ndmaslave interface changes since v4:\n  * Fix checkpatch errors\n  * Fix changelog (there are no slave descriptors anymore)\n\ndmaslave interface changes since v3:\n  * Use dma_data_direction instead of a new enum\n  * Submit slave transfers as scatterlists\n  * Remove the DMA slave descriptor struct\n\ndmaslave interface changes since v2:\n  * Add a dma_dev field to struct dma_slave. If set, the client can\n    only be bound to the DMA controller that corresponds to this\n    device.  This allows controller-specific extensions of the\n    dma_slave structure; if the device matches, the controller may\n    safely assume its extensions are present.\n  * Move reg_width into struct dma_slave as there are currently no\n    users that need to be able to set the width on a per-transfer\n    basis.\n\ndmaslave interface changes since v1:\n  * Drop the set_direction and set_width descriptor hooks. Pass the\n    direction and width to the prep function instead.\n  * Declare a dma_slave struct with fixed information about a slave,\n    i.e. register addresses, handshake interfaces and such.\n  * Add pointer to a dma_slave struct to dma_client. Can be NULL if\n    the DMA_SLAVE capability isn\u0027t requested.\n  * Drop the set_slave device hook since the alloc_chan_resources hook\n    now has enough information to set up the channel for slave\n    transfers.\n\nAcked-by: Maciej Sosnowski \u003cmaciej.sosnowski@intel.com\u003e\nSigned-off-by: Haavard Skinnemoen \u003chaavard.skinnemoen@atmel.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "7344f5dbd50154076fd597126651470e67a2cdb9",
      "old_mode": 33188,
      "old_path": "drivers/dma/dmaengine.c",
      "new_id": "dc003a3a787d545207fed8be6e81bb4aacd970c1",
      "new_mode": 33188,
      "new_path": "drivers/dma/dmaengine.c"
    },
    {
      "type": "modify",
      "old_id": "b058d6360383f368925daf965adb191a1316c12d",
      "old_mode": 33188,
      "old_path": "include/linux/dmaengine.h",
      "new_id": "9b91d341e1fae4e3b398e157eaa16d85f5f6c47f",
      "new_mode": 33188,
      "new_path": "include/linux/dmaengine.h"
    }
  ]
}