)]}'
{
  "commit": "dcc1dd2366a7c355fd8b6543c52685b864a2044f",
  "tree": "c1fa5734246518c4cd0da82ec151eb905fd1b375",
  "parents": [
    "412e6a378260608bf28f29d4fa8a9241e0240a2d"
  ],
  "author": {
    "name": "Jack Steiner",
    "email": "steiner@sgi.com",
    "time": "Tue Feb 07 09:24:14 2006 -0800"
  },
  "committer": {
    "name": "Tony Luck",
    "email": "tony.luck@intel.com",
    "time": "Tue Feb 07 09:24:14 2006 -0800"
  },
  "message": "[IA64-SGI] - Eliminate SN pio_phys_xxx macros. Move to assembly\n\nRewrite the SN pio_phys_xxx macros in assembly language. This\navoids issues with the Intel icc compiler. Function call\noverhead is not an issue - the functions reference PIOs\nand take 100\u0027s nsec to complete.\n\nIn addition, the functions should likely be in assembly\nlanguage anyway - they reference memory using physical\naddressing mode. One function executes with psr.ic disabled.\n\nSigned-off-by: Jack Steiner \u003csteiner@sgi.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "3e9b4eea74185a32d3ea235d040213936996848f",
      "old_mode": 33188,
      "old_path": "arch/ia64/sn/kernel/Makefile",
      "new_id": "ab9c48c88012916a28deb08d1bcf7749b1ec02af",
      "new_mode": 33188,
      "new_path": "arch/ia64/sn/kernel/Makefile"
    },
    {
      "type": "add",
      "old_id": "0000000000000000000000000000000000000000",
      "old_mode": 0,
      "old_path": "/dev/null",
      "new_id": "3c7d48d6ecb81de85544a0001278e76a11da66c2",
      "new_mode": 33188,
      "new_path": "arch/ia64/sn/kernel/pio_phys.S"
    },
    {
      "type": "modify",
      "old_id": "f40fd1a5510d9a58d5937b4d4ae043048cecfb47",
      "old_mode": 33188,
      "old_path": "include/asm-ia64/sn/rw_mmr.h",
      "new_id": "2d78f4c5a45e216a3218616c4287625ae37eef73",
      "new_mode": 33188,
      "new_path": "include/asm-ia64/sn/rw_mmr.h"
    }
  ]
}