msm: kgsl: handle larger instruction store for adreno225
This GPU has a larger instruction store, so more memory
needs to be reserved for saving shader state when context
switching.
The initial vertex and pixel partitioning of the
instruction store also needs to be different.
Change-Id: If60c06467dd30d5bae07302a74eaf2687900b2b8
Signed-off-by: Jeremy Gebben <jgebben@codeaurora.org>
diff --git a/drivers/gpu/msm/adreno.c b/drivers/gpu/msm/adreno.c
index 7599894..b13190d 100644
--- a/drivers/gpu/msm/adreno.c
+++ b/drivers/gpu/msm/adreno.c
@@ -129,21 +129,28 @@
const char *pm4fw;
const char *pfpfw;
struct adreno_gpudev *gpudev;
+ unsigned int istore_size;
+ unsigned int pix_shader_start;
} adreno_gpulist[] = {
{ ADRENO_REV_A200, 0, 2, ANY_ID, ANY_ID,
- "yamato_pm4.fw", "yamato_pfp.fw", &adreno_a2xx_gpudev },
+ "yamato_pm4.fw", "yamato_pfp.fw", &adreno_a2xx_gpudev,
+ 512, 384},
{ ADRENO_REV_A205, 0, 1, 0, ANY_ID,
- "yamato_pm4.fw", "yamato_pfp.fw", &adreno_a2xx_gpudev },
+ "yamato_pm4.fw", "yamato_pfp.fw", &adreno_a2xx_gpudev,
+ 512, 384},
{ ADRENO_REV_A220, 2, 1, ANY_ID, ANY_ID,
- "leia_pm4_470.fw", "leia_pfp_470.fw", &adreno_a2xx_gpudev },
+ "leia_pm4_470.fw", "leia_pfp_470.fw", &adreno_a2xx_gpudev,
+ 512, 384},
/*
* patchlevel 5 (8960v2) needs special pm4 firmware to work around
* a hardware problem.
*/
{ ADRENO_REV_A225, 2, 2, 0, 5,
- "a225p5_pm4.fw", "a225_pfp.fw", &adreno_a2xx_gpudev },
+ "a225p5_pm4.fw", "a225_pfp.fw", &adreno_a2xx_gpudev,
+ 1536, 768 },
{ ADRENO_REV_A225, 2, 2, ANY_ID, ANY_ID,
- "a225_pm4.fw", "a225_pfp.fw", &adreno_a2xx_gpudev },
+ "a225_pm4.fw", "a225_pfp.fw", &adreno_a2xx_gpudev,
+ 1536, 768 },
};
static void adreno_gmeminit(struct adreno_device *adreno_dev)
@@ -413,6 +420,8 @@
adreno_dev->gpudev = adreno_gpulist[i].gpudev;
adreno_dev->pfp_fwfile = adreno_gpulist[i].pfpfw;
adreno_dev->pm4_fwfile = adreno_gpulist[i].pm4fw;
+ adreno_dev->istore_size = adreno_gpulist[i].istore_size;
+ adreno_dev->pix_shader_start = adreno_gpulist[i].pix_shader_start;
}
static int __devinit