)]}'
{
  "commit": "df95e42e1f20a561f2fe0a632d5b8fd6c26f1bb9",
  "tree": "fb323ff0928be60180c0fa6e069111de9361bb4b",
  "parents": [
    "b6378cb3e545912a19e6355aa9171326fdc004d8"
  ],
  "author": {
    "name": "Niklas Söderlund",
    "email": "niklas.soderlund@ericsson.com",
    "time": "Fri Dec 09 13:12:15 2011 -0300"
  },
  "committer": {
    "name": "Mauro Carvalho Chehab",
    "email": "mchehab@redhat.com",
    "time": "Wed Mar 21 15:22:49 2012 -0300"
  },
  "message": "edac: i5100 ack error detection register after each read\n\nIf I only ack the detection register after a error have been detected\nI\u0027m unable to reliably detect errors. I have verified this behavior\nusing both an error injection DIMM and software to inject errors.\n\nI can\u0027t find any documentation supporting this behavior in Intel 5100\nMemory Controller Hub Chipset, see 1. So this is all based on\nexperimentation.\n\n[1] Intel® 5100 Memory Controller Hub Chipset\n    http://www.intel.com/content/dam/doc/datasheet/5100-\n\tmemory-controller-hub-chipset-datasheet.pdf\n\nSigned-off-by: Niklas Söderlund \u003cniklas.soderlund@ericsson.com\u003e\nSigned-off-by: Mauro Carvalho Chehab \u003cmchehab@redhat.com\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "ab2f906198217c73519e1af7d6e8eed414d7a713",
      "old_mode": 33188,
      "old_path": "drivers/edac/i5100_edac.c",
      "new_id": "2a6e7ff1f020caf02fa2cd2ad7e6424c65a3a1e5",
      "new_mode": 33188,
      "new_path": "drivers/edac/i5100_edac.c"
    }
  ]
}