msm: copper: Add SPI ethernet device tree data
Add SPI device on BLSP1 in the SoC file and corresponding
gpios required for SPI ethernet on RUMI in the RUMI
specific device tree source file.
Update the TLMM base address of the gpio interrupt controller
node with the correct value.
Change-Id: Ic592ac819144318527e3fb638bbfd4b7d1db3fc7
Signed-off-by: Sathish Ambley <sambley@codeaurora.org>
diff --git a/arch/arm/boot/dts/msmcopper-rumi.dts b/arch/arm/boot/dts/msmcopper-rumi.dts
index 4e1e379..8c00535 100644
--- a/arch/arm/boot/dts/msmcopper-rumi.dts
+++ b/arch/arm/boot/dts/msmcopper-rumi.dts
@@ -46,6 +46,27 @@
status = "disable";
};
+ spi@f9923000 {
+ compatible = "qcom,spi-qup-v2";
+ reg = <0xf9923000 0x1000>;
+ interrupts = <0 95 0>;
+ spi-max-frequency = <24000000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ gpios = <&msmgpio 3 0>, /* CLK */
+ <&msmgpio 1 0>, /* MISO */
+ <&msmgpio 0 0>; /* MOSI */
+ cs-gpios = <&msmgpio 9 0>;
+
+ ethernet-switch@2 {
+ compatible = "simtec,ks8851";
+ reg = <2>;
+ interrupt-parent = <&msmgpio>;
+ interrupts = <90 0>;
+ spi-max-frequency = <5000000>;
+ };
+ };
+
slim@fe12f000 {
status = "disable";
};