)]}'
{
  "commit": "e080e9d66fd276ed34bc2834eedc134189b87fc9",
  "tree": "4bd582d2d9137df7bb7fa43c009e931941b25d01",
  "parents": [
    "5b22a3855127bb8221bc96e8e41064b3c5b2bf08"
  ],
  "author": {
    "name": "Jason Uhlenkott",
    "email": "jasonuhl@sgi.com",
    "time": "Wed Jan 11 22:45:51 2006 +0100"
  },
  "committer": {
    "name": "Linus Torvalds",
    "email": "torvalds@g5.osdl.org",
    "time": "Wed Jan 11 19:04:59 2006 -0800"
  },
  "message": "[PATCH] x86_64: Don\u0027t claim too many vectors for TLB flushing\n\nIt looks like the new scalable TLB flush code for x86_64 is claiming\none more IRQ vector than it actually uses.\n\nSigned-off-by: Jason Uhlenkott \u003cjasonuhl@sgi.com\u003e\nSigned-off-by: Andi Kleen \u003cak@suse.de\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "c14a8c7267a69b4230ca0b92a68ffa9db5686b92",
      "old_mode": 33188,
      "old_path": "include/asm-x86_64/hw_irq.h",
      "new_id": "b248930767e7d223197c4525ef846bd2b8ebfd9f",
      "new_mode": 33188,
      "new_path": "include/asm-x86_64/hw_irq.h"
    }
  ]
}