[MIPS] Rewrite all the assembler interrupt handlers to C.
Saves like 1,600 lines of code, is way easier to debug, compilers
frequently do a better job than the cut and paste type of handlers many
boards had. And finally having all the stuff done in a single place
also means alot of bug potencial for the MT ASE is gone.
The only surviving handler in assembler is the DECstation one; I hope
Maciej will rewrite it.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
diff --git a/arch/mips/au1000/common/Makefile b/arch/mips/au1000/common/Makefile
index a1edfd1..bf682f5 100644
--- a/arch/mips/au1000/common/Makefile
+++ b/arch/mips/au1000/common/Makefile
@@ -6,7 +6,7 @@
# Makefile for the Alchemy Au1000 CPU, generic files.
#
-obj-y += prom.o int-handler.o irq.o puts.o time.o reset.o \
+obj-y += prom.o irq.o puts.o time.o reset.o \
au1xxx_irqmap.o clocks.o platform.o power.o setup.o \
sleeper.o cputable.o dma.o dbdma.o gpio.o
diff --git a/arch/mips/au1000/common/int-handler.S b/arch/mips/au1000/common/int-handler.S
deleted file mode 100644
index 65baa8a..0000000
--- a/arch/mips/au1000/common/int-handler.S
+++ /dev/null
@@ -1,69 +0,0 @@
-/*
- * Copyright 2001 MontaVista Software Inc.
- * Author: ppopov@mvista.com
- *
- * Interrupt dispatcher for Au1000 boards.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- */
-#include <asm/asm.h>
-#include <asm/mipsregs.h>
-#include <asm/addrspace.h>
-#include <asm/regdef.h>
-#include <asm/stackframe.h>
-
- .text
- .set macro
- .set noat
- .align 5
-
-NESTED(au1000_IRQ, PT_SIZE, sp)
- SAVE_ALL
- CLI # Important: mark KERNEL mode !
-
- mfc0 t0,CP0_CAUSE # get pending interrupts
- mfc0 t1,CP0_STATUS # get enabled interrupts
- and t0,t1 # isolate allowed ones
-
- andi t0,0xff00 # isolate pending bits
- beqz t0, 3f # spurious interrupt
-
- andi a0, t0, CAUSEF_IP7
- beq a0, zero, 1f
- move a0, sp
- jal mips_timer_interrupt
- j ret_from_irq
-
-1:
- andi a0, t0, CAUSEF_IP2 # Interrupt Controller 0, Request 0
- beq a0, zero, 2f
- move a0,sp
- jal intc0_req0_irqdispatch
- j ret_from_irq
-2:
- andi a0, t0, CAUSEF_IP3 # Interrupt Controller 0, Request 1
- beq a0, zero, 3f
- move a0,sp
- jal intc0_req1_irqdispatch
- j ret_from_irq
-3:
- andi a0, t0, CAUSEF_IP4 # Interrupt Controller 1, Request 0
- beq a0, zero, 4f
- move a0,sp
- jal intc1_req0_irqdispatch
- j ret_from_irq
-4:
- andi a0, t0, CAUSEF_IP5 # Interrupt Controller 1, Request 1
- beq a0, zero, 5f
- move a0, sp
- jal intc1_req1_irqdispatch
- j ret_from_irq
-
-5:
- move a0, sp
- jal spurious_interrupt
- j ret_from_irq
-END(au1000_IRQ)
diff --git a/arch/mips/au1000/common/irq.c b/arch/mips/au1000/common/irq.c
index 1339a09..da61de7 100644
--- a/arch/mips/au1000/common/irq.c
+++ b/arch/mips/au1000/common/irq.c
@@ -66,7 +66,6 @@
#define EXT_INTC1_REQ1 5 /* IP 5 */
#define MIPS_TIMER_IP 7 /* IP 7 */
-extern asmlinkage void au1000_IRQ(void);
extern void set_debug_traps(void);
extern irq_cpustat_t irq_stat [NR_CPUS];
@@ -446,7 +445,6 @@
extern int au1xxx_ic0_nr_irqs;
cp0_status = read_c0_status();
- set_except_vector(0, au1000_IRQ);
/* Initialize interrupt controllers to a safe state.
*/
@@ -661,3 +659,21 @@
au_writel(sleep_intctl_mask[0], IC0_MASKSET); au_sync();
}
#endif /* CONFIG_PM */
+
+asmlinkage void plat_irq_dispatch(struct pt_regs *regs)
+{
+ unsigned int pending = read_c0_status() & read_c0_cause() & ST0_IM;
+
+ if (pending & CAUSEF_IP7)
+ mips_timer_interrupt(regs);
+ else if (pending & CAUSEF_IP2)
+ intc0_req0_irqdispatch(regs);
+ else if (pending & CAUSEF_IP3)
+ intc0_req1_irqdispatch(regs);
+ else if (pending & CAUSEF_IP4)
+ intc1_req0_irqdispatch(regs);
+ else if (pending & CAUSEF_IP5)
+ intc1_req1_irqdispatch(regs);
+ else
+ spurious_interrupt(regs);
+}