[MIPS] Rewrite all the assembler interrupt handlers to C.

Saves like 1,600 lines of code, is way easier to debug, compilers
frequently do a better job than the cut and paste type of handlers many
boards had.  And finally having all the stuff done in a single place
also means alot of bug potencial for the MT ASE is gone.

The only surviving handler in assembler is the DECstation one; I hope
Maciej will rewrite it.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
diff --git a/arch/mips/pmc-sierra/yosemite/Makefile b/arch/mips/pmc-sierra/yosemite/Makefile
index ae96a71..e931e0d 100644
--- a/arch/mips/pmc-sierra/yosemite/Makefile
+++ b/arch/mips/pmc-sierra/yosemite/Makefile
@@ -2,7 +2,7 @@
 # Makefile for the PMC-Sierra Titan
 #
 
-obj-y    += irq-handler.o irq.o i2c-yosemite.o prom.o py-console.o setup.o
+obj-y    += irq.o i2c-yosemite.o prom.o py-console.o setup.o
 
 obj-$(CONFIG_KGDB)		+= dbg_io.o
 obj-$(CONFIG_SMP)		+= smp.o
diff --git a/arch/mips/pmc-sierra/yosemite/irq-handler.S b/arch/mips/pmc-sierra/yosemite/irq-handler.S
deleted file mode 100644
index 33b9c40..0000000
--- a/arch/mips/pmc-sierra/yosemite/irq-handler.S
+++ /dev/null
@@ -1,93 +0,0 @@
-/*
- * Copyright 2003, 04 PMC-Sierra Inc.
- * Author: Manish Lachwani (lachwani@pmc-sierra.com
- * Copyright 2004 Ralf Baechle (ralf@linux-mips.org)
- *
- * First-level interrupt router for the PMC-Sierra Titan board
- *
- * This program is free software; you can redistribute  it and/or modify it
- * under  the terms of  the GNU General  Public License as published by the
- * Free Software Foundation;  either version 2 of the  License, or (at your
- * option) any later version.
- *
- * Titan supports Hypertransport or PCI but not both. Hence, one interrupt
- * line is shared between the PCI slot A and Hypertransport. This is the
- * Processor INTB #0.
- */
-
-#include <linux/config.h>
-#include <asm/asm.h>
-#include <asm/mipsregs.h>
-#include <asm/addrspace.h>
-#include <asm/regdef.h>
-#include <asm/stackframe.h>
-
-		.align	5
-		NESTED(titan_handle_int, PT_SIZE, sp)
-		SAVE_ALL
-		CLI
-		.set	at
-		.set	noreorder
-		la	ra, ret_from_irq
-		mfc0	t0, CP0_CAUSE
-		mfc0	t2, CP0_STATUS
-
-		and	t0, t2
-
-		andi	t2, t0, STATUSF_IP7	/* INTB5 hardware line */
-		bnez	t2, ll_timer_irq	/* Timer */
-		andi	t1, t0, STATUSF_IP2	/* INTB0 hardware line */
-		bnez	t1, ll_pcia_irq		/* 64-bit PCI */
-		andi	t2, t0, STATUSF_IP3	/* INTB1 hardware line */
-		bnez	t2, ll_pcib_irq		/* second 64-bit PCI slot */
-		andi	t1, t0, STATUSF_IP4	/* INTB2 hardware line */
-		bnez	t1, ll_duart_irq	/* UART	*/
-		andi    t2, t0, STATUSF_IP5	/* SMP inter-core interrupts */
-		bnez    t2, ll_smp_irq
-		andi	t1, t0, STATUSF_IP6
-		bnez	t1, ll_ht_irq		/* Hypertransport */
-
-		move	a0, sp
-		j	do_extended_irq
-		END(titan_handle_int)
-
-		.set	reorder
-		.align	5
-
-ll_pcia_irq:
-		li	a0, 2
-		move	a1, sp
-#ifdef CONFIG_HYPERTRANSPORT
-		j	ll_ht_smp_irq_handler
-#else
-		j	do_IRQ
-#endif
-
-ll_pcib_irq:
-		li	a0, 3
-		move	a1, sp
-		j	do_IRQ
-
-ll_duart_irq:
-		li	a0, 4
-		move	a1, sp
-		j	do_IRQ
-
-ll_smp_irq:
-		li	a0, 5
-		move	a1, sp
-#ifdef CONFIG_SMP
-		j	titan_mailbox_irq
-#else
-		j	do_IRQ
-#endif
-
-ll_ht_irq:
-		li	a0, 6
-		move	a1, sp
-		j	ll_ht_smp_irq_handler
-
-ll_timer_irq:
-		li	a0, 7
-		move	a1, sp
-		j	do_IRQ
diff --git a/arch/mips/pmc-sierra/yosemite/irq.c b/arch/mips/pmc-sierra/yosemite/irq.c
index f4e2897..a1f524f 100644
--- a/arch/mips/pmc-sierra/yosemite/irq.c
+++ b/arch/mips/pmc-sierra/yosemite/irq.c
@@ -2,6 +2,8 @@
  * Copyright (C) 2003 PMC-Sierra Inc.
  * Author: Manish Lachwani (lachwani@pmc-sierra.com)
  *
+ * Copyright (C) 2006 Ralf Baechle (ralf@linux-mips.org)
+ *
  *  This program is free software; you can redistribute  it and/or modify it
  *  under  the terms of  the GNU General  Public License as published by the
  *  Free Software Foundation;  either version 2 of the  License, or (at your
@@ -55,7 +57,6 @@
 #define HYPERTRANSPORT_INTC     0x7a		/* INTC# */
 #define HYPERTRANSPORT_INTD     0x7b		/* INTD# */
 
-extern asmlinkage void titan_handle_int(void);
 extern void jaguar_mailbox_irq(struct pt_regs *);
 
 /*
@@ -125,6 +126,35 @@
 
 }
 
+asmlinkage void plat_irq_dispatch(struct pt_regs *regs)
+{
+	unsigned int cause = read_c0_cause();
+	unsigned int status = read_c0_status();
+	unsigned int pending = cause & status;
+
+	if (pending & STATUSF_IP7) {
+		do_IRQ(7, regs);
+	} else if (pending & STATUSF_IP2) {
+#ifdef CONFIG_HYPERTRANSPORT
+		ll_ht_smp_irq_handler(2, regs);
+#else
+		do_IRQ(2, regs);
+#endif
+	} else if (pending & STATUSF_IP3) {
+		do_IRQ(3, regs);
+	} else if (pending & STATUSF_IP4) {
+		do_IRQ(4, regs);
+	} else if (pending & STATUSF_IP5) {
+#ifdef CONFIG_SMP
+		titan_mailbox_irq(regs);
+#else
+		do_IRQ(5, regs);
+#endif
+	} else if (pending & STATUSF_IP6) {
+		do_IRQ(4, regs);
+	}
+}
+
 #ifdef CONFIG_KGDB
 extern void init_second_port(void);
 #endif
@@ -136,7 +166,6 @@
 {
 	clear_c0_status(ST0_IM);
 
-	set_except_vector(0, titan_handle_int);
 	mips_cpu_irq_init(0);
 	rm7k_cpu_irq_init(8);
 	rm9k_cpu_irq_init(12);