)]}'
{
  "commit": "e650ce0f083ff9354a10ad66e6bf8c193e8a2755",
  "tree": "60452f8a170bdb7d39cff836dd2fc4fe7de605a1",
  "parents": [
    "7716e6548abed1582a7759666e79d5c612a906c7"
  ],
  "author": {
    "name": "David Daney",
    "email": "ddaney@caviumnetworks.com",
    "time": "Thu Feb 17 14:47:52 2011 -0800"
  },
  "committer": {
    "name": "Ralf Baechle",
    "email": "ralf@linux-mips.org",
    "time": "Thu May 19 09:55:49 2011 +0100"
  },
  "message": "MIPS: Octeon: Don\u0027t request interrupts for unused IPI mailbox bits.\n\nWe only use the three low-order mailbox bits.  Leave the upper bits alone\nfor possible use by drivers and other software.\n\nSigned-off-by: David Daney \u003cddaney@caviumnetworks.com\u003e\nTo: linux-mips@linux-mips.org\nPatchwork: https://patchwork.linux-mips.org/patch/2090/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "ba78b21cc8d0496b7be966550c9612d3a547ad4e",
      "old_mode": 33188,
      "old_path": "arch/mips/cavium-octeon/smp.c",
      "new_id": "716fae6f941a2fb63a5bf5751f46bf136e9a54a2",
      "new_mode": 33188,
      "new_path": "arch/mips/cavium-octeon/smp.c"
    }
  ]
}