[Blackfin] arch: Functional power management support: Add support for cpu frequency scaling
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
diff --git a/arch/blackfin/kernel/time-ts.c b/arch/blackfin/kernel/time-ts.c
index 1ce8cb1..4482c47 100644
--- a/arch/blackfin/kernel/time-ts.c
+++ b/arch/blackfin/kernel/time-ts.c
@@ -16,11 +16,35 @@
#include <linux/irq.h>
#include <linux/clocksource.h>
#include <linux/clockchips.h>
+#include <linux/cpufreq.h>
#include <asm/blackfin.h>
+#include <asm/time.h>
#ifdef CONFIG_CYCLES_CLOCKSOURCE
+/* Accelerators for sched_clock()
+ * convert from cycles(64bits) => nanoseconds (64bits)
+ * basic equation:
+ * ns = cycles / (freq / ns_per_sec)
+ * ns = cycles * (ns_per_sec / freq)
+ * ns = cycles * (10^9 / (cpu_khz * 10^3))
+ * ns = cycles * (10^6 / cpu_khz)
+ *
+ * Then we use scaling math (suggested by george@mvista.com) to get:
+ * ns = cycles * (10^6 * SC / cpu_khz) / SC
+ * ns = cycles * cyc2ns_scale / SC
+ *
+ * And since SC is a constant power of two, we can convert the div
+ * into a shift.
+ *
+ * We can use khz divisor instead of mhz to keep a better precision, since
+ * cyc2ns_scale is limited to 10^6 * 2^10, which fits in 32 bits.
+ * (mathieu.desnoyers@polymtl.ca)
+ *
+ * -johnstul@us.ibm.com "math is hard, lets go shopping!"
+ */
+
static unsigned long cyc2ns_scale;
#define CYC2NS_SCALE_FACTOR 10 /* 2^10, carefully chosen */
@@ -82,8 +106,9 @@
{
switch (mode) {
case CLOCK_EVT_MODE_PERIODIC: {
- unsigned long tcount = ((get_cclk() / (HZ * 1)) - 1);
+ unsigned long tcount = ((get_cclk() / (HZ * TIME_SCALE)) - 1);
bfin_write_TCNTL(TMPWR);
+ bfin_write_TSCALE(TIME_SCALE - 1);
CSYNC();
bfin_write_TPERIOD(tcount);
bfin_write_TCOUNT(tcount);
@@ -92,6 +117,7 @@
break;
}
case CLOCK_EVT_MODE_ONESHOT:
+ bfin_write_TSCALE(0);
bfin_write_TCOUNT(0);
bfin_write_TCNTL(TMPWR | TMREN);
CSYNC();
@@ -115,7 +141,7 @@
/*
* the TSCALE prescaler counter.
*/
- bfin_write_TSCALE(0);
+ bfin_write_TSCALE(TIME_SCALE - 1);
bfin_write_TPERIOD(0);
bfin_write_TCOUNT(0);
diff --git a/arch/blackfin/kernel/time.c b/arch/blackfin/kernel/time.c
index 715b394..eb23523 100644
--- a/arch/blackfin/kernel/time.c
+++ b/arch/blackfin/kernel/time.c
@@ -6,9 +6,10 @@
* Created:
* Description: This file contains the bfin-specific time handling details.
* Most of the stuff is located in the machine specific files.
+ * FIXME: (This file is subject for removal)
*
* Modified:
- * Copyright 2004-2006 Analog Devices Inc.
+ * Copyright 2004-2008 Analog Devices Inc.
*
* Bugs: Enter bugs at http://blackfin.uclinux.org/
*
@@ -35,6 +36,7 @@
#include <linux/irq.h>
#include <asm/blackfin.h>
+#include <asm/time.h>
/* This is an NTP setting */
#define TICK_SIZE (tick_nsec / 1000)
@@ -47,21 +49,6 @@
.flags = IRQF_DISABLED
};
-/*
- * The way that the Blackfin core timer works is:
- * - CCLK is divided by a programmable 8-bit pre-scaler (TSCALE)
- * - Every time TSCALE ticks, a 32bit is counted down (TCOUNT)
- *
- * If you take the fastest clock (1ns, or 1GHz to make the math work easier)
- * 10ms is 10,000,000 clock ticks, which fits easy into a 32-bit counter
- * (32 bit counter is 4,294,967,296ns or 4.2 seconds) so, we don't need
- * to use TSCALE, and program it to zero (which is pass CCLK through).
- * If you feel like using it, try to keep HZ * TIMESCALE to some
- * value that divides easy (like power of 2).
- */
-
-#define TIME_SCALE 1
-
static void
time_sched_init(irq_handler_t timer_routine)
{