diff --git a/drivers/gpio/gpio-msm-v2.c b/drivers/gpio/gpio-msm-v2.c
index bac9f8a..943a4a2 100644
--- a/drivers/gpio/gpio-msm-v2.c
+++ b/drivers/gpio/gpio-msm-v2.c
@@ -149,10 +149,8 @@
 {
 	if (val) {
 		set_gpio_bits(INTR_ENABLE, GPIO_INTR_CFG(gpio));
-		__raw_writel(TARGET_PROC_SCORPION, GPIO_INTR_CFG_SU(gpio));
 
 	} else {
-		__raw_writel(TARGET_PROC_NONE, GPIO_INTR_CFG_SU(gpio));
 		clr_gpio_bits(INTR_ENABLE, GPIO_INTR_CFG(gpio));
 	}
 }
@@ -161,6 +159,15 @@
 {
 	unsigned cfg;
 
+	/* RAW_STATUS_EN is left on for all gpio irqs. Due to the
+	 * internal circuitry of TLMM, toggling the RAW_STATUS
+	 * could cause the INTR_STATUS to be set for EDGE interrupts.
+	 */
+	cfg  = __msm_gpio_get_intr_config(gpio);
+	cfg |= INTR_RAW_STATUS_EN;
+	__raw_writel(cfg, GPIO_INTR_CFG(gpio));
+	__raw_writel(TARGET_PROC_SCORPION, GPIO_INTR_CFG_SU(gpio));
+
 	cfg  = __msm_gpio_get_intr_config(gpio);
 	if (type & IRQ_TYPE_EDGE_BOTH)
 		cfg |= INTR_DECT_CTL_EDGE;
@@ -172,23 +179,13 @@
 	else
 		cfg &= ~INTR_POL_CTL_HI;
 
-	/* RAW_STATUS_EN is left on for all gpio irqs. Due to the
-	 * internal circuitry of TLMM, toggling the RAW_STATUS
-	 * could cause the INTR_STATUS to be set for EDGE interrupts.
-	 */
-	cfg |= INTR_RAW_STATUS_EN;
 	__raw_writel(cfg, GPIO_INTR_CFG(gpio));
-
 	/* Sometimes it might take a little while to update
 	 * the interrupt status after the RAW_STATUS is enabled
+	 * We clear the interrupt status before enabling the
+	 * interrupt in the unmask call-back.
 	 */
 	udelay(5);
-
-	/* Clear the interrupt status to clear out any spurious
-	 * irq as a result of the above operation
-	 */
-	__msm_gpio_set_intr_status(gpio);
-
 }
 
 void __gpio_tlmm_config(unsigned config)