|  | /* | 
|  | * Copyright (C) 2008 Google, Inc. | 
|  | * Copyright (c) 2008-2010, Code Aurora Forum. All rights reserved. | 
|  | * | 
|  | * This software is licensed under the terms of the GNU General Public | 
|  | * License version 2, as published by the Free Software Foundation, and | 
|  | * may be copied, distributed, and modified under those terms. | 
|  | * | 
|  | * This program is distributed in the hope that it will be useful, | 
|  | * but WITHOUT ANY WARRANTY; without even the implied warranty of | 
|  | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the | 
|  | * GNU General Public License for more details. | 
|  | * | 
|  | */ | 
|  |  | 
|  | #include <linux/kernel.h> | 
|  | #include <linux/platform_device.h> | 
|  |  | 
|  | #include <linux/dma-mapping.h> | 
|  | #include <mach/irqs.h> | 
|  | #include <mach/msm_iomap.h> | 
|  | #include <mach/dma.h> | 
|  | #include <mach/board.h> | 
|  |  | 
|  | #include "devices.h" | 
|  |  | 
|  | #include <asm/mach/flash.h> | 
|  |  | 
|  | #include <mach/mmc.h> | 
|  |  | 
|  | static struct resource resources_uart3[] = { | 
|  | { | 
|  | .start	= INT_UART3, | 
|  | .end	= INT_UART3, | 
|  | .flags	= IORESOURCE_IRQ, | 
|  | }, | 
|  | { | 
|  | .start	= MSM_UART3_PHYS, | 
|  | .end	= MSM_UART3_PHYS + MSM_UART3_SIZE - 1, | 
|  | .flags	= IORESOURCE_MEM, | 
|  | }, | 
|  | }; | 
|  |  | 
|  | struct platform_device msm_device_uart3 = { | 
|  | .name	= "msm_serial", | 
|  | .id	= 2, | 
|  | .num_resources	= ARRAY_SIZE(resources_uart3), | 
|  | .resource	= resources_uart3, | 
|  | }; | 
|  |  | 
|  | struct clk msm_clocks_8x50[] = { | 
|  | CLK_PCOM("adm_clk",	ADM_CLK,	NULL, 0), | 
|  | CLK_PCOM("ebi1_clk",	EBI1_CLK,	NULL, CLK_MIN), | 
|  | CLK_PCOM("ebi2_clk",	EBI2_CLK,	NULL, 0), | 
|  | CLK_PCOM("ecodec_clk",	ECODEC_CLK,	NULL, 0), | 
|  | CLK_PCOM("emdh_clk",	EMDH_CLK,	NULL, OFF | CLK_MINMAX), | 
|  | CLK_PCOM("gp_clk",	GP_CLK,		NULL, 0), | 
|  | CLK_PCOM("grp_clk",	GRP_3D_CLK,	NULL, 0), | 
|  | CLK_PCOM("icodec_rx_clk",	ICODEC_RX_CLK,	NULL, 0), | 
|  | CLK_PCOM("icodec_tx_clk",	ICODEC_TX_CLK,	NULL, 0), | 
|  | CLK_PCOM("imem_clk",	IMEM_CLK,	NULL, OFF), | 
|  | CLK_PCOM("mdc_clk",	MDC_CLK,	NULL, 0), | 
|  | CLK_PCOM("mddi_clk",	PMDH_CLK,	NULL, OFF | CLK_MINMAX), | 
|  | CLK_PCOM("mdp_clk",	MDP_CLK,	NULL, OFF), | 
|  | CLK_PCOM("mdp_lcdc_pclk_clk", MDP_LCDC_PCLK_CLK, NULL, 0), | 
|  | CLK_PCOM("mdp_lcdc_pad_pclk_clk", MDP_LCDC_PAD_PCLK_CLK, NULL, 0), | 
|  | CLK_PCOM("mdp_vsync_clk",	MDP_VSYNC_CLK,	NULL, 0), | 
|  | CLK_PCOM("pbus_clk",	PBUS_CLK,	NULL, CLK_MIN), | 
|  | CLK_PCOM("pcm_clk",	PCM_CLK,	NULL, 0), | 
|  | CLK_PCOM("sdac_clk",	SDAC_CLK,	NULL, OFF), | 
|  | CLK_PCOM("spi_clk",	SPI_CLK,	NULL, 0), | 
|  | CLK_PCOM("tsif_clk",	TSIF_CLK,	NULL, 0), | 
|  | CLK_PCOM("tsif_ref_clk",	TSIF_REF_CLK,	NULL, 0), | 
|  | CLK_PCOM("tv_dac_clk",	TV_DAC_CLK,	NULL, 0), | 
|  | CLK_PCOM("tv_enc_clk",	TV_ENC_CLK,	NULL, 0), | 
|  | CLK_PCOM("uart_clk",	UART3_CLK,	&msm_device_uart3.dev, OFF), | 
|  | CLK_PCOM("usb_hs_clk",	USB_HS_CLK,	NULL, OFF), | 
|  | CLK_PCOM("usb_hs_pclk",	USB_HS_P_CLK,	NULL, OFF), | 
|  | CLK_PCOM("usb_otg_clk",	USB_OTG_CLK,	NULL, 0), | 
|  | CLK_PCOM("vdc_clk",	VDC_CLK,	NULL, OFF | CLK_MIN), | 
|  | CLK_PCOM("vfe_clk",	VFE_CLK,	NULL, OFF), | 
|  | CLK_PCOM("vfe_mdc_clk",	VFE_MDC_CLK,	NULL, OFF), | 
|  | CLK_PCOM("vfe_axi_clk",	VFE_AXI_CLK,	NULL, OFF), | 
|  | CLK_PCOM("usb_hs2_clk",	USB_HS2_CLK,	NULL, OFF), | 
|  | CLK_PCOM("usb_hs2_pclk",	USB_HS2_P_CLK,	NULL, OFF), | 
|  | CLK_PCOM("usb_hs3_clk",	USB_HS3_CLK,	NULL, OFF), | 
|  | CLK_PCOM("usb_hs3_pclk",	USB_HS3_P_CLK,	NULL, OFF), | 
|  | CLK_PCOM("usb_phy_clk",	USB_PHY_CLK,	NULL, 0), | 
|  | }; | 
|  |  | 
|  | unsigned msm_num_clocks_8x50 = ARRAY_SIZE(msm_clocks_8x50); | 
|  |  |