commit f0ce9ae61d8641ca14991138f25aacd2e599259b
author Rohit Vaswani <rvaswani@codeaurora.org> Tue Aug 23 22:18:38 2011 -0700
committer Bryan Huntsman <bryanh@codeaurora.org> Mon Oct 03 16:18:36 2011 -0700
tree f3c8cac75e624091230b59b1489f265ac10a8b83
parent 3cd6da5cbebfe64a240235d372a54ff9f3b87858

msm: 9615: Enable L2 cache for MSM9615

Add support to enable L2 cache for MSM9615. It uses the
PL310 L2 cache controller.

Signed-off-by: Rohit Vaswani <rvaswani@codeaurora.org>

Conflicts:

	arch/arm/mm/Kconfig

arch/arm/mach-msm/devices-9615.c

diff --git a/arch/arm/mach-msm/devices-9615.c b/arch/arm/mach-msm/devices-9615.c
index 4578517..3bc950e 100644
--- a/arch/arm/mach-msm/devices-9615.c
+++ b/arch/arm/mach-msm/devices-9615.c
@@ -20,6 +20,7 @@
 #include <mach/msm_iomap.h>
 #include <mach/irqs.h>
 #include <mach/socinfo.h>
+#include <asm/hardware/cache-l2x0.h>
 #include "devices.h"
 
 #define MSM_GSBI4_PHYS		0x16300000
@@ -52,6 +53,28 @@
 	.resource	= resources_uart_gsbi4,
 };
 
+#ifdef CONFIG_CACHE_L2X0
+static int __init l2x0_cache_init(void)
+{
+	int aux_ctrl = 0;
+
+	/* Way Size 010(0x2) 32KB */
+	aux_ctrl = (0x1 << L2X0_AUX_CTRL_SHARE_OVERRIDE_SHIFT) | \
+		   (0x2 << L2X0_AUX_CTRL_WAY_SIZE_SHIFT) | \
+		   (0x1 << L2X0_AUX_CTRL_EVNT_MON_BUS_EN_SHIFT);
+
+	/* L2 Latency setting required by hardware. Default is 0x20
+	   which is no good.
+	 */
+	writel_relaxed(0x220, MSM_L2CC_BASE + L2X0_DATA_LATENCY_CTRL);
+	l2x0_init(MSM_L2CC_BASE, aux_ctrl, L2X0_AUX_CTRL_MASK);
+
+	return 0;
+}
+#else
+static int __init l2x0_cache_init(void){ return 0; }
+#endif
+
 void __init msm9615_device_init(void)
 {
 	if (socinfo_init() < 0)
@@ -63,6 +86,7 @@
 void __init msm9615_map_io(void)
 {
 	msm_map_msm9615_io();
+	l2x0_cache_init();
 }
 
 void __init msm9615_init_irq(void)

arch/arm/mm/Kconfig

diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig
index e862f63..518e900 100644
--- a/arch/arm/mm/Kconfig
+++ b/arch/arm/mm/Kconfig
@@ -837,7 +837,8 @@
 	depends on REALVIEW_EB_ARM11MP || MACH_REALVIEW_PB11MP || MACH_REALVIEW_PB1176 || \
 		   REALVIEW_EB_A9MP || SOC_IMX35 || SOC_IMX31 || MACH_REALVIEW_PBX || \
 		   ARCH_NOMADIK || ARCH_OMAP4 || ARCH_EXYNOS4 || ARCH_TEGRA || \
-		   ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || ARCH_SHMOBILE || ARCH_MSM7X27
+		   ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || ARCH_SHMOBILE || ARCH_MSM7X27 || \
+		   ARCH_MSM9615
 	default y
 	select OUTER_CACHE
 	select OUTER_CACHE_SYNC