Merge commit 'AU_LINUX_ANDROID_ICS.04.00.04.00.126' into msm-3.4
AU_LINUX_ANDROID_ICS.04.00.04.00.126 from msm-3.0.
First parent is from google/android-3.4.
* commit 'AU_LINUX_ANDROID_ICS.04.00.04.00.126': (8712 commits)
PRNG: Device tree entry for qrng device.
vidc:1080p: Set video core timeout value for Thumbnail mode
msm: sps: improve the debugging support in SPS driver
board-8064 msm: Overlap secure and non secure video firmware heaps.
msm: clock: Add handoff ops for 7x30 and copper XO clocks
msm_fb: display: Wait for external vsync before DTV IOMMU unmap
msm: Fix ciruclar dependency in debug UART settings
msm: gdsc: Add GDSC regulator driver for msm-copper
defconfig: Enable Mobicore Driver.
mobicore: Add mobicore driver.
mobicore: rename variable to lower case.
mobicore: rename folder.
mobicore: add makefiles
mobicore: initial import of kernel driver
ASoC: msm: Add SLIMBUS_2_RX CPU DAI
board-8064-gpio: Update FUNC for EPM SPI CS
msm_fb: display: Remove chicken bit config during video playback
mmc: msm_sdcc: enable the sanitize capability
msm-fb: display: lm2 writeback support on mpq platfroms
msm_fb: display: Disable LVDS phy & pll during panel off
...
Signed-off-by: Steve Muckle <smuckle@codeaurora.org>
diff --git a/arch/arm/mach-msm/board-msm7x27a.c b/arch/arm/mach-msm/board-msm7x27a.c
new file mode 100644
index 0000000..6ecd1e3
--- /dev/null
+++ b/arch/arm/mach-msm/board-msm7x27a.c
@@ -0,0 +1,1261 @@
+/* Copyright (c) 2011-2012, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/gpio_event.h>
+#include <linux/memblock.h>
+#include <asm/mach-types.h>
+#include <linux/memblock.h>
+#include <asm/mach/arch.h>
+#include <asm/hardware/gic.h>
+#include <mach/board.h>
+#include <mach/msm_iomap.h>
+#include <mach/msm_hsusb.h>
+#include <mach/rpc_hsusb.h>
+#include <mach/rpc_pmapp.h>
+#include <mach/usbdiag.h>
+#include <mach/msm_memtypes.h>
+#include <mach/msm_serial_hs.h>
+#include <linux/usb/android.h>
+#include <linux/platform_device.h>
+#include <linux/io.h>
+#include <linux/gpio.h>
+#include <mach/vreg.h>
+#include <mach/pmic.h>
+#include <mach/socinfo.h>
+#include <linux/mtd/nand.h>
+#include <linux/mtd/partitions.h>
+#include <asm/mach/mmc.h>
+#include <linux/i2c.h>
+#include <linux/i2c/sx150x.h>
+#include <linux/gpio.h>
+#include <linux/android_pmem.h>
+#include <linux/bootmem.h>
+#include <linux/mfd/marimba.h>
+#include <mach/vreg.h>
+#include <linux/power_supply.h>
+#include <linux/regulator/consumer.h>
+#include <mach/rpc_pmapp.h>
+#include <mach/msm_battery.h>
+#include <linux/smsc911x.h>
+#include <linux/atmel_maxtouch.h>
+#include <linux/fmem.h>
+#include <linux/msm_adc.h>
+#include "devices.h"
+#include "timer.h"
+#include "board-msm7x27a-regulator.h"
+#include "devices-msm7x2xa.h"
+#include "pm.h"
+#include <mach/rpc_server_handset.h>
+#include <mach/socinfo.h>
+#include "pm-boot.h"
+#include "board-msm7627a.h"
+
+#define PMEM_KERNEL_EBI1_SIZE 0x3A000
+#define MSM_PMEM_AUDIO_SIZE 0x1F4000
+
+#if defined(CONFIG_GPIO_SX150X)
+enum {
+ SX150X_CORE,
+};
+
+static struct sx150x_platform_data sx150x_data[] __initdata = {
+ [SX150X_CORE] = {
+ .gpio_base = GPIO_CORE_EXPANDER_BASE,
+ .oscio_is_gpo = false,
+ .io_pullup_ena = 0,
+ .io_pulldn_ena = 0x02,
+ .io_open_drain_ena = 0xfef8,
+ .irq_summary = -1,
+ },
+};
+#endif
+
+
+#if defined(CONFIG_BT) && defined(CONFIG_MARIMBA_CORE)
+static struct platform_device msm_wlan_ar6000_pm_device = {
+ .name = "wlan_ar6000_pm_dev",
+ .id = -1,
+};
+#endif
+
+#if defined(CONFIG_I2C) && defined(CONFIG_GPIO_SX150X)
+static struct i2c_board_info core_exp_i2c_info[] __initdata = {
+ {
+ I2C_BOARD_INFO("sx1509q", 0x3e),
+ },
+};
+
+static void __init register_i2c_devices(void)
+{
+ if (machine_is_msm7x27a_surf() || machine_is_msm7625a_surf() ||
+ machine_is_msm8625_surf())
+ sx150x_data[SX150X_CORE].io_open_drain_ena = 0xe0f0;
+
+ core_exp_i2c_info[0].platform_data =
+ &sx150x_data[SX150X_CORE];
+
+ i2c_register_board_info(MSM_GSBI1_QUP_I2C_BUS_ID,
+ core_exp_i2c_info,
+ ARRAY_SIZE(core_exp_i2c_info));
+}
+#endif
+
+static struct msm_gpio qup_i2c_gpios_io[] = {
+ { GPIO_CFG(60, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
+ "qup_scl" },
+ { GPIO_CFG(61, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
+ "qup_sda" },
+ { GPIO_CFG(131, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
+ "qup_scl" },
+ { GPIO_CFG(132, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
+ "qup_sda" },
+};
+
+static struct msm_gpio qup_i2c_gpios_hw[] = {
+ { GPIO_CFG(60, 1, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
+ "qup_scl" },
+ { GPIO_CFG(61, 1, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
+ "qup_sda" },
+ { GPIO_CFG(131, 2, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
+ "qup_scl" },
+ { GPIO_CFG(132, 2, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
+ "qup_sda" },
+};
+
+static void gsbi_qup_i2c_gpio_config(int adap_id, int config_type)
+{
+ int rc;
+
+ if (adap_id < 0 || adap_id > 1)
+ return;
+
+ /* Each adapter gets 2 lines from the table */
+ if (config_type)
+ rc = msm_gpios_request_enable(&qup_i2c_gpios_hw[adap_id*2], 2);
+ else
+ rc = msm_gpios_request_enable(&qup_i2c_gpios_io[adap_id*2], 2);
+ if (rc < 0)
+ pr_err("QUP GPIO request/enable failed: %d\n", rc);
+}
+
+static struct msm_i2c_platform_data msm_gsbi0_qup_i2c_pdata = {
+ .clk_freq = 100000,
+ .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
+};
+
+static struct msm_i2c_platform_data msm_gsbi1_qup_i2c_pdata = {
+ .clk_freq = 100000,
+ .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
+};
+
+#ifdef CONFIG_ARCH_MSM7X27A
+#define MSM_PMEM_MDP_SIZE 0x2300000
+#define MSM7x25A_MSM_PMEM_MDP_SIZE 0x1500000
+
+#define MSM_PMEM_ADSP_SIZE 0x1100000
+#define MSM7x25A_MSM_PMEM_ADSP_SIZE 0xB91000
+
+#endif
+
+static struct android_usb_platform_data android_usb_pdata = {
+ .update_pid_and_serial_num = usb_diag_update_pid_and_serial_num,
+};
+
+static struct platform_device android_usb_device = {
+ .name = "android_usb",
+ .id = -1,
+ .dev = {
+ .platform_data = &android_usb_pdata,
+ },
+};
+
+#ifdef CONFIG_USB_EHCI_MSM_72K
+static void msm_hsusb_vbus_power(unsigned phy_info, int on)
+{
+ int rc = 0;
+ unsigned gpio;
+
+ gpio = GPIO_HOST_VBUS_EN;
+
+ rc = gpio_request(gpio, "i2c_host_vbus_en");
+ if (rc < 0) {
+ pr_err("failed to request %d GPIO\n", gpio);
+ return;
+ }
+ gpio_direction_output(gpio, !!on);
+ gpio_set_value_cansleep(gpio, !!on);
+ gpio_free(gpio);
+}
+
+static struct msm_usb_host_platform_data msm_usb_host_pdata = {
+ .phy_info = (USB_PHY_INTEGRATED | USB_PHY_MODEL_45NM),
+};
+
+static void __init msm7x2x_init_host(void)
+{
+ msm_add_host(0, &msm_usb_host_pdata);
+}
+#endif
+
+#ifdef CONFIG_USB_MSM_OTG_72K
+static int hsusb_rpc_connect(int connect)
+{
+ if (connect)
+ return msm_hsusb_rpc_connect();
+ else
+ return msm_hsusb_rpc_close();
+}
+
+static struct regulator *reg_hsusb;
+static int msm_hsusb_ldo_init(int init)
+{
+ int rc = 0;
+
+ if (init) {
+ reg_hsusb = regulator_get(NULL, "usb");
+ if (IS_ERR(reg_hsusb)) {
+ rc = PTR_ERR(reg_hsusb);
+ pr_err("%s: could not get regulator: %d\n",
+ __func__, rc);
+ goto out;
+ }
+
+ rc = regulator_set_voltage(reg_hsusb, 3300000, 3300000);
+ if (rc) {
+ pr_err("%s: could not set voltage: %d\n",
+ __func__, rc);
+ goto reg_free;
+ }
+
+ return 0;
+ }
+ /* else fall through */
+reg_free:
+ regulator_put(reg_hsusb);
+out:
+ reg_hsusb = NULL;
+ return rc;
+}
+
+static int msm_hsusb_ldo_enable(int enable)
+{
+ static int ldo_status;
+
+ if (IS_ERR_OR_NULL(reg_hsusb))
+ return reg_hsusb ? PTR_ERR(reg_hsusb) : -ENODEV;
+
+ if (ldo_status == enable)
+ return 0;
+
+ ldo_status = enable;
+
+ return enable ?
+ regulator_enable(reg_hsusb) :
+ regulator_disable(reg_hsusb);
+}
+
+#ifndef CONFIG_USB_EHCI_MSM_72K
+static int msm_hsusb_pmic_notif_init(void (*callback)(int online), int init)
+{
+ int ret = 0;
+
+ if (init)
+ ret = msm_pm_app_rpc_init(callback);
+ else
+ msm_pm_app_rpc_deinit(callback);
+
+ return ret;
+}
+#endif
+
+static struct msm_otg_platform_data msm_otg_pdata = {
+#ifndef CONFIG_USB_EHCI_MSM_72K
+ .pmic_vbus_notif_init = msm_hsusb_pmic_notif_init,
+#else
+ .vbus_power = msm_hsusb_vbus_power,
+#endif
+ .rpc_connect = hsusb_rpc_connect,
+ .pemp_level = PRE_EMPHASIS_WITH_20_PERCENT,
+ .cdr_autoreset = CDR_AUTO_RESET_DISABLE,
+ .drv_ampl = HS_DRV_AMPLITUDE_DEFAULT,
+ .se1_gating = SE1_GATING_DISABLE,
+ .ldo_init = msm_hsusb_ldo_init,
+ .ldo_enable = msm_hsusb_ldo_enable,
+ .chg_init = hsusb_chg_init,
+ .chg_connected = hsusb_chg_connected,
+ .chg_vbus_draw = hsusb_chg_vbus_draw,
+};
+#endif
+
+static struct msm_hsusb_gadget_platform_data msm_gadget_pdata = {
+ .is_phy_status_timer_on = 1,
+};
+
+static struct resource smc91x_resources[] = {
+ [0] = {
+ .start = 0x90000300,
+ .end = 0x900003ff,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .start = MSM_GPIO_TO_INT(4),
+ .end = MSM_GPIO_TO_INT(4),
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct platform_device smc91x_device = {
+ .name = "smc91x",
+ .id = 0,
+ .num_resources = ARRAY_SIZE(smc91x_resources),
+ .resource = smc91x_resources,
+};
+
+#ifdef CONFIG_SERIAL_MSM_HS
+static struct msm_serial_hs_platform_data msm_uart_dm1_pdata = {
+ .inject_rx_on_wakeup = 1,
+ .rx_to_inject = 0xFD,
+};
+#endif
+static struct msm_pm_platform_data msm7x27a_pm_data[MSM_PM_SLEEP_MODE_NR] = {
+ [MSM_PM_MODE(0, MSM_PM_SLEEP_MODE_POWER_COLLAPSE)] = {
+ .idle_supported = 1,
+ .suspend_supported = 1,
+ .idle_enabled = 1,
+ .suspend_enabled = 1,
+ .latency = 16000,
+ .residency = 20000,
+ },
+ [MSM_PM_MODE(0, MSM_PM_SLEEP_MODE_POWER_COLLAPSE_NO_XO_SHUTDOWN)] = {
+ .idle_supported = 1,
+ .suspend_supported = 1,
+ .idle_enabled = 1,
+ .suspend_enabled = 1,
+ .latency = 12000,
+ .residency = 20000,
+ },
+ [MSM_PM_MODE(0, MSM_PM_SLEEP_MODE_RAMP_DOWN_AND_WAIT_FOR_INTERRUPT)] = {
+ .idle_supported = 1,
+ .suspend_supported = 1,
+ .idle_enabled = 0,
+ .suspend_enabled = 1,
+ .latency = 2000,
+ .residency = 0,
+ },
+ [MSM_PM_MODE(0, MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT)] = {
+ .idle_supported = 1,
+ .suspend_supported = 1,
+ .idle_enabled = 1,
+ .suspend_enabled = 1,
+ .latency = 2,
+ .residency = 0,
+ },
+};
+
+static struct msm_pm_boot_platform_data msm_pm_boot_pdata __initdata = {
+ .mode = MSM_PM_BOOT_CONFIG_RESET_VECTOR_PHYS,
+ .p_addr = 0,
+};
+
+/* 8625 PM platform data */
+static struct msm_pm_platform_data msm8625_pm_data[MSM_PM_SLEEP_MODE_NR * 2] = {
+ /* CORE0 entries */
+ [MSM_PM_MODE(0, MSM_PM_SLEEP_MODE_POWER_COLLAPSE)] = {
+ .idle_supported = 1,
+ .suspend_supported = 1,
+ .idle_enabled = 0,
+ .suspend_enabled = 0,
+ .latency = 16000,
+ .residency = 20000,
+ },
+
+ [MSM_PM_MODE(0, MSM_PM_SLEEP_MODE_POWER_COLLAPSE_NO_XO_SHUTDOWN)] = {
+ .idle_supported = 1,
+ .suspend_supported = 1,
+ .idle_enabled = 0,
+ .suspend_enabled = 0,
+ .latency = 12000,
+ .residency = 20000,
+ },
+
+ /* picked latency & redisdency values from 7x30 */
+ [MSM_PM_MODE(0, MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE)] = {
+ .idle_supported = 1,
+ .suspend_supported = 1,
+ .idle_enabled = 0,
+ .suspend_enabled = 0,
+ .latency = 500,
+ .residency = 6000,
+ },
+
+ [MSM_PM_MODE(0, MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT)] = {
+ .idle_supported = 1,
+ .suspend_supported = 1,
+ .idle_enabled = 1,
+ .suspend_enabled = 1,
+ .latency = 2,
+ .residency = 10,
+ },
+
+ /* picked latency & redisdency values from 7x30 */
+ [MSM_PM_MODE(1, MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE)] = {
+ .idle_supported = 1,
+ .suspend_supported = 1,
+ .idle_enabled = 0,
+ .suspend_enabled = 0,
+ .latency = 500,
+ .residency = 6000,
+ },
+
+ [MSM_PM_MODE(1, MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT)] = {
+ .idle_supported = 1,
+ .suspend_supported = 1,
+ .idle_enabled = 1,
+ .suspend_enabled = 1,
+ .latency = 2,
+ .residency = 10,
+ },
+
+};
+
+static struct msm_pm_boot_platform_data msm_pm_8625_boot_pdata __initdata = {
+ .mode = MSM_PM_BOOT_CONFIG_REMAP_BOOT_ADDR,
+ .v_addr = MSM_CFG_CTL_BASE,
+};
+
+static struct android_pmem_platform_data android_pmem_adsp_pdata = {
+ .name = "pmem_adsp",
+ .allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
+ .cached = 1,
+ .memory_type = MEMTYPE_EBI1,
+ .request_region = request_fmem_c_region,
+ .release_region = release_fmem_c_region,
+ .reusable = 1,
+};
+
+static struct platform_device android_pmem_adsp_device = {
+ .name = "android_pmem",
+ .id = 1,
+ .dev = { .platform_data = &android_pmem_adsp_pdata },
+};
+
+static unsigned pmem_mdp_size = MSM_PMEM_MDP_SIZE;
+static int __init pmem_mdp_size_setup(char *p)
+{
+ pmem_mdp_size = memparse(p, NULL);
+ return 0;
+}
+
+early_param("pmem_mdp_size", pmem_mdp_size_setup);
+
+static unsigned pmem_adsp_size = MSM_PMEM_ADSP_SIZE;
+static int __init pmem_adsp_size_setup(char *p)
+{
+ pmem_adsp_size = memparse(p, NULL);
+ return 0;
+}
+
+early_param("pmem_adsp_size", pmem_adsp_size_setup);
+
+#define SND(desc, num) { .name = #desc, .id = num }
+static struct snd_endpoint snd_endpoints_list[] = {
+ SND(HANDSET, 0),
+ SND(MONO_HEADSET, 2),
+ SND(HEADSET, 3),
+ SND(SPEAKER, 6),
+ SND(TTY_HEADSET, 8),
+ SND(TTY_VCO, 9),
+ SND(TTY_HCO, 10),
+ SND(BT, 12),
+ SND(IN_S_SADC_OUT_HANDSET, 16),
+ SND(IN_S_SADC_OUT_SPEAKER_PHONE, 25),
+ SND(FM_DIGITAL_STEREO_HEADSET, 26),
+ SND(FM_DIGITAL_SPEAKER_PHONE, 27),
+ SND(FM_DIGITAL_BT_A2DP_HEADSET, 28),
+ SND(STEREO_HEADSET_AND_SPEAKER, 31),
+ SND(CURRENT, 0x7FFFFFFE),
+ SND(FM_ANALOG_STEREO_HEADSET, 35),
+ SND(FM_ANALOG_STEREO_HEADSET_CODEC, 36),
+};
+#undef SND
+
+static struct msm_snd_endpoints msm_device_snd_endpoints = {
+ .endpoints = snd_endpoints_list,
+ .num = sizeof(snd_endpoints_list) / sizeof(struct snd_endpoint)
+};
+
+static struct platform_device msm_device_snd = {
+ .name = "msm_snd",
+ .id = -1,
+ .dev = {
+ .platform_data = &msm_device_snd_endpoints
+ },
+};
+
+#define DEC0_FORMAT ((1<<MSM_ADSP_CODEC_MP3)| \
+ (1<<MSM_ADSP_CODEC_AAC)|(1<<MSM_ADSP_CODEC_WMA)| \
+ (1<<MSM_ADSP_CODEC_WMAPRO)|(1<<MSM_ADSP_CODEC_AMRWB)| \
+ (1<<MSM_ADSP_CODEC_AMRNB)|(1<<MSM_ADSP_CODEC_WAV)| \
+ (1<<MSM_ADSP_CODEC_ADPCM)|(1<<MSM_ADSP_CODEC_YADPCM)| \
+ (1<<MSM_ADSP_CODEC_EVRC)|(1<<MSM_ADSP_CODEC_QCELP))
+#define DEC1_FORMAT ((1<<MSM_ADSP_CODEC_MP3)| \
+ (1<<MSM_ADSP_CODEC_AAC)|(1<<MSM_ADSP_CODEC_WMA)| \
+ (1<<MSM_ADSP_CODEC_WMAPRO)|(1<<MSM_ADSP_CODEC_AMRWB)| \
+ (1<<MSM_ADSP_CODEC_AMRNB)|(1<<MSM_ADSP_CODEC_WAV)| \
+ (1<<MSM_ADSP_CODEC_ADPCM)|(1<<MSM_ADSP_CODEC_YADPCM)| \
+ (1<<MSM_ADSP_CODEC_EVRC)|(1<<MSM_ADSP_CODEC_QCELP))
+#define DEC2_FORMAT ((1<<MSM_ADSP_CODEC_MP3)| \
+ (1<<MSM_ADSP_CODEC_AAC)|(1<<MSM_ADSP_CODEC_WMA)| \
+ (1<<MSM_ADSP_CODEC_WMAPRO)|(1<<MSM_ADSP_CODEC_AMRWB)| \
+ (1<<MSM_ADSP_CODEC_AMRNB)|(1<<MSM_ADSP_CODEC_WAV)| \
+ (1<<MSM_ADSP_CODEC_ADPCM)|(1<<MSM_ADSP_CODEC_YADPCM)| \
+ (1<<MSM_ADSP_CODEC_EVRC)|(1<<MSM_ADSP_CODEC_QCELP))
+#define DEC3_FORMAT ((1<<MSM_ADSP_CODEC_MP3)| \
+ (1<<MSM_ADSP_CODEC_AAC)|(1<<MSM_ADSP_CODEC_WMA)| \
+ (1<<MSM_ADSP_CODEC_WMAPRO)|(1<<MSM_ADSP_CODEC_AMRWB)| \
+ (1<<MSM_ADSP_CODEC_AMRNB)|(1<<MSM_ADSP_CODEC_WAV)| \
+ (1<<MSM_ADSP_CODEC_ADPCM)|(1<<MSM_ADSP_CODEC_YADPCM)| \
+ (1<<MSM_ADSP_CODEC_EVRC)|(1<<MSM_ADSP_CODEC_QCELP))
+#define DEC4_FORMAT (1<<MSM_ADSP_CODEC_MIDI)
+
+static unsigned int dec_concurrency_table[] = {
+ /* Audio LP */
+ (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DMA)), 0,
+ 0, 0, 0,
+
+ /* Concurrency 1 */
+ (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
+ (DEC1_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
+ (DEC2_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
+ (DEC3_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
+ (DEC4_FORMAT),
+
+ /* Concurrency 2 */
+ (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
+ (DEC1_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
+ (DEC2_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
+ (DEC3_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
+ (DEC4_FORMAT),
+
+ /* Concurrency 3 */
+ (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
+ (DEC1_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
+ (DEC2_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
+ (DEC3_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
+ (DEC4_FORMAT),
+
+ /* Concurrency 4 */
+ (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
+ (DEC1_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
+ (DEC2_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
+ (DEC3_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
+ (DEC4_FORMAT),
+
+ /* Concurrency 5 */
+ (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
+ (DEC1_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
+ (DEC2_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
+ (DEC3_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
+ (DEC4_FORMAT),
+
+ /* Concurrency 6 */
+ (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|
+ (1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
+ 0, 0, 0, 0,
+
+ /* Concurrency 7 */
+ (DEC0_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
+ (DEC1_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
+ (DEC2_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
+ (DEC3_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
+ (DEC4_FORMAT),
+};
+
+#define DEC_INFO(name, queueid, decid, nr_codec) { .module_name = name, \
+ .module_queueid = queueid, .module_decid = decid, \
+ .nr_codec_support = nr_codec}
+
+static struct msm_adspdec_info dec_info_list[] = {
+ DEC_INFO("AUDPLAY0TASK", 13, 0, 11), /* AudPlay0BitStreamCtrlQueue */
+ DEC_INFO("AUDPLAY1TASK", 14, 1, 11), /* AudPlay1BitStreamCtrlQueue */
+ DEC_INFO("AUDPLAY2TASK", 15, 2, 11), /* AudPlay2BitStreamCtrlQueue */
+ DEC_INFO("AUDPLAY3TASK", 16, 3, 11), /* AudPlay3BitStreamCtrlQueue */
+ DEC_INFO("AUDPLAY4TASK", 17, 4, 1), /* AudPlay4BitStreamCtrlQueue */
+};
+
+static struct msm_adspdec_database msm_device_adspdec_database = {
+ .num_dec = ARRAY_SIZE(dec_info_list),
+ .num_concurrency_support = (ARRAY_SIZE(dec_concurrency_table) / \
+ ARRAY_SIZE(dec_info_list)),
+ .dec_concurrency_table = dec_concurrency_table,
+ .dec_info_list = dec_info_list,
+};
+
+static struct platform_device msm_device_adspdec = {
+ .name = "msm_adspdec",
+ .id = -1,
+ .dev = {
+ .platform_data = &msm_device_adspdec_database
+ },
+};
+
+static struct android_pmem_platform_data android_pmem_audio_pdata = {
+ .name = "pmem_audio",
+ .allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
+ .cached = 0,
+ .memory_type = MEMTYPE_EBI1,
+};
+
+static struct platform_device android_pmem_audio_device = {
+ .name = "android_pmem",
+ .id = 2,
+ .dev = { .platform_data = &android_pmem_audio_pdata },
+};
+
+static struct android_pmem_platform_data android_pmem_pdata = {
+ .name = "pmem",
+ .allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
+ .cached = 1,
+ .memory_type = MEMTYPE_EBI1,
+};
+static struct platform_device android_pmem_device = {
+ .name = "android_pmem",
+ .id = 0,
+ .dev = { .platform_data = &android_pmem_pdata },
+};
+
+static u32 msm_calculate_batt_capacity(u32 current_voltage);
+
+static struct msm_psy_batt_pdata msm_psy_batt_data = {
+ .voltage_min_design = 2800,
+ .voltage_max_design = 4300,
+ .avail_chg_sources = AC_CHG | USB_CHG ,
+ .batt_technology = POWER_SUPPLY_TECHNOLOGY_LION,
+ .calculate_capacity = &msm_calculate_batt_capacity,
+};
+
+static u32 msm_calculate_batt_capacity(u32 current_voltage)
+{
+ u32 low_voltage = msm_psy_batt_data.voltage_min_design;
+ u32 high_voltage = msm_psy_batt_data.voltage_max_design;
+
+ return (current_voltage - low_voltage) * 100
+ / (high_voltage - low_voltage);
+}
+
+static struct platform_device msm_batt_device = {
+ .name = "msm-battery",
+ .id = -1,
+ .dev.platform_data = &msm_psy_batt_data,
+};
+
+static struct smsc911x_platform_config smsc911x_config = {
+ .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_HIGH,
+ .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
+ .flags = SMSC911X_USE_16BIT,
+};
+
+static struct resource smsc911x_resources[] = {
+ [0] = {
+ .start = 0x90000000,
+ .end = 0x90007fff,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .start = MSM_GPIO_TO_INT(48),
+ .end = MSM_GPIO_TO_INT(48),
+ .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
+ },
+};
+
+static struct platform_device smsc911x_device = {
+ .name = "smsc911x",
+ .id = 0,
+ .num_resources = ARRAY_SIZE(smsc911x_resources),
+ .resource = smsc911x_resources,
+ .dev = {
+ .platform_data = &smsc911x_config,
+ },
+};
+
+static struct msm_gpio smsc911x_gpios[] = {
+ { GPIO_CFG(48, 0, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_6MA),
+ "smsc911x_irq" },
+ { GPIO_CFG(49, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_6MA),
+ "eth_fifo_sel" },
+};
+
+static char *msm_adc_surf_device_names[] = {
+ "XO_ADC",
+};
+
+static struct msm_adc_platform_data msm_adc_pdata = {
+ .dev_names = msm_adc_surf_device_names,
+ .num_adc = ARRAY_SIZE(msm_adc_surf_device_names),
+ .target_hw = MSM_8x25,
+};
+
+static struct platform_device msm_adc_device = {
+ .name = "msm_adc",
+ .id = -1,
+ .dev = {
+ .platform_data = &msm_adc_pdata,
+ },
+};
+
+#define ETH_FIFO_SEL_GPIO 49
+static void msm7x27a_cfg_smsc911x(void)
+{
+ int res;
+
+ res = msm_gpios_request_enable(smsc911x_gpios,
+ ARRAY_SIZE(smsc911x_gpios));
+ if (res) {
+ pr_err("%s: unable to enable gpios for SMSC911x\n", __func__);
+ return;
+ }
+
+ /* ETH_FIFO_SEL */
+ res = gpio_direction_output(ETH_FIFO_SEL_GPIO, 0);
+ if (res) {
+ pr_err("%s: unable to get direction for gpio %d\n", __func__,
+ ETH_FIFO_SEL_GPIO);
+ msm_gpios_disable_free(smsc911x_gpios,
+ ARRAY_SIZE(smsc911x_gpios));
+ return;
+ }
+ gpio_set_value(ETH_FIFO_SEL_GPIO, 0);
+}
+
+#if defined(CONFIG_SERIAL_MSM_HSL_CONSOLE) \
+ && defined(CONFIG_MSM_SHARED_GPIO_FOR_UART2DM)
+static struct msm_gpio uart2dm_gpios[] = {
+ {GPIO_CFG(19, 2, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
+ "uart2dm_rfr_n" },
+ {GPIO_CFG(20, 2, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
+ "uart2dm_cts_n" },
+ {GPIO_CFG(21, 2, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
+ "uart2dm_rx" },
+ {GPIO_CFG(108, 2, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
+ "uart2dm_tx" },
+};
+
+static void msm7x27a_cfg_uart2dm_serial(void)
+{
+ int ret;
+ ret = msm_gpios_request_enable(uart2dm_gpios,
+ ARRAY_SIZE(uart2dm_gpios));
+ if (ret)
+ pr_err("%s: unable to enable gpios for uart2dm\n", __func__);
+}
+#else
+static void msm7x27a_cfg_uart2dm_serial(void) { }
+#endif
+
+static struct fmem_platform_data fmem_pdata;
+
+static struct platform_device fmem_device = {
+ .name = "fmem",
+ .id = 1,
+ .dev = { .platform_data = &fmem_pdata },
+};
+
+static struct platform_device *rumi_sim_devices[] __initdata = {
+ &msm_device_dmov,
+ &msm_device_smd,
+ &smc91x_device,
+ &msm_device_uart1,
+ &msm_device_nand,
+ &msm_device_uart_dm1,
+ &msm_gsbi0_qup_i2c_device,
+ &msm_gsbi1_qup_i2c_device,
+};
+
+static struct platform_device *msm8625_rumi3_devices[] __initdata = {
+ &msm8625_device_dmov,
+ &msm8625_device_smd,
+ &msm8625_device_uart1,
+ &msm8625_gsbi0_qup_i2c_device,
+};
+
+static struct platform_device *msm7627a_surf_ffa_devices[] __initdata = {
+ &msm_device_dmov,
+ &msm_device_smd,
+ &msm_device_uart1,
+ &msm_device_uart_dm1,
+ &msm_device_uart_dm2,
+ &msm_gsbi0_qup_i2c_device,
+ &msm_gsbi1_qup_i2c_device,
+ &msm_device_otg,
+ &msm_device_gadget_peripheral,
+ &smsc911x_device,
+ &msm_kgsl_3d0,
+};
+
+static struct platform_device *common_devices[] __initdata = {
+ &android_usb_device,
+ &android_pmem_device,
+ &android_pmem_adsp_device,
+ &android_pmem_audio_device,
+ &fmem_device,
+ &msm_device_nand,
+ &msm_device_snd,
+ &msm_device_adspdec,
+ &asoc_msm_pcm,
+ &asoc_msm_dai0,
+ &asoc_msm_dai1,
+ &msm_batt_device,
+ &msm_adc_device,
+};
+
+static struct platform_device *msm8625_surf_devices[] __initdata = {
+ &msm8625_device_dmov,
+ &msm8625_device_uart1,
+ &msm8625_device_uart_dm1,
+ &msm8625_device_uart_dm2,
+ &msm8625_gsbi0_qup_i2c_device,
+ &msm8625_gsbi1_qup_i2c_device,
+ &msm8625_device_smd,
+ &msm8625_device_otg,
+ &msm8625_device_gadget_peripheral,
+ &msm8625_kgsl_3d0,
+};
+
+static unsigned pmem_kernel_ebi1_size = PMEM_KERNEL_EBI1_SIZE;
+static int __init pmem_kernel_ebi1_size_setup(char *p)
+{
+ pmem_kernel_ebi1_size = memparse(p, NULL);
+ return 0;
+}
+early_param("pmem_kernel_ebi1_size", pmem_kernel_ebi1_size_setup);
+
+static unsigned pmem_audio_size = MSM_PMEM_AUDIO_SIZE;
+static int __init pmem_audio_size_setup(char *p)
+{
+ pmem_audio_size = memparse(p, NULL);
+ return 0;
+}
+early_param("pmem_audio_size", pmem_audio_size_setup);
+
+static struct memtype_reserve msm7x27a_reserve_table[] __initdata = {
+ [MEMTYPE_SMI] = {
+ },
+ [MEMTYPE_EBI0] = {
+ .flags = MEMTYPE_FLAGS_1M_ALIGN,
+ },
+ [MEMTYPE_EBI1] = {
+ .flags = MEMTYPE_FLAGS_1M_ALIGN,
+ },
+};
+
+#ifdef CONFIG_ANDROID_PMEM
+static struct android_pmem_platform_data *pmem_pdata_array[] __initdata = {
+ &android_pmem_adsp_pdata,
+ &android_pmem_audio_pdata,
+ &android_pmem_pdata,
+};
+#endif
+
+static void __init size_pmem_devices(void)
+{
+#ifdef CONFIG_ANDROID_PMEM
+ unsigned int i;
+ unsigned int reusable_count = 0;
+
+ if (machine_is_msm7625a_surf() || machine_is_msm7625a_ffa()) {
+ pmem_mdp_size = MSM7x25A_MSM_PMEM_MDP_SIZE;
+ pmem_adsp_size = MSM7x25A_MSM_PMEM_ADSP_SIZE;
+ } else {
+ pmem_mdp_size = MSM_PMEM_MDP_SIZE;
+ pmem_adsp_size = MSM_PMEM_ADSP_SIZE;
+ }
+
+ android_pmem_adsp_pdata.size = pmem_adsp_size;
+ android_pmem_pdata.size = pmem_mdp_size;
+ android_pmem_audio_pdata.size = pmem_audio_size;
+
+ fmem_pdata.size = 0;
+ fmem_pdata.align = PAGE_SIZE;
+
+ /* Find pmem devices that should use FMEM (reusable) memory.
+ */
+ for (i = 0; i < ARRAY_SIZE(pmem_pdata_array); ++i) {
+ struct android_pmem_platform_data *pdata = pmem_pdata_array[i];
+
+ if (!reusable_count && pdata->reusable)
+ fmem_pdata.size += pdata->size;
+
+ reusable_count += (pdata->reusable) ? 1 : 0;
+
+ if (pdata->reusable && reusable_count > 1) {
+ pr_err("%s: Too many PMEM devices specified as reusable. PMEM device %s was not configured as reusable.\n",
+ __func__, pdata->name);
+ pdata->reusable = 0;
+ }
+ }
+#endif
+
+}
+
+static void __init reserve_memory_for(struct android_pmem_platform_data *p)
+{
+ msm7x27a_reserve_table[p->memory_type].size += p->size;
+}
+
+static void __init reserve_pmem_memory(void)
+{
+#ifdef CONFIG_ANDROID_PMEM
+ unsigned int i;
+ for (i = 0; i < ARRAY_SIZE(pmem_pdata_array); ++i)
+ reserve_memory_for(pmem_pdata_array[i]);
+
+ msm7x27a_reserve_table[MEMTYPE_EBI1].size += pmem_kernel_ebi1_size;
+#endif
+}
+
+static void __init msm7x27a_calculate_reserve_sizes(void)
+{
+ size_pmem_devices();
+ reserve_pmem_memory();
+}
+
+static int msm7x27a_paddr_to_memtype(unsigned int paddr)
+{
+ return MEMTYPE_EBI1;
+}
+
+static struct reserve_info msm7x27a_reserve_info __initdata = {
+ .memtype_reserve_table = msm7x27a_reserve_table,
+ .calculate_reserve_sizes = msm7x27a_calculate_reserve_sizes,
+ .paddr_to_memtype = msm7x27a_paddr_to_memtype,
+};
+
+static void __init msm7x27a_reserve(void)
+{
+ reserve_info = &msm7x27a_reserve_info;
+ msm_reserve();
+}
+
+static void __init msm8625_reserve(void)
+{
+ msm7x27a_reserve();
+ memblock_remove(MSM8625_SECONDARY_PHYS, SZ_8);
+ memblock_remove(MSM8625_WARM_BOOT_PHYS, SZ_32);
+}
+
+static void __init msm7x27a_device_i2c_init(void)
+{
+ msm_gsbi0_qup_i2c_device.dev.platform_data = &msm_gsbi0_qup_i2c_pdata;
+ msm_gsbi1_qup_i2c_device.dev.platform_data = &msm_gsbi1_qup_i2c_pdata;
+}
+
+static void __init msm8625_device_i2c_init(void)
+{
+ msm8625_gsbi0_qup_i2c_device.dev.platform_data =
+ &msm_gsbi0_qup_i2c_pdata;
+ msm8625_gsbi1_qup_i2c_device.dev.platform_data =
+ &msm_gsbi1_qup_i2c_pdata;
+}
+
+#define MSM_EBI2_PHYS 0xa0d00000
+#define MSM_EBI2_XMEM_CS2_CFG1 0xa0d10030
+
+static void __init msm7x27a_init_ebi2(void)
+{
+ uint32_t ebi2_cfg;
+ void __iomem *ebi2_cfg_ptr;
+
+ ebi2_cfg_ptr = ioremap_nocache(MSM_EBI2_PHYS, sizeof(uint32_t));
+ if (!ebi2_cfg_ptr)
+ return;
+
+ ebi2_cfg = readl(ebi2_cfg_ptr);
+ if (machine_is_msm7x27a_rumi3() || machine_is_msm7x27a_surf() ||
+ machine_is_msm7625a_surf() || machine_is_msm8625_surf())
+ ebi2_cfg |= (1 << 4); /* CS2 */
+
+ writel(ebi2_cfg, ebi2_cfg_ptr);
+ iounmap(ebi2_cfg_ptr);
+
+ /* Enable A/D MUX[bit 31] from EBI2_XMEM_CS2_CFG1 */
+ ebi2_cfg_ptr = ioremap_nocache(MSM_EBI2_XMEM_CS2_CFG1,
+ sizeof(uint32_t));
+ if (!ebi2_cfg_ptr)
+ return;
+
+ ebi2_cfg = readl(ebi2_cfg_ptr);
+ if (machine_is_msm7x27a_surf() || machine_is_msm7625a_surf())
+ ebi2_cfg |= (1 << 31);
+
+ writel(ebi2_cfg, ebi2_cfg_ptr);
+ iounmap(ebi2_cfg_ptr);
+}
+
+static struct platform_device msm_proccomm_regulator_dev = {
+ .name = PROCCOMM_REGULATOR_DEV_NAME,
+ .id = -1,
+ .dev = {
+ .platform_data = &msm7x27a_proccomm_regulator_data
+ }
+};
+
+static void msm_adsp_add_pdev(void)
+{
+ int rc = 0;
+ struct rpc_board_dev *rpc_adsp_pdev;
+
+ rpc_adsp_pdev = kzalloc(sizeof(struct rpc_board_dev), GFP_KERNEL);
+ if (rpc_adsp_pdev == NULL) {
+ pr_err("%s: Memory Allocation failure\n", __func__);
+ return;
+ }
+ rpc_adsp_pdev->prog = ADSP_RPC_PROG;
+
+ if (cpu_is_msm8625())
+ rpc_adsp_pdev->pdev = msm8625_device_adsp;
+ else
+ rpc_adsp_pdev->pdev = msm_adsp_device;
+ rc = msm_rpc_add_board_dev(rpc_adsp_pdev, 1);
+ if (rc < 0) {
+ pr_err("%s: return val: %d\n", __func__, rc);
+ kfree(rpc_adsp_pdev);
+ }
+}
+
+static void __init msm7627a_rumi3_init(void)
+{
+ msm7x27a_init_ebi2();
+ platform_add_devices(rumi_sim_devices,
+ ARRAY_SIZE(rumi_sim_devices));
+}
+
+static void __init msm8625_rumi3_init(void)
+{
+ msm7x2x_misc_init();
+ msm_adsp_add_pdev();
+ msm8625_device_i2c_init();
+ platform_add_devices(msm8625_rumi3_devices,
+ ARRAY_SIZE(msm8625_rumi3_devices));
+
+ msm_pm_set_platform_data(msm8625_pm_data,
+ ARRAY_SIZE(msm8625_pm_data));
+ BUG_ON(msm_pm_boot_init(&msm_pm_8625_boot_pdata));
+ msm8x25_spm_device_init();
+}
+
+#define UART1DM_RX_GPIO 45
+
+#if defined(CONFIG_BT) && defined(CONFIG_MARIMBA_CORE)
+static int __init msm7x27a_init_ar6000pm(void)
+{
+ msm_wlan_ar6000_pm_device.dev.platform_data = &ar600x_wlan_power;
+ return platform_device_register(&msm_wlan_ar6000_pm_device);
+}
+#else
+static int __init msm7x27a_init_ar6000pm(void) { return 0; }
+#endif
+
+static void __init msm7x27a_init_regulators(void)
+{
+ int rc = platform_device_register(&msm_proccomm_regulator_dev);
+ if (rc)
+ pr_err("%s: could not register regulator device: %d\n",
+ __func__, rc);
+}
+
+static void __init msm7x27a_add_footswitch_devices(void)
+{
+ platform_add_devices(msm_footswitch_devices,
+ msm_num_footswitch_devices);
+}
+
+static void __init msm7x27a_add_platform_devices(void)
+{
+ if (machine_is_msm8625_surf() || machine_is_msm8625_ffa()) {
+ platform_add_devices(msm8625_surf_devices,
+ ARRAY_SIZE(msm8625_surf_devices));
+ } else {
+ platform_add_devices(msm7627a_surf_ffa_devices,
+ ARRAY_SIZE(msm7627a_surf_ffa_devices));
+ }
+
+ platform_add_devices(common_devices,
+ ARRAY_SIZE(common_devices));
+}
+
+static void __init msm7x27a_uartdm_config(void)
+{
+ msm7x27a_cfg_uart2dm_serial();
+ msm_uart_dm1_pdata.wakeup_irq = gpio_to_irq(UART1DM_RX_GPIO);
+ if (cpu_is_msm8625())
+ msm8625_device_uart_dm1.dev.platform_data =
+ &msm_uart_dm1_pdata;
+ else
+ msm_device_uart_dm1.dev.platform_data = &msm_uart_dm1_pdata;
+}
+
+static void __init msm7x27a_otg_gadget(void)
+{
+ if (cpu_is_msm8625()) {
+ msm_otg_pdata.swfi_latency =
+ msm8625_pm_data[MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT].latency;
+ msm8625_device_otg.dev.platform_data = &msm_otg_pdata;
+ msm8625_device_gadget_peripheral.dev.platform_data =
+ &msm_gadget_pdata;
+ } else {
+ msm_otg_pdata.swfi_latency =
+ msm7x27a_pm_data[
+ MSM_PM_SLEEP_MODE_RAMP_DOWN_AND_WAIT_FOR_INTERRUPT].latency;
+ msm_device_otg.dev.platform_data = &msm_otg_pdata;
+ msm_device_gadget_peripheral.dev.platform_data =
+ &msm_gadget_pdata;
+ }
+}
+
+static void __init msm7x27a_pm_init(void)
+{
+ if (machine_is_msm8625_surf() || machine_is_msm8625_ffa()) {
+ msm_pm_set_platform_data(msm8625_pm_data,
+ ARRAY_SIZE(msm8625_pm_data));
+ BUG_ON(msm_pm_boot_init(&msm_pm_8625_boot_pdata));
+ msm8x25_spm_device_init();
+ } else {
+ msm_pm_set_platform_data(msm7x27a_pm_data,
+ ARRAY_SIZE(msm7x27a_pm_data));
+ BUG_ON(msm_pm_boot_init(&msm_pm_boot_pdata));
+ }
+
+ msm_pm_register_irqs();
+}
+
+static void __init msm7x2x_init(void)
+{
+ msm7x2x_misc_init();
+
+ /* Initialize regulators first so that other devices can use them */
+ msm7x27a_init_regulators();
+ msm_adsp_add_pdev();
+ if (cpu_is_msm8625())
+ msm8625_device_i2c_init();
+ else
+ msm7x27a_device_i2c_init();
+ msm7x27a_init_ebi2();
+ msm7x27a_uartdm_config();
+
+ msm7x27a_otg_gadget();
+ msm7x27a_cfg_smsc911x();
+
+ msm7x27a_add_footswitch_devices();
+ msm7x27a_add_platform_devices();
+ /* Ensure ar6000pm device is registered before MMC/SDC */
+ msm7x27a_init_ar6000pm();
+ msm7627a_init_mmc();
+ msm_fb_add_devices();
+ msm7x2x_init_host();
+ msm7x27a_pm_init();
+ register_i2c_devices();
+#if defined(CONFIG_BT) && defined(CONFIG_MARIMBA_CORE)
+ msm7627a_bt_power_init();
+#endif
+ msm7627a_camera_init();
+ msm7627a_add_io_devices();
+ /*7x25a kgsl initializations*/
+ msm7x25a_kgsl_3d0_init();
+ /*8x25 kgsl initializations*/
+ msm8x25_kgsl_3d0_init();
+}
+
+static void __init msm7x2x_init_early(void)
+{
+ msm_msm7627a_allocate_memory_regions();
+}
+
+MACHINE_START(MSM7X27A_RUMI3, "QCT MSM7x27a RUMI3")
+ .atag_offset = 0x100,
+ .map_io = msm_common_io_init,
+ .reserve = msm7x27a_reserve,
+ .init_irq = msm_init_irq,
+ .init_machine = msm7627a_rumi3_init,
+ .timer = &msm_timer,
+ .init_early = msm7x2x_init_early,
+ .handle_irq = vic_handle_irq,
+MACHINE_END
+MACHINE_START(MSM7X27A_SURF, "QCT MSM7x27a SURF")
+ .atag_offset = 0x100,
+ .map_io = msm_common_io_init,
+ .reserve = msm7x27a_reserve,
+ .init_irq = msm_init_irq,
+ .init_machine = msm7x2x_init,
+ .timer = &msm_timer,
+ .init_early = msm7x2x_init_early,
+ .handle_irq = vic_handle_irq,
+MACHINE_END
+MACHINE_START(MSM7X27A_FFA, "QCT MSM7x27a FFA")
+ .atag_offset = 0x100,
+ .map_io = msm_common_io_init,
+ .reserve = msm7x27a_reserve,
+ .init_irq = msm_init_irq,
+ .init_machine = msm7x2x_init,
+ .timer = &msm_timer,
+ .init_early = msm7x2x_init_early,
+ .handle_irq = vic_handle_irq,
+MACHINE_END
+MACHINE_START(MSM7625A_SURF, "QCT MSM7625a SURF")
+ .atag_offset = 0x100,
+ .map_io = msm_common_io_init,
+ .reserve = msm7x27a_reserve,
+ .init_irq = msm_init_irq,
+ .init_machine = msm7x2x_init,
+ .timer = &msm_timer,
+ .init_early = msm7x2x_init_early,
+ .handle_irq = vic_handle_irq,
+MACHINE_END
+MACHINE_START(MSM7625A_FFA, "QCT MSM7625a FFA")
+ .atag_offset = 0x100,
+ .map_io = msm_common_io_init,
+ .reserve = msm7x27a_reserve,
+ .init_irq = msm_init_irq,
+ .init_machine = msm7x2x_init,
+ .timer = &msm_timer,
+ .init_early = msm7x2x_init_early,
+ .handle_irq = vic_handle_irq,
+MACHINE_END
+MACHINE_START(MSM8625_RUMI3, "QCT MSM8625 RUMI3")
+ .atag_offset = 0x100,
+ .map_io = msm8625_map_io,
+ .reserve = msm8625_reserve,
+ .init_irq = msm8625_init_irq,
+ .init_machine = msm8625_rumi3_init,
+ .timer = &msm_timer,
+ .handle_irq = gic_handle_irq,
+MACHINE_END
+MACHINE_START(MSM8625_SURF, "QCT MSM8625 SURF")
+ .atag_offset = 0x100,
+ .map_io = msm8625_map_io,
+ .reserve = msm8625_reserve,
+ .init_irq = msm8625_init_irq,
+ .init_machine = msm7x2x_init,
+ .timer = &msm_timer,
+ .init_early = msm7x2x_init_early,
+ .handle_irq = gic_handle_irq,
+MACHINE_END
+MACHINE_START(MSM8625_FFA, "QCT MSM8625 FFA")
+ .atag_offset = 0x100,
+ .map_io = msm8625_map_io,
+ .reserve = msm8625_reserve,
+ .init_irq = msm8625_init_irq,
+ .init_machine = msm7x2x_init,
+ .timer = &msm_timer,
+ .init_early = msm7x2x_init_early,
+ .handle_irq = gic_handle_irq,
+MACHINE_END