Merge commit 'AU_LINUX_ANDROID_ICS.04.00.04.00.126' into msm-3.4
AU_LINUX_ANDROID_ICS.04.00.04.00.126 from msm-3.0.
First parent is from google/android-3.4.
* commit 'AU_LINUX_ANDROID_ICS.04.00.04.00.126': (8712 commits)
PRNG: Device tree entry for qrng device.
vidc:1080p: Set video core timeout value for Thumbnail mode
msm: sps: improve the debugging support in SPS driver
board-8064 msm: Overlap secure and non secure video firmware heaps.
msm: clock: Add handoff ops for 7x30 and copper XO clocks
msm_fb: display: Wait for external vsync before DTV IOMMU unmap
msm: Fix ciruclar dependency in debug UART settings
msm: gdsc: Add GDSC regulator driver for msm-copper
defconfig: Enable Mobicore Driver.
mobicore: Add mobicore driver.
mobicore: rename variable to lower case.
mobicore: rename folder.
mobicore: add makefiles
mobicore: initial import of kernel driver
ASoC: msm: Add SLIMBUS_2_RX CPU DAI
board-8064-gpio: Update FUNC for EPM SPI CS
msm_fb: display: Remove chicken bit config during video playback
mmc: msm_sdcc: enable the sanitize capability
msm-fb: display: lm2 writeback support on mpq platfroms
msm_fb: display: Disable LVDS phy & pll during panel off
...
Signed-off-by: Steve Muckle <smuckle@codeaurora.org>
diff --git a/drivers/usb/otg/Kconfig b/drivers/usb/otg/Kconfig
index c2902a8..e6c823d 100644
--- a/drivers/usb/otg/Kconfig
+++ b/drivers/usb/otg/Kconfig
@@ -74,6 +74,34 @@
This transceiver supports high and full speed devices plus,
in host mode, low speed.
+config USB_MSM_OTG_72K
+ bool "OTG support for Legcay Qualcomm on-chip USB controller"
+ depends on ARCH_MSM
+ select USB_OTG_UTILS
+ default USB_MSM_72K
+ help
+ Enable this to support the USB OTG transceiver on MSM chips. It
+ handles PHY initialization, clock management, low power mode and
+ workarounds required after resetting the hardware. This driver is
+ required for even peripheral only or host only mode configuration.
+ Supports SRP and HNP when both gadget and Host are selected.
+
+config MSM_OTG_ENABLE_A_WAIT_BCON_TIMEOUT
+ bool "Enable A-device timeout for B-device connection"
+ depends on USB_MSM_OTG_72K
+ default n
+ help
+ OTG specification allows A-device to turn off VBUS if B-device
+ fails to signal connect event before TA_WAIT_BCON (1.1 - 30 sec).
+ SRP detection is enabled and hardware is put into low power mode
+ upon this timeout.
+
+ If you say yes, VBUS will be turned off if B-device does not signal
+ connect in 30 sec. Otherwise VBUS is not turned off when Micro-A
+ cable is connected. But hardware is put into LPM. Say no if leakage
+ currents in your system are minimum.
+
+
config TWL6030_USB
tristate "TWL6030 USB Transceiver Driver"
depends on TWL4030_CORE
@@ -107,6 +135,25 @@
This driver is not supported on boards like trout which
has an external PHY.
+config USB_MSM_ACA
+ bool "Support for Accessory Charger Adapter (ACA)"
+ depends on (USB_MSM_OTG || USB_MSM_OTG_72K) && ARCH_MSM
+ default n
+ help
+ Accesory Charger Adapter is a charger specified in USB Battery
+ Charging Specification(1.1). It enables OTG devices to charge
+ while operating as a host or peripheral at the same time.
+
+config USB_MSM_STANDARD_ACA
+ bool "Support for Standard ACA"
+ depends on USB_MSM_ACA
+ default USB_MSM_OTG_72K
+ help
+ A Standard ACA has a Standard-A receptacle on the Accessory Port,
+ and can only be attached to a B-device. RID_A and RID_GND states
+ are only possible with Standard ACA. Select this feature if the
+ board is intended to support only Standard ACA.
+
config AB8500_USB
tristate "AB8500 USB Transceiver Driver"
depends on AB8500_CORE
diff --git a/drivers/usb/otg/Makefile b/drivers/usb/otg/Makefile
index 638d040..5afb02e 100644
--- a/drivers/usb/otg/Makefile
+++ b/drivers/usb/otg/Makefile
@@ -17,6 +17,7 @@
obj-$(CONFIG_NOP_USB_XCEIV) += nop-usb-xceiv.o
obj-$(CONFIG_USB_ULPI) += ulpi.o
obj-$(CONFIG_USB_ULPI_VIEWPORT) += ulpi_viewport.o
+obj-$(CONFIG_USB_MSM_OTG_72K) += msm72k_otg.o
obj-$(CONFIG_USB_MSM_OTG) += msm_otg.o
obj-$(CONFIG_AB8500_USB) += ab8500-usb.o
fsl_usb2_otg-objs := fsl_otg.o otg_fsm.o
diff --git a/drivers/usb/otg/msm72k_otg.c b/drivers/usb/otg/msm72k_otg.c
new file mode 100644
index 0000000..f62ae76
--- /dev/null
+++ b/drivers/usb/otg/msm72k_otg.c
@@ -0,0 +1,3036 @@
+/* Copyright (c) 2009-2012, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <linux/module.h>
+#include <linux/device.h>
+#include <linux/platform_device.h>
+#include <linux/clk.h>
+#include <linux/interrupt.h>
+#include <linux/err.h>
+#include <linux/delay.h>
+#include <linux/io.h>
+#include <linux/ioport.h>
+#include <linux/pm_runtime.h>
+
+#include <linux/device.h>
+#include <linux/pm_qos.h>
+#include <mach/msm_hsusb_hw.h>
+#include <mach/msm72k_otg.h>
+#include <mach/msm_hsusb.h>
+#include <linux/debugfs.h>
+#include <linux/uaccess.h>
+#include <mach/clk.h>
+#include <mach/msm_xo.h>
+
+#define MSM_USB_BASE (dev->regs)
+#define USB_LINK_RESET_TIMEOUT (msecs_to_jiffies(10))
+#define DRIVER_NAME "msm_otg"
+static void otg_reset(struct usb_phy *phy, int phy_reset);
+static void msm_otg_set_vbus_state(int online);
+#ifdef CONFIG_USB_EHCI_MSM_72K
+static void msm_otg_set_id_state(int id);
+#else
+static void msm_otg_set_id_state(int id)
+{
+}
+#endif
+
+struct msm_otg *the_msm_otg;
+
+static int is_host(void)
+{
+ struct msm_otg *dev = the_msm_otg;
+
+ if (dev->pdata->otg_mode == OTG_ID)
+ return (OTGSC_ID & readl(USB_OTGSC)) ? 0 : 1;
+ else
+ return !test_bit(ID, &dev->inputs);
+}
+
+static int is_b_sess_vld(void)
+{
+ struct msm_otg *dev = the_msm_otg;
+
+ if (dev->pdata->otg_mode == OTG_ID)
+ return (OTGSC_BSV & readl(USB_OTGSC)) ? 1 : 0;
+ else
+ return test_bit(B_SESS_VLD, &dev->inputs);
+}
+
+static unsigned ulpi_read(struct msm_otg *dev, unsigned reg)
+{
+ unsigned ret, timeout = 100000;
+ unsigned long flags;
+
+ spin_lock_irqsave(&dev->lock, flags);
+
+ /* initiate read operation */
+ writel(ULPI_RUN | ULPI_READ | ULPI_ADDR(reg),
+ USB_ULPI_VIEWPORT);
+
+ /* wait for completion */
+ while ((readl(USB_ULPI_VIEWPORT) & ULPI_RUN) && (--timeout))
+ cpu_relax();
+
+ if (timeout == 0) {
+ pr_err("%s: timeout %08x\n", __func__,
+ readl(USB_ULPI_VIEWPORT));
+ spin_unlock_irqrestore(&dev->lock, flags);
+ return 0xffffffff;
+ }
+ ret = ULPI_DATA_READ(readl(USB_ULPI_VIEWPORT));
+
+ spin_unlock_irqrestore(&dev->lock, flags);
+
+ return ret;
+}
+
+static int ulpi_write(struct msm_otg *dev, unsigned val, unsigned reg)
+{
+ unsigned timeout = 10000;
+ unsigned long flags;
+
+ spin_lock_irqsave(&dev->lock, flags);
+
+ /* initiate write operation */
+ writel(ULPI_RUN | ULPI_WRITE |
+ ULPI_ADDR(reg) | ULPI_DATA(val),
+ USB_ULPI_VIEWPORT);
+
+ /* wait for completion */
+ while ((readl(USB_ULPI_VIEWPORT) & ULPI_RUN) && (--timeout))
+ ;
+
+ if (timeout == 0) {
+ pr_err("%s: timeout\n", __func__);
+ spin_unlock_irqrestore(&dev->lock, flags);
+ return -1;
+ }
+
+ spin_unlock_irqrestore(&dev->lock, flags);
+
+ return 0;
+}
+
+static int usb_ulpi_write(struct usb_phy *xceiv, u32 val, u32 reg)
+{
+ struct msm_otg *dev = container_of(xceiv, struct msm_otg, phy);
+
+ return ulpi_write(dev, val, reg);
+}
+
+static int usb_ulpi_read(struct usb_phy *xceiv, u32 reg)
+{
+ struct msm_otg *dev = container_of(xceiv, struct msm_otg, phy);
+
+ return ulpi_read(dev, reg);
+}
+
+#ifdef CONFIG_USB_EHCI_MSM_72K
+static void enable_idgnd(struct msm_otg *dev)
+{
+ unsigned temp;
+
+ /* Do nothing if instead of ID pin, USER controls mode switch */
+ if (dev->pdata->otg_mode == OTG_USER_CONTROL)
+ return;
+
+ ulpi_write(dev, (1<<4), 0x0E);
+ ulpi_write(dev, (1<<4), 0x11);
+ ulpi_write(dev, (1<<0), 0x0B);
+ temp = OTGSC_IDIE | OTGSC_IDPU;
+ writel_relaxed(readl_relaxed(USB_OTGSC) | temp, USB_OTGSC);
+}
+
+static void disable_idgnd(struct msm_otg *dev)
+{
+ unsigned temp;
+
+ /* Do nothing if instead of ID pin, USER controls mode switch */
+ if (dev->pdata->otg_mode == OTG_USER_CONTROL)
+ return;
+ temp = OTGSC_IDIE | OTGSC_IDPU;
+ writel_relaxed(readl_relaxed(USB_OTGSC) & ~temp, USB_OTGSC);
+ ulpi_write(dev, (1<<4), 0x0F);
+ ulpi_write(dev, (1<<4), 0x12);
+ ulpi_write(dev, (1<<0), 0x0C);
+}
+#else
+static void enable_idgnd(struct msm_otg *dev)
+{
+}
+static void disable_idgnd(struct msm_otg *dev)
+{
+}
+#endif
+
+static void enable_idabc(struct msm_otg *dev)
+{
+#ifdef CONFIG_USB_MSM_ACA
+ ulpi_write(dev, (1<<5), 0x0E);
+ ulpi_write(dev, (1<<5), 0x11);
+#endif
+}
+static void disable_idabc(struct msm_otg *dev)
+{
+#ifdef CONFIG_USB_MSM_ACA
+ ulpi_write(dev, (1<<5), 0x0F);
+ ulpi_write(dev, (1<<5), 0x12);
+#endif
+}
+
+static void enable_sess_valid(struct msm_otg *dev)
+{
+ /* Do nothing if instead of ID pin, USER controls mode switch */
+ if (dev->pdata->otg_mode == OTG_USER_CONTROL)
+ return;
+
+ ulpi_write(dev, (1<<2), 0x0E);
+ ulpi_write(dev, (1<<2), 0x11);
+ writel(readl(USB_OTGSC) | OTGSC_BSVIE, USB_OTGSC);
+}
+
+static void disable_sess_valid(struct msm_otg *dev)
+{
+ /* Do nothing if instead of ID pin, USER controls mode switch */
+ if (dev->pdata->otg_mode == OTG_USER_CONTROL)
+ return;
+
+ ulpi_write(dev, (1<<2), 0x0F);
+ ulpi_write(dev, (1<<2), 0x12);
+ writel(readl(USB_OTGSC) & ~OTGSC_BSVIE, USB_OTGSC);
+}
+#ifdef CONFIG_USB_MSM_ACA
+static void set_aca_id_inputs(struct msm_otg *dev)
+{
+ u8 phy_ints;
+
+ phy_ints = ulpi_read(dev, 0x13);
+ if (phy_ints == -ETIMEDOUT)
+ return;
+
+ pr_debug("phy_ints = %x\n", phy_ints);
+ clear_bit(ID_A, &dev->inputs);
+ clear_bit(ID_B, &dev->inputs);
+ clear_bit(ID_C, &dev->inputs);
+ if (phy_id_state_a(phy_ints)) {
+ pr_debug("ID_A set\n");
+ set_bit(ID_A, &dev->inputs);
+ set_bit(A_BUS_REQ, &dev->inputs);
+ } else if (phy_id_state_b(phy_ints)) {
+ pr_debug("ID_B set\n");
+ set_bit(ID_B, &dev->inputs);
+ } else if (phy_id_state_c(phy_ints)) {
+ pr_debug("ID_C set\n");
+ set_bit(ID_C, &dev->inputs);
+ }
+ if (is_b_sess_vld())
+ set_bit(B_SESS_VLD, &dev->inputs);
+ else
+ clear_bit(B_SESS_VLD, &dev->inputs);
+}
+#define get_aca_bmaxpower(dev) (dev->b_max_power)
+#define set_aca_bmaxpower(dev, power) (dev->b_max_power = power)
+#else
+static void set_aca_id_inputs(struct msm_otg *dev)
+{
+}
+#define get_aca_bmaxpower(dev) 0
+#define set_aca_bmaxpower(dev, power)
+#endif
+static inline void set_pre_emphasis_level(struct msm_otg *dev)
+{
+ unsigned res = 0;
+
+ if (!dev->pdata || dev->pdata->pemp_level == PRE_EMPHASIS_DEFAULT)
+ return;
+
+ res = ulpi_read(dev, ULPI_CONFIG_REG3);
+ res &= ~(ULPI_PRE_EMPHASIS_MASK);
+ if (dev->pdata->pemp_level != PRE_EMPHASIS_DISABLE)
+ res |= dev->pdata->pemp_level;
+ ulpi_write(dev, res, ULPI_CONFIG_REG3);
+}
+
+static inline void set_hsdrv_slope(struct msm_otg *dev)
+{
+ unsigned res = 0;
+
+ if (!dev->pdata || dev->pdata->hsdrvslope == HS_DRV_SLOPE_DEFAULT)
+ return;
+
+ res = ulpi_read(dev, ULPI_CONFIG_REG3);
+ res &= ~(ULPI_HSDRVSLOPE_MASK);
+ res |= (dev->pdata->hsdrvslope & ULPI_HSDRVSLOPE_MASK);
+ ulpi_write(dev, res, ULPI_CONFIG_REG3);
+}
+
+static inline void set_cdr_auto_reset(struct msm_otg *dev)
+{
+ unsigned res = 0;
+
+ if (!dev->pdata || dev->pdata->cdr_autoreset == CDR_AUTO_RESET_DEFAULT)
+ return;
+
+ res = ulpi_read(dev, ULPI_DIGOUT_CTRL);
+ if (dev->pdata->cdr_autoreset == CDR_AUTO_RESET_ENABLE)
+ res &= ~ULPI_CDR_AUTORESET;
+ else
+ res |= ULPI_CDR_AUTORESET;
+ ulpi_write(dev, res, ULPI_DIGOUT_CTRL);
+}
+
+static inline void set_se1_gating(struct msm_otg *dev)
+{
+ unsigned res = 0;
+
+ if (!dev->pdata || dev->pdata->se1_gating == SE1_GATING_DEFAULT)
+ return;
+
+ res = ulpi_read(dev, ULPI_DIGOUT_CTRL);
+ if (dev->pdata->se1_gating == SE1_GATING_ENABLE)
+ res &= ~ULPI_SE1_GATE;
+ else
+ res |= ULPI_SE1_GATE;
+ ulpi_write(dev, res, ULPI_DIGOUT_CTRL);
+}
+static inline void set_driver_amplitude(struct msm_otg *dev)
+{
+ unsigned res = 0;
+
+ if (!dev->pdata || dev->pdata->drv_ampl == HS_DRV_AMPLITUDE_DEFAULT)
+ return;
+
+ res = ulpi_read(dev, ULPI_CONFIG_REG2);
+ res &= ~ULPI_DRV_AMPL_MASK;
+ if (dev->pdata->drv_ampl != HS_DRV_AMPLITUDE_ZERO_PERCENT)
+ res |= dev->pdata->drv_ampl;
+ ulpi_write(dev, res, ULPI_CONFIG_REG2);
+}
+
+static const char *state_string(enum usb_otg_state state)
+{
+ switch (state) {
+ case OTG_STATE_A_IDLE: return "a_idle";
+ case OTG_STATE_A_WAIT_VRISE: return "a_wait_vrise";
+ case OTG_STATE_A_WAIT_BCON: return "a_wait_bcon";
+ case OTG_STATE_A_HOST: return "a_host";
+ case OTG_STATE_A_SUSPEND: return "a_suspend";
+ case OTG_STATE_A_PERIPHERAL: return "a_peripheral";
+ case OTG_STATE_A_WAIT_VFALL: return "a_wait_vfall";
+ case OTG_STATE_A_VBUS_ERR: return "a_vbus_err";
+ case OTG_STATE_B_IDLE: return "b_idle";
+ case OTG_STATE_B_SRP_INIT: return "b_srp_init";
+ case OTG_STATE_B_PERIPHERAL: return "b_peripheral";
+ case OTG_STATE_B_WAIT_ACON: return "b_wait_acon";
+ case OTG_STATE_B_HOST: return "b_host";
+ default: return "UNDEFINED";
+ }
+}
+
+static const char *timer_string(int bit)
+{
+ switch (bit) {
+ case A_WAIT_VRISE: return "a_wait_vrise";
+ case A_WAIT_VFALL: return "a_wait_vfall";
+ case B_SRP_FAIL: return "b_srp_fail";
+ case A_WAIT_BCON: return "a_wait_bcon";
+ case A_AIDL_BDIS: return "a_aidl_bdis";
+ case A_BIDL_ADIS: return "a_bidl_adis";
+ case B_ASE0_BRST: return "b_ase0_brst";
+ default: return "UNDEFINED";
+ }
+}
+
+/* Prevent idle power collapse(pc) while operating in peripheral mode */
+static void otg_pm_qos_update_latency(struct msm_otg *dev, int vote)
+{
+ struct msm_otg_platform_data *pdata = dev->pdata;
+ u32 swfi_latency = 0;
+
+ if (pdata)
+ swfi_latency = pdata->swfi_latency + 1;
+
+ if (vote)
+ pm_qos_update_request(&pdata->pm_qos_req_dma,
+ swfi_latency);
+ else
+ pm_qos_update_request(&pdata->pm_qos_req_dma,
+ PM_QOS_DEFAULT_VALUE);
+}
+
+/* Controller gives interrupt for every 1 mesc if 1MSIE is set in OTGSC.
+ * This interrupt can be used as a timer source and OTG timers can be
+ * implemented. But hrtimers on MSM hardware can give atleast 1/32 KHZ
+ * precision. This precision is more than enough for OTG timers.
+ */
+static enum hrtimer_restart msm_otg_timer_func(struct hrtimer *_timer)
+{
+ struct msm_otg *dev = container_of(_timer, struct msm_otg, timer);
+
+ /* Phy lockup issues are observed when VBUS Valid interrupt is
+ * enabled. Hence set A_VBUS_VLD upon timer exipration.
+ */
+ if (dev->active_tmout == A_WAIT_VRISE)
+ set_bit(A_VBUS_VLD, &dev->inputs);
+ else
+ set_bit(dev->active_tmout, &dev->tmouts);
+
+ pr_debug("expired %s timer\n", timer_string(dev->active_tmout));
+ queue_work(dev->wq, &dev->sm_work);
+ return HRTIMER_NORESTART;
+}
+
+static void msm_otg_del_timer(struct msm_otg *dev)
+{
+ int bit = dev->active_tmout;
+
+ pr_debug("deleting %s timer. remaining %lld msec \n", timer_string(bit),
+ div_s64(ktime_to_us(hrtimer_get_remaining(&dev->timer)),
+ 1000));
+ hrtimer_cancel(&dev->timer);
+ clear_bit(bit, &dev->tmouts);
+}
+
+static void msm_otg_start_timer(struct msm_otg *dev, int time, int bit)
+{
+ clear_bit(bit, &dev->tmouts);
+ dev->active_tmout = bit;
+ pr_debug("starting %s timer\n", timer_string(bit));
+ hrtimer_start(&dev->timer,
+ ktime_set(time / 1000, (time % 1000) * 1000000),
+ HRTIMER_MODE_REL);
+}
+
+/* No two otg timers run in parallel. So one hrtimer is sufficient */
+static void msm_otg_init_timer(struct msm_otg *dev)
+{
+ hrtimer_init(&dev->timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
+ dev->timer.function = msm_otg_timer_func;
+}
+
+static const char *event_string(enum usb_otg_event event)
+{
+ switch (event) {
+ case OTG_EVENT_DEV_CONN_TMOUT:
+ return "DEV_CONN_TMOUT";
+ case OTG_EVENT_NO_RESP_FOR_HNP_ENABLE:
+ return "NO_RESP_FOR_HNP_ENABLE";
+ case OTG_EVENT_HUB_NOT_SUPPORTED:
+ return "HUB_NOT_SUPPORTED";
+ case OTG_EVENT_DEV_NOT_SUPPORTED:
+ return "DEV_NOT_SUPPORTED,";
+ case OTG_EVENT_HNP_FAILED:
+ return "HNP_FAILED";
+ case OTG_EVENT_NO_RESP_FOR_SRP:
+ return "NO_RESP_FOR_SRP";
+ default:
+ return "UNDEFINED";
+ }
+}
+
+static int msm_otg_send_event(struct usb_otg *otg,
+ enum usb_otg_event event)
+{
+ char module_name[16];
+ char udev_event[128];
+ char *envp[] = { module_name, udev_event, NULL };
+ int ret;
+
+ pr_debug("sending %s event\n", event_string(event));
+
+ snprintf(module_name, 16, "MODULE=%s", DRIVER_NAME);
+ snprintf(udev_event, 128, "EVENT=%s", event_string(event));
+ ret = kobject_uevent_env(&otg->phy->dev->kobj, KOBJ_CHANGE, envp);
+ if (ret < 0)
+ pr_info("uevent sending failed with ret = %d\n", ret);
+ return ret;
+}
+
+static int msm_otg_start_hnp(struct usb_otg *otg)
+{
+ struct msm_otg *dev = container_of(otg->phy, struct msm_otg, phy);
+ enum usb_otg_state state;
+ unsigned long flags;
+
+ spin_lock_irqsave(&dev->lock, flags);
+ state = dev->phy.state;
+ spin_unlock_irqrestore(&dev->lock, flags);
+
+ if (state != OTG_STATE_A_HOST) {
+ pr_err("HNP can not be initiated in %s state\n",
+ state_string(state));
+ return -EINVAL;
+ }
+
+ pr_debug("A-Host: HNP initiated\n");
+ clear_bit(A_BUS_REQ, &dev->inputs);
+ wake_lock(&dev->wlock);
+ queue_work(dev->wq, &dev->sm_work);
+ return 0;
+}
+
+static int msm_otg_start_srp(struct usb_otg *otg)
+{
+ struct msm_otg *dev = container_of(otg->phy, struct msm_otg, phy);
+ u32 val;
+ int ret = 0;
+ enum usb_otg_state state;
+ unsigned long flags;
+
+ spin_lock_irqsave(&dev->lock, flags);
+ state = dev->phy.state;
+ spin_unlock_irqrestore(&dev->lock, flags);
+
+ if (state != OTG_STATE_B_IDLE) {
+ pr_err("SRP can not be initiated in %s state\n",
+ state_string(state));
+ ret = -EINVAL;
+ goto out;
+ }
+
+ if ((jiffies - dev->b_last_se0_sess) < msecs_to_jiffies(TB_SRP_INIT)) {
+ pr_debug("initial conditions of SRP are not met. Try again"
+ "after some time\n");
+ ret = -EAGAIN;
+ goto out;
+ }
+
+ /* Harware auto assist data pulsing: Data pulse is given
+ * for 7msec; wait for vbus
+ */
+ val = readl(USB_OTGSC);
+ writel((val & ~OTGSC_INTR_STS_MASK) | OTGSC_HADP, USB_OTGSC);
+
+ /* VBUS plusing is obsoleted in OTG 2.0 supplement */
+out:
+ return ret;
+}
+
+static int msm_otg_set_power(struct usb_phy *xceiv, unsigned mA)
+{
+ static enum chg_type curr_chg = USB_CHG_TYPE__INVALID;
+ struct msm_otg *dev = container_of(xceiv, struct msm_otg, phy);
+ struct msm_otg_platform_data *pdata = dev->pdata;
+ enum chg_type new_chg = atomic_read(&dev->chg_type);
+ unsigned charge = mA;
+
+ /* Call chg_connected only if the charger has changed */
+ if (new_chg != curr_chg && pdata->chg_connected) {
+ curr_chg = new_chg;
+ pdata->chg_connected(new_chg);
+ }
+
+ /* Always use USB_IDCHG_MAX for charging in ID_B and ID_C */
+ if (test_bit(ID_C, &dev->inputs) ||
+ test_bit(ID_B, &dev->inputs))
+ charge = USB_IDCHG_MAX;
+
+ pr_debug("Charging with %dmA current\n", charge);
+ /* Call vbus_draw only if the charger is of known type and also
+ * ignore request to stop charging as a result of suspend interrupt
+ * when wall-charger is used.
+ */
+ if (pdata->chg_vbus_draw && new_chg != USB_CHG_TYPE__INVALID &&
+ (charge || new_chg != USB_CHG_TYPE__WALLCHARGER))
+ pdata->chg_vbus_draw(charge);
+
+ if (new_chg == USB_CHG_TYPE__WALLCHARGER) {
+ wake_lock(&dev->wlock);
+ queue_work(dev->wq, &dev->sm_work);
+ }
+
+ return 0;
+}
+
+static int msm_otg_set_clk(struct usb_phy *xceiv, int on)
+{
+ struct msm_otg *dev = container_of(xceiv, struct msm_otg, phy);
+
+ if (!dev || (dev != the_msm_otg))
+ return -ENODEV;
+
+ if (on)
+ /* enable clocks */
+ clk_prepare_enable(dev->alt_core_clk);
+ else
+ clk_disable_unprepare(dev->alt_core_clk);
+
+ return 0;
+}
+static void msm_otg_start_peripheral(struct usb_otg *otg, int on)
+{
+ struct msm_otg *dev = container_of(otg->phy, struct msm_otg, phy);
+ struct msm_otg_platform_data *pdata = dev->pdata;
+
+ if (!otg->gadget)
+ return;
+
+ if (on) {
+ if (pdata->setup_gpio)
+ pdata->setup_gpio(USB_SWITCH_PERIPHERAL);
+ /* vote for minimum dma_latency to prevent idle
+ * power collapse(pc) while running in peripheral mode.
+ */
+ otg_pm_qos_update_latency(dev, 1);
+
+ /* increment the clk reference count so that
+ * it would be still on when disabled from
+ * low power mode routine
+ */
+ if (dev->pdata->pclk_required_during_lpm)
+ clk_prepare_enable(dev->iface_clk);
+
+ usb_gadget_vbus_connect(otg->gadget);
+ } else {
+ atomic_set(&dev->chg_type, USB_CHG_TYPE__INVALID);
+ usb_gadget_vbus_disconnect(otg->gadget);
+
+ /* decrement the clk reference count so that
+ * it would be off when disabled from
+ * low power mode routine
+ */
+ if (dev->pdata->pclk_required_during_lpm)
+ clk_disable_unprepare(dev->iface_clk);
+
+ otg_pm_qos_update_latency(dev, 0);
+ if (pdata->setup_gpio)
+ pdata->setup_gpio(USB_SWITCH_DISABLE);
+ }
+}
+
+static void msm_otg_start_host(struct usb_otg *otg, int on)
+{
+ struct msm_otg *dev = container_of(otg->phy, struct msm_otg, phy);
+ struct msm_otg_platform_data *pdata = dev->pdata;
+
+ if (!otg->host)
+ return;
+
+ if (dev->start_host) {
+ /* Some targets, e.g. ST1.5, use GPIO to choose b/w connector */
+ if (on && pdata->setup_gpio)
+ pdata->setup_gpio(USB_SWITCH_HOST);
+
+ /* increment or decrement the clk reference count
+ * to avoid usb h/w lockup issues when low power
+ * mode is initiated and vbus is on.
+ */
+ if (dev->pdata->pclk_required_during_lpm) {
+ if (on)
+ clk_prepare_enable(dev->iface_clk);
+ else
+ clk_disable_unprepare(dev->iface_clk);
+ }
+
+ dev->start_host(otg->host, on);
+
+ if (!on && pdata->setup_gpio)
+ pdata->setup_gpio(USB_SWITCH_DISABLE);
+ }
+}
+
+static int msm_otg_suspend(struct msm_otg *dev)
+{
+ unsigned long timeout;
+ bool host_bus_suspend;
+ unsigned ret;
+ enum chg_type chg_type = atomic_read(&dev->chg_type);
+ unsigned long flags;
+
+ disable_irq(dev->irq);
+ if (atomic_read(&dev->in_lpm))
+ goto out;
+#ifdef CONFIG_USB_MSM_ACA
+ /*
+ * ACA interrupts are disabled before entering into LPM.
+ * If LPM is allowed in host mode with accessory charger
+ * connected or only accessory charger is connected,
+ * there is a chance that charger is removed and we will
+ * not know about it.
+ *
+ * REVISIT
+ *
+ * Allowing LPM in case of gadget bus suspend is tricky.
+ * Bus suspend can happen in two states.
+ * 1. ID_float: Allowing LPM has pros and cons. If LPM is allowed
+ * and accessory charger is connected, we miss ID_float --> ID_C
+ * transition where we could draw large amount of current
+ * compared to the suspend current.
+ * 2. ID_C: We can not allow LPM. If accessory charger is removed
+ * we should not draw more than what host could supply which will
+ * be less compared to accessory charger.
+ *
+ * For simplicity, LPM is not allowed in bus suspend.
+ */
+#ifndef CONFIG_USB_MSM_STANDARD_ACA
+ /*
+ * RID_A and IdGnd states are only possible with standard ACA. We can
+ * exit from low power mode with !BSV or IdGnd interrupt. Hence LPM
+ * is allowed.
+ */
+ if ((test_bit(ID, &dev->inputs) && test_bit(B_SESS_VLD, &dev->inputs) &&
+ chg_type != USB_CHG_TYPE__WALLCHARGER) ||
+ test_bit(ID_A, &dev->inputs))
+ goto out;
+#endif
+ /* Disable ID_abc interrupts else it causes spurious interrupt */
+ disable_idabc(dev);
+#endif
+ ulpi_read(dev, 0x14);/* clear PHY interrupt latch register */
+
+ /*
+ * Turn on PHY comparators if,
+ * 1. USB wall charger is connected (bus suspend is not supported)
+ * 2. Host bus suspend
+ * 3. host is supported, but, id is not routed to pmic
+ * 4. peripheral is supported, but, vbus is not routed to pmic
+ */
+ host_bus_suspend = dev->phy.otg->host && is_host();
+
+ /*
+ * Configure the PMIC ID only in case of cable disconnect.
+ * PMIC doesn't generate interrupt for ID_GND to ID_A
+ * transistion. hence use the PHY ID cricuit.
+ */
+ if (dev->pdata->pmic_id_notif_init && !host_bus_suspend &&
+ !test_bit(ID_A, &dev->inputs)) {
+ disable_idgnd(dev);
+ ret = dev->pdata->pmic_id_notif_init(
+ &msm_otg_set_id_state, 1);
+ if (!ret) {
+ dev->pmic_id_notif_supp = 1;
+ if (dev->pdata->pmic_id_irq)
+ dev->id_irq = dev->pdata->pmic_id_irq;
+ } else if (ret == -ENOTSUPP) {
+ pr_debug("%s:USB ID is not routed to pmic",
+ __func__);
+ enable_idgnd(dev);
+ } else {
+ pr_err("%s: pmic_id_ notif_init failed err:%d",
+ __func__, ret);
+ }
+ }
+
+ if ((dev->phy.otg->gadget && chg_type == USB_CHG_TYPE__WALLCHARGER) ||
+ host_bus_suspend ||
+ (dev->phy.otg->host && !dev->pmic_id_notif_supp) ||
+ (dev->phy.otg->gadget && !dev->pmic_vbus_notif_supp)) {
+ ulpi_write(dev, 0x01, 0x30);
+ }
+
+ ulpi_write(dev, 0x08, 0x09);/* turn off PLL on integrated phy */
+
+ timeout = jiffies + msecs_to_jiffies(500);
+ disable_phy_clk();
+ while (!is_phy_clk_disabled()) {
+ if (time_after(jiffies, timeout)) {
+ pr_err("%s: Unable to suspend phy\n", __func__);
+ /*
+ * Start otg state machine in default state upon
+ * phy suspend failure*/
+ spin_lock_irqsave(&dev->lock, flags);
+ dev->phy.state = OTG_STATE_UNDEFINED;
+ spin_unlock_irqrestore(&dev->lock, flags);
+ queue_work(dev->wq, &dev->sm_work);
+ goto out;
+ }
+ msleep(1);
+ /* check if there are any pending interrupts*/
+ if (((readl(USB_OTGSC) & OTGSC_INTR_MASK) >> 8) &
+ readl(USB_OTGSC)) {
+ enable_idabc(dev);
+ goto out;
+ }
+ }
+
+ writel(readl(USB_USBCMD) | ASYNC_INTR_CTRL | ULPI_STP_CTRL, USB_USBCMD);
+ /* Ensure that above operation is completed before turning off clocks */
+ mb();
+
+ if (dev->iface_clk)
+ clk_disable_unprepare(dev->iface_clk);
+
+ clk_disable_unprepare(dev->core_clk);
+ /* usb phy no more require TCXO clock, hence vote for TCXO disable*/
+ ret = msm_xo_mode_vote(dev->xo_handle, MSM_XO_MODE_OFF);
+ if (ret)
+ pr_err("%s failed to devote for"
+ "TCXO D1 buffer%d\n", __func__, ret);
+
+ if (device_may_wakeup(dev->phy.dev)) {
+ enable_irq_wake(dev->irq);
+ if (dev->vbus_on_irq)
+ enable_irq_wake(dev->vbus_on_irq);
+ if (dev->id_irq)
+ enable_irq_wake(dev->id_irq);
+ }
+
+ atomic_set(&dev->in_lpm, 1);
+
+ /*
+ * TODO: put regulators in low power mode by assuming that
+ * regulators are brought back to active state before PHY
+ * becomes active. But this assumption becomes wrong in case of
+ * ACA charger where PHY itself will generate the wakeup
+ * interrupt. This creates a small window where PHY regulators
+ * are in LPM but PHY is in active state and this patch assumes
+ * that there is no harm with this. Till hw folks confirms this
+ * put regulators in lpm.
+ */
+ if (!host_bus_suspend && dev->pmic_vbus_notif_supp &&
+ !test_bit(ID_A, &dev->inputs)) {
+ pr_debug("phy can power collapse: (%d)\n",
+ can_phy_power_collapse(dev));
+ if (can_phy_power_collapse(dev) && dev->pdata->ldo_enable) {
+ pr_debug("disabling the regulators\n");
+ dev->pdata->ldo_enable(0);
+ }
+ }
+
+ /* phy can interrupts when vddcx is at 0.75, so irrespective
+ * of pmic notification support, configure vddcx @0.75
+ */
+ if (dev->pdata->config_vddcx)
+ dev->pdata->config_vddcx(0);
+ pr_info("%s: usb in low power mode\n", __func__);
+
+out:
+ enable_irq(dev->irq);
+
+ return 0;
+}
+
+static int msm_otg_resume(struct msm_otg *dev)
+{
+ unsigned temp;
+ unsigned ret;
+
+ if (!atomic_read(&dev->in_lpm))
+ return 0;
+ /* vote for vddcx, as PHY cannot tolerate vddcx below 1.0V */
+ if (dev->pdata->config_vddcx) {
+ ret = dev->pdata->config_vddcx(1);
+ if (ret) {
+ pr_err("%s: unable to enable vddcx digital core:%d\n",
+ __func__, ret);
+ }
+ }
+ if (dev->pdata->ldo_set_voltage)
+ dev->pdata->ldo_set_voltage(3400);
+
+ /* Vote for TCXO when waking up the phy */
+ ret = msm_xo_mode_vote(dev->xo_handle, MSM_XO_MODE_ON);
+ if (ret)
+ pr_err("%s failed to vote for"
+ "TCXO D1 buffer%d\n", __func__, ret);
+
+ clk_prepare_enable(dev->core_clk);
+
+ if (dev->iface_clk)
+ clk_prepare_enable(dev->iface_clk);
+
+ temp = readl(USB_USBCMD);
+ temp &= ~ASYNC_INTR_CTRL;
+ temp &= ~ULPI_STP_CTRL;
+ writel(temp, USB_USBCMD);
+
+ if (device_may_wakeup(dev->phy.dev)) {
+ disable_irq_wake(dev->irq);
+ if (dev->vbus_on_irq)
+ disable_irq_wake(dev->vbus_on_irq);
+ if (dev->id_irq)
+ disable_irq_wake(dev->id_irq);
+ }
+
+ atomic_set(&dev->in_lpm, 0);
+
+ pr_info("%s: usb exited from low power mode\n", __func__);
+
+ return 0;
+}
+
+static void msm_otg_get_resume(struct msm_otg *dev)
+{
+#ifdef CONFIG_PM_RUNTIME
+ pm_runtime_get_noresume(dev->phy.dev);
+ pm_runtime_resume(dev->phy.dev);
+#else
+ msm_otg_resume(dev);
+#endif
+}
+
+static void msm_otg_put_suspend(struct msm_otg *dev)
+{
+#ifdef CONFIG_PM_RUNTIME
+ pm_runtime_put_sync(dev->phy.dev);
+ if (!atomic_read(&dev->in_lpm))
+ pm_runtime_get_sync(dev->phy.dev);
+#else
+ msm_otg_suspend(dev);
+#endif
+}
+
+static void msm_otg_resume_w(struct work_struct *w)
+{
+ struct msm_otg *dev = container_of(w, struct msm_otg, otg_resume_work);
+ unsigned long timeout;
+
+ if (can_phy_power_collapse(dev) && dev->pdata->ldo_enable)
+ dev->pdata->ldo_enable(1);
+
+ if (pm_runtime_enabled(dev->phy.dev)) {
+ msm_otg_get_resume(dev);
+ } else {
+ pm_runtime_get_noresume(dev->phy.dev);
+ msm_otg_resume(dev);
+ pm_runtime_set_active(dev->phy.dev);
+ }
+
+ if (!is_phy_clk_disabled())
+ goto phy_resumed;
+
+ timeout = jiffies + usecs_to_jiffies(100);
+ enable_phy_clk();
+ while (is_phy_clk_disabled() || !is_phy_active()) {
+ if (time_after(jiffies, timeout)) {
+ pr_err("%s: Unable to wakeup phy. is_phy_active: %x\n",
+ __func__, !!is_phy_active());
+ /* Reset both phy and link */
+ otg_reset(&dev->phy, 1);
+ break;
+ }
+ udelay(10);
+ }
+
+phy_resumed:
+ /*
+ * It is observed that BSVIS may get set immediatly
+ * after PHY becomes active upon micro-B cable connect.
+ * But BSVIS might get cleared by below enable_idgnd
+ * function which causes hw to not generate the BSV interrupt.
+ * Hence check for BSV interrupt explictly and schedule the
+ * work.
+ */
+ if (readl_relaxed(USB_OTGSC) & OTGSC_BSVIS) {
+ set_bit(B_SESS_VLD, &dev->inputs);
+ queue_work(dev->wq, &dev->sm_work);
+ }
+ if (dev->pmic_id_notif_supp) {
+ dev->pdata->pmic_id_notif_init(&msm_otg_set_id_state, 0);
+ dev->pmic_id_notif_supp = 0;
+ enable_idgnd(dev);
+ }
+
+ /* Enable Idabc interrupts as these were disabled before entering LPM */
+ enable_idabc(dev);
+
+ /*
+ * There is corner case where host won't be resumed
+ * while transitioning from ID_GND to ID_A. In that
+ * IDGND might have cleared and ID_A might not have updated
+ * yet. Hence update the ACA states explicitly.
+ */
+ set_aca_id_inputs(dev);
+
+ /* If resume signalling finishes before lpm exit, PCD is not set in
+ * USBSTS register. Drive resume signal to the downstream device now
+ * so that host driver can process the upcoming port change interrupt.*/
+ if (is_host() || test_bit(ID_A, &dev->inputs)) {
+ writel(readl(USB_PORTSC) | PORTSC_FPR, USB_PORTSC);
+ msm_otg_start_host(dev->phy.otg, REQUEST_RESUME);
+ }
+
+ /* Enable irq which was disabled before scheduling this work.
+ * But don't release wake_lock, as we got async interrupt and
+ * there will be some work pending for OTG state machine.
+ */
+ enable_irq(dev->irq);
+}
+
+static int msm_otg_set_suspend(struct usb_phy *xceiv, int suspend)
+{
+ struct msm_otg *dev = container_of(xceiv, struct msm_otg, phy);
+ enum usb_otg_state state;
+ unsigned long flags;
+
+ if (!dev || (dev != the_msm_otg))
+ return -ENODEV;
+
+ spin_lock_irqsave(&dev->lock, flags);
+ state = dev->phy.state;
+ spin_unlock_irqrestore(&dev->lock, flags);
+
+ pr_debug("suspend request in state: %s\n",
+ state_string(state));
+
+ if (suspend) {
+ switch (state) {
+#ifndef CONFIG_MSM_OTG_ENABLE_A_WAIT_BCON_TIMEOUT
+ case OTG_STATE_A_WAIT_BCON:
+ if (test_bit(ID_A, &dev->inputs))
+ msm_otg_set_power(xceiv, USB_IDCHG_MIN - 100);
+ msm_otg_put_suspend(dev);
+ break;
+#endif
+ case OTG_STATE_A_HOST:
+ clear_bit(A_BUS_REQ, &dev->inputs);
+ wake_lock(&dev->wlock);
+ queue_work(dev->wq, &dev->sm_work);
+ break;
+ case OTG_STATE_B_PERIPHERAL:
+ if (xceiv->otg->gadget->b_hnp_enable) {
+ set_bit(A_BUS_SUSPEND, &dev->inputs);
+ set_bit(B_BUS_REQ, &dev->inputs);
+ wake_lock(&dev->wlock);
+ queue_work(dev->wq, &dev->sm_work);
+ }
+ break;
+ case OTG_STATE_A_PERIPHERAL:
+ msm_otg_start_timer(dev, TA_BIDL_ADIS,
+ A_BIDL_ADIS);
+ break;
+ default:
+ break;
+ }
+ } else {
+ unsigned long timeout;
+
+ switch (state) {
+ case OTG_STATE_A_PERIPHERAL:
+ /* A-peripheral observed activity on bus.
+ * clear A_BIDL_ADIS timer.
+ */
+ msm_otg_del_timer(dev);
+ break;
+ case OTG_STATE_A_SUSPEND:
+ /* Remote wakeup or resume */
+ set_bit(A_BUS_REQ, &dev->inputs);
+ spin_lock_irqsave(&dev->lock, flags);
+ dev->phy.state = OTG_STATE_A_HOST;
+ spin_unlock_irqrestore(&dev->lock, flags);
+ if (test_bit(ID_A, &dev->inputs) &&
+ (get_aca_bmaxpower(dev) < USB_IDCHG_MIN))
+ msm_otg_set_power(xceiv,
+ USB_IDCHG_MIN - get_aca_bmaxpower(dev));
+ break;
+ default:
+ break;
+ }
+
+ if (suspend == atomic_read(&dev->in_lpm))
+ return 0;
+
+ disable_irq(dev->irq);
+ if (dev->pmic_vbus_notif_supp)
+ if (can_phy_power_collapse(dev) &&
+ dev->pdata->ldo_enable)
+ dev->pdata->ldo_enable(1);
+
+ msm_otg_get_resume(dev);
+
+ if (!is_phy_clk_disabled())
+ goto out;
+
+ timeout = jiffies + usecs_to_jiffies(100);
+ enable_phy_clk();
+ while (is_phy_clk_disabled() || !is_phy_active()) {
+ if (time_after(jiffies, timeout)) {
+ pr_err("%s: Unable to wakeup phy. "
+ "is_phy_active: %x\n",
+ __func__, !!is_phy_active());
+ /* Reset both phy and link */
+ otg_reset(&dev->phy, 1);
+ break;
+ }
+ udelay(10);
+ }
+ if (dev->pmic_id_notif_supp) {
+ dev->pdata->pmic_id_notif_init(
+ &msm_otg_set_id_state, 0);
+ dev->pmic_id_notif_supp = 0;
+ enable_idgnd(dev);
+ }
+out:
+ enable_idabc(dev);
+ enable_irq(dev->irq);
+
+ }
+
+ return 0;
+}
+
+static int msm_otg_set_peripheral(struct usb_otg *otg,
+ struct usb_gadget *gadget)
+{
+ struct msm_otg *dev = container_of(otg->phy, struct msm_otg, phy);
+
+ if (!dev || (dev != the_msm_otg))
+ return -ENODEV;
+
+ if (!gadget) {
+ msm_otg_start_peripheral(otg, 0);
+ otg->gadget = 0;
+ disable_sess_valid(dev);
+ if (!otg->host)
+ disable_idabc(dev);
+ return 0;
+ }
+ otg->gadget = gadget;
+ pr_info("peripheral driver registered w/ tranceiver\n");
+
+ wake_lock(&dev->wlock);
+ queue_work(dev->wq, &dev->sm_work);
+ return 0;
+}
+
+#ifdef CONFIG_USB_EHCI_MSM_72K
+static int usbdev_notify(struct notifier_block *self,
+ unsigned long action, void *device)
+{
+ enum usb_otg_state state;
+ struct msm_otg *dev = container_of(self, struct msm_otg, usbdev_nb);
+ struct usb_device *udev = device;
+ int work = 1;
+ unsigned long flags;
+
+ /* Interested in only devices directly connected
+ * to root hub directly.
+ */
+ if (!udev->parent || udev->parent->parent)
+ goto out;
+
+ spin_lock_irqsave(&dev->lock, flags);
+ state = dev->phy.state;
+ spin_unlock_irqrestore(&dev->lock, flags);
+
+ switch (state) {
+ case OTG_STATE_A_WAIT_BCON:
+ if (action == USB_DEVICE_ADD) {
+ pr_debug("B_CONN set\n");
+ set_bit(B_CONN, &dev->inputs);
+ if (udev->actconfig) {
+ set_aca_bmaxpower(dev,
+ udev->actconfig->desc.bMaxPower * 2);
+ goto do_work;
+ }
+ if (udev->portnum == udev->bus->otg_port)
+ set_aca_bmaxpower(dev, USB_IB_UNCFG);
+ else
+ set_aca_bmaxpower(dev, 100);
+ }
+ break;
+ case OTG_STATE_A_HOST:
+ if (action == USB_DEVICE_REMOVE) {
+ pr_debug("B_CONN clear\n");
+ clear_bit(B_CONN, &dev->inputs);
+ set_aca_bmaxpower(dev, 0);
+ }
+ break;
+ default:
+ work = 0;
+ break;
+ }
+do_work:
+ if (work) {
+ wake_lock(&dev->wlock);
+ queue_work(dev->wq, &dev->sm_work);
+ }
+out:
+ return NOTIFY_OK;
+}
+
+static int msm_otg_set_host(struct usb_otg *otg, struct usb_bus *host)
+{
+ struct msm_otg *dev = container_of(otg->phy, struct msm_otg, phy);
+
+ if (!dev || (dev != the_msm_otg))
+ return -ENODEV;
+
+ if (!dev->start_host)
+ return -ENODEV;
+
+ if (!host) {
+ msm_otg_start_host(otg, REQUEST_STOP);
+ usb_unregister_notify(&dev->usbdev_nb);
+ otg->host = 0;
+ dev->start_host = 0;
+ disable_idgnd(dev);
+ if (!otg->gadget)
+ disable_idabc(dev);
+ return 0;
+ }
+#ifdef CONFIG_USB_OTG
+ host->otg_port = 1;
+#endif
+ dev->usbdev_nb.notifier_call = usbdev_notify;
+ usb_register_notify(&dev->usbdev_nb);
+ otg->host = host;
+ pr_info("host driver registered w/ tranceiver\n");
+
+#ifndef CONFIG_USB_MSM_72K
+ wake_lock(&dev->wlock);
+ queue_work(dev->wq, &dev->sm_work);
+#endif
+ return 0;
+}
+
+static void msm_otg_set_id_state(int id)
+{
+ struct msm_otg *dev = the_msm_otg;
+ unsigned long flags;
+
+ if (!atomic_read(&dev->in_lpm))
+ return;
+
+ if (id) {
+ set_bit(ID, &dev->inputs);
+ } else {
+ clear_bit(ID, &dev->inputs);
+ set_bit(A_BUS_REQ, &dev->inputs);
+ }
+ spin_lock_irqsave(&dev->lock, flags);
+ if (dev->phy.state != OTG_STATE_UNDEFINED) {
+ wake_lock(&dev->wlock);
+ queue_work(dev->wq, &dev->sm_work);
+ }
+ spin_unlock_irqrestore(&dev->lock, flags);
+}
+#endif
+
+void msm_otg_set_vbus_state(int online)
+{
+ struct msm_otg *dev = the_msm_otg;
+
+ /*
+ * Process disconnect only for wallcharger
+ * during fast plug-out plug-in at the
+ * AC source side.
+ */
+ if (online)
+ set_bit(B_SESS_VLD, &dev->inputs);
+ else
+ clear_bit(B_SESS_VLD, &dev->inputs);
+
+ wake_lock(&dev->wlock);
+ queue_work(dev->wq, &dev->sm_work);
+}
+
+static irqreturn_t msm_otg_irq(int irq, void *data)
+{
+ struct msm_otg *dev = data;
+ u32 otgsc, sts, pc, sts_mask;
+ irqreturn_t ret = IRQ_HANDLED;
+ int work = 0;
+ enum usb_otg_state state;
+ unsigned long flags;
+
+ if (atomic_read(&dev->in_lpm)) {
+ disable_irq_nosync(dev->irq);
+ wake_lock(&dev->wlock);
+ queue_work(dev->wq, &dev->otg_resume_work);
+ goto out;
+ }
+
+ /* Return immediately if instead of ID pin, USER controls mode switch */
+ if (dev->pdata->otg_mode == OTG_USER_CONTROL)
+ return IRQ_NONE;
+
+
+ otgsc = readl(USB_OTGSC);
+ sts = readl(USB_USBSTS);
+
+ sts_mask = (otgsc & OTGSC_INTR_MASK) >> 8;
+
+ if (!((otgsc & sts_mask) || (sts & STS_PCI))) {
+ ret = IRQ_NONE;
+ goto out;
+ }
+
+ spin_lock_irqsave(&dev->lock, flags);
+ state = dev->phy.state;
+ spin_unlock_irqrestore(&dev->lock, flags);
+
+ pr_debug("IRQ state: %s\n", state_string(state));
+ pr_debug("otgsc = %x\n", otgsc);
+
+ if ((otgsc & OTGSC_IDIE) && (otgsc & OTGSC_IDIS)) {
+ if (otgsc & OTGSC_ID) {
+ pr_debug("Id set\n");
+ set_bit(ID, &dev->inputs);
+ } else {
+ pr_debug("Id clear\n");
+ /* Assert a_bus_req to supply power on
+ * VBUS when Micro/Mini-A cable is connected
+ * with out user intervention.
+ */
+ set_bit(A_BUS_REQ, &dev->inputs);
+ clear_bit(ID, &dev->inputs);
+ }
+ writel(otgsc, USB_OTGSC);
+ work = 1;
+ } else if (otgsc & OTGSC_BSVIS) {
+ writel(otgsc, USB_OTGSC);
+ /* BSV interrupt comes when operating as an A-device
+ * (VBUS on/off).
+ * But, handle BSV when charger is removed from ACA in ID_A
+ */
+ if ((state >= OTG_STATE_A_IDLE) &&
+ !test_bit(ID_A, &dev->inputs))
+ goto out;
+ if (otgsc & OTGSC_BSV) {
+ pr_debug("BSV set\n");
+ set_bit(B_SESS_VLD, &dev->inputs);
+ } else {
+ pr_debug("BSV clear\n");
+ clear_bit(B_SESS_VLD, &dev->inputs);
+ }
+ work = 1;
+ } else if (otgsc & OTGSC_DPIS) {
+ pr_debug("DPIS detected\n");
+ writel(otgsc, USB_OTGSC);
+ set_bit(A_SRP_DET, &dev->inputs);
+ set_bit(A_BUS_REQ, &dev->inputs);
+ work = 1;
+ } else if (sts & STS_PCI) {
+ pc = readl(USB_PORTSC);
+ pr_debug("portsc = %x\n", pc);
+ ret = IRQ_NONE;
+ /* HCD Acks PCI interrupt. We use this to switch
+ * between different OTG states.
+ */
+ work = 1;
+ switch (state) {
+ case OTG_STATE_A_SUSPEND:
+ if (dev->phy.otg->host->b_hnp_enable &&
+ (pc & PORTSC_CSC) &&
+ !(pc & PORTSC_CCS)) {
+ pr_debug("B_CONN clear\n");
+ clear_bit(B_CONN, &dev->inputs);
+ }
+ break;
+ case OTG_STATE_B_WAIT_ACON:
+ if ((pc & PORTSC_CSC) && (pc & PORTSC_CCS)) {
+ pr_debug("A_CONN set\n");
+ set_bit(A_CONN, &dev->inputs);
+ /* Clear ASE0_BRST timer */
+ msm_otg_del_timer(dev);
+ }
+ break;
+ case OTG_STATE_B_HOST:
+ if ((pc & PORTSC_CSC) && !(pc & PORTSC_CCS)) {
+ pr_debug("A_CONN clear\n");
+ clear_bit(A_CONN, &dev->inputs);
+ }
+ break;
+ default:
+ work = 0;
+ break;
+ }
+ }
+ if (work) {
+#ifdef CONFIG_USB_MSM_ACA
+ /* With ACA, ID can change bcoz of BSVIS as well, so update */
+ if ((otgsc & OTGSC_IDIS) || (otgsc & OTGSC_BSVIS))
+ set_aca_id_inputs(dev);
+#endif
+ wake_lock(&dev->wlock);
+ queue_work(dev->wq, &dev->sm_work);
+ }
+out:
+ return ret;
+}
+
+#define ULPI_VERIFY_MAX_LOOP_COUNT 5
+#define PHY_CALIB_RETRY_COUNT 10
+static void phy_clk_reset(struct msm_otg *dev)
+{
+ unsigned rc;
+ enum clk_reset_action assert = CLK_RESET_ASSERT;
+
+ if (dev->pdata->phy_reset_sig_inverted)
+ assert = CLK_RESET_DEASSERT;
+
+ rc = clk_reset(dev->phy_reset_clk, assert);
+ if (rc) {
+ pr_err("%s: phy clk assert failed\n", __func__);
+ return;
+ }
+
+ msleep(1);
+
+ rc = clk_reset(dev->phy_reset_clk, !assert);
+ if (rc) {
+ pr_err("%s: phy clk deassert failed\n", __func__);
+ return;
+ }
+
+ msleep(1);
+}
+
+static unsigned ulpi_read_with_reset(struct msm_otg *dev, unsigned reg)
+{
+ int temp;
+ unsigned res;
+
+ for (temp = 0; temp < ULPI_VERIFY_MAX_LOOP_COUNT; temp++) {
+ res = ulpi_read(dev, reg);
+ if (res != 0xffffffff)
+ return res;
+
+ phy_clk_reset(dev);
+ }
+
+ pr_err("%s: ulpi read failed for %d times\n",
+ __func__, ULPI_VERIFY_MAX_LOOP_COUNT);
+
+ return -1;
+}
+
+static int ulpi_write_with_reset(struct msm_otg *dev,
+unsigned val, unsigned reg)
+{
+ int temp, res;
+
+ for (temp = 0; temp < ULPI_VERIFY_MAX_LOOP_COUNT; temp++) {
+ res = ulpi_write(dev, val, reg);
+ if (!res)
+ return 0;
+ phy_clk_reset(dev);
+ }
+ pr_err("%s: ulpi write failed for %d times\n",
+ __func__, ULPI_VERIFY_MAX_LOOP_COUNT);
+
+ return -1;
+}
+
+/* some of the older targets does not turn off the PLL
+ * if onclock bit is set and clocksuspendM bit is on,
+ * hence clear them too and initiate the suspend mode
+ * by clearing SupendM bit.
+ */
+static inline int turn_off_phy_pll(struct msm_otg *dev)
+{
+ unsigned res;
+
+ res = ulpi_read_with_reset(dev, ULPI_CONFIG_REG1);
+ if (res == 0xffffffff)
+ return -ETIMEDOUT;
+
+ res = ulpi_write_with_reset(dev,
+ res & ~(ULPI_ONCLOCK), ULPI_CONFIG_REG1);
+ if (res)
+ return -ETIMEDOUT;
+
+ res = ulpi_write_with_reset(dev,
+ ULPI_CLOCK_SUSPENDM, ULPI_IFC_CTRL_CLR);
+ if (res)
+ return -ETIMEDOUT;
+
+ /*Clear SuspendM bit to initiate suspend mode */
+ res = ulpi_write_with_reset(dev,
+ ULPI_SUSPENDM, ULPI_FUNC_CTRL_CLR);
+ if (res)
+ return -ETIMEDOUT;
+
+ return res;
+}
+
+static inline int check_phy_caliberation(struct msm_otg *dev)
+{
+ unsigned res;
+
+ res = ulpi_read_with_reset(dev, ULPI_DEBUG);
+
+ if (res == 0xffffffff)
+ return -ETIMEDOUT;
+
+ if (!(res & ULPI_CALIB_STS) && ULPI_CALIB_VAL(res))
+ return 0;
+
+ return -1;
+}
+
+static int msm_otg_phy_caliberate(struct msm_otg *dev)
+{
+ int i = 0;
+ unsigned long res;
+
+ do {
+ res = turn_off_phy_pll(dev);
+ if (res)
+ return -ETIMEDOUT;
+
+ /* bring phy out of suspend */
+ phy_clk_reset(dev);
+
+ res = check_phy_caliberation(dev);
+ if (!res)
+ return res;
+ i++;
+
+ } while (i < PHY_CALIB_RETRY_COUNT);
+
+ return res;
+}
+
+static int msm_otg_phy_reset(struct msm_otg *dev)
+{
+ unsigned rc;
+ unsigned temp;
+ unsigned long timeout;
+
+ rc = clk_reset(dev->alt_core_clk, CLK_RESET_ASSERT);
+ if (rc) {
+ pr_err("%s: usb hs clk assert failed\n", __func__);
+ return -1;
+ }
+
+ phy_clk_reset(dev);
+
+ rc = clk_reset(dev->alt_core_clk, CLK_RESET_DEASSERT);
+ if (rc) {
+ pr_err("%s: usb hs clk deassert failed\n", __func__);
+ return -1;
+ }
+ /* Observing ulpi timeouts as part of PHY calibration. On resetting
+ * the HW link explicity by setting the RESET bit in the USBCMD
+ * register before PHY calibration fixes the ulpi timeout issue.
+ * This workaround is required for unicorn target
+ */
+ writel_relaxed(USBCMD_RESET, USB_USBCMD);
+ timeout = jiffies + USB_LINK_RESET_TIMEOUT;
+ do {
+ if (time_after(jiffies, timeout)) {
+ pr_err("msm_otg: usb link reset timeout\n");
+ break;
+ }
+ usleep_range(1000, 1200);
+ } while (readl_relaxed(USB_USBCMD) & USBCMD_RESET);
+
+ /* select ULPI phy */
+ temp = (readl(USB_PORTSC) & ~PORTSC_PTS);
+ writel(temp | PORTSC_PTS_ULPI, USB_PORTSC);
+
+ if (atomic_read(&dev->chg_type) !=
+ USB_CHG_TYPE__WALLCHARGER) {
+ rc = msm_otg_phy_caliberate(dev);
+ if (rc)
+ return rc;
+ }
+
+ /* TBD: There are two link resets. One is below and other one
+ * is done immediately after this function. See if we can
+ * eliminate one of these.
+ */
+ writel(USBCMD_RESET, USB_USBCMD);
+ timeout = jiffies + USB_LINK_RESET_TIMEOUT;
+ do {
+ if (time_after(jiffies, timeout)) {
+ pr_err("msm_otg: usb link reset timeout\n");
+ break;
+ }
+ msleep(1);
+ } while (readl(USB_USBCMD) & USBCMD_RESET);
+
+ if (readl(USB_USBCMD) & USBCMD_RESET) {
+ pr_err("%s: usb core reset failed\n", __func__);
+ return -1;
+ }
+
+ return 0;
+}
+
+static void otg_reset(struct usb_phy *xceiv, int phy_reset)
+{
+ struct msm_otg *dev = container_of(xceiv, struct msm_otg, phy);
+ unsigned long timeout;
+ u32 mode, work = 0;
+
+ clk_prepare_enable(dev->alt_core_clk);
+
+ if (!phy_reset)
+ goto reset_link;
+
+ if (dev->pdata->phy_reset)
+ dev->pdata->phy_reset(dev->regs);
+ else
+ msm_otg_phy_reset(dev);
+
+ /*disable all phy interrupts*/
+ ulpi_write(dev, 0xFF, 0x0F);
+ ulpi_write(dev, 0xFF, 0x12);
+ msleep(100);
+
+reset_link:
+ writel(USBCMD_RESET, USB_USBCMD);
+ timeout = jiffies + USB_LINK_RESET_TIMEOUT;
+ do {
+ if (time_after(jiffies, timeout)) {
+ pr_err("msm_otg: usb link reset timeout\n");
+ break;
+ }
+ msleep(1);
+ } while (readl(USB_USBCMD) & USBCMD_RESET);
+
+ /* select ULPI phy */
+ writel(0x80000000, USB_PORTSC);
+
+ set_pre_emphasis_level(dev);
+ set_hsdrv_slope(dev);
+ set_cdr_auto_reset(dev);
+ set_driver_amplitude(dev);
+ set_se1_gating(dev);
+
+ writel(0x0, USB_AHB_BURST);
+ writel(0x00, USB_AHB_MODE);
+ if (dev->pdata->bam_disable) {
+ writel_relaxed((readl_relaxed(USB_GEN_CONFIG) |
+ USB_BAM_DISABLE), USB_GEN_CONFIG);
+ pr_debug("%s(): USB_GEN_CONFIG = %x\n",
+ __func__, readl_relaxed(USB_GEN_CONFIG));
+ }
+ /* Ensure that RESET operation is completed before turning off clock */
+ mb();
+
+ clk_disable_unprepare(dev->alt_core_clk);
+
+ if ((xceiv->otg->gadget && xceiv->otg->gadget->is_a_peripheral) ||
+ test_bit(ID, &dev->inputs))
+ mode = USBMODE_SDIS | USBMODE_DEVICE;
+ else
+ mode = USBMODE_SDIS | USBMODE_HOST;
+ writel(mode, USB_USBMODE);
+
+ writel_relaxed((readl_relaxed(USB_OTGSC) | OTGSC_IDPU), USB_OTGSC);
+ if (dev->phy.otg->gadget) {
+ enable_sess_valid(dev);
+ /* Due to the above 100ms delay, interrupts from PHY are
+ * sometimes missed during fast plug-in/plug-out of cable.
+ * Check for such cases here.
+ */
+ if (is_b_sess_vld() && !test_bit(B_SESS_VLD, &dev->inputs)) {
+ pr_debug("%s: handle missing BSV event\n", __func__);
+ set_bit(B_SESS_VLD, &dev->inputs);
+ work = 1;
+ } else if (!is_b_sess_vld() && test_bit(B_SESS_VLD,
+ &dev->inputs)) {
+ pr_debug("%s: handle missing !BSV event\n", __func__);
+ clear_bit(B_SESS_VLD, &dev->inputs);
+ work = 1;
+ }
+ }
+
+#ifdef CONFIG_USB_EHCI_MSM_72K
+ if (dev->phy.otg->host && !dev->pmic_id_notif_supp) {
+ enable_idgnd(dev);
+ /* Handle missing ID_GND interrupts during fast PIPO */
+ if (is_host() && test_bit(ID, &dev->inputs)) {
+ pr_debug("%s: handle missing ID_GND event\n", __func__);
+ clear_bit(ID, &dev->inputs);
+ work = 1;
+ } else if (!is_host() && !test_bit(ID, &dev->inputs)) {
+ pr_debug("%s: handle missing !ID_GND event\n",
+ __func__);
+ set_bit(ID, &dev->inputs);
+ work = 1;
+ }
+ } else {
+ disable_idgnd(dev);
+ }
+#endif
+
+ enable_idabc(dev);
+
+ if (work) {
+ wake_lock(&dev->wlock);
+ queue_work(dev->wq, &dev->sm_work);
+ }
+}
+
+static void msm_otg_sm_work(struct work_struct *w)
+{
+ struct msm_otg *dev = container_of(w, struct msm_otg, sm_work);
+ enum chg_type chg_type = atomic_read(&dev->chg_type);
+ int ret;
+ int work = 0;
+ enum usb_otg_state state;
+ unsigned long flags;
+
+ if (atomic_read(&dev->in_lpm))
+ msm_otg_set_suspend(&dev->phy, 0);
+
+ spin_lock_irqsave(&dev->lock, flags);
+ state = dev->phy.state;
+ spin_unlock_irqrestore(&dev->lock, flags);
+
+ switch (state) {
+ case OTG_STATE_UNDEFINED:
+
+ /*
+ * We can come here when LPM fails with wall charger
+ * connected. Change the state to B_PERIPHERAL and
+ * schedule the work which takes care of resetting the
+ * PHY and putting the hardware in low power mode.
+ */
+ if (atomic_read(&dev->chg_type) ==
+ USB_CHG_TYPE__WALLCHARGER) {
+ spin_lock_irqsave(&dev->lock, flags);
+ dev->phy.state = OTG_STATE_B_PERIPHERAL;
+ spin_unlock_irqrestore(&dev->lock, flags);
+ work = 1;
+ break;
+ }
+
+ /* Reset both phy and link */
+ otg_reset(&dev->phy, 1);
+
+#ifdef CONFIG_USB_MSM_ACA
+ set_aca_id_inputs(dev);
+#endif
+ if (dev->pdata->otg_mode == OTG_USER_CONTROL) {
+ if ((dev->pdata->usb_mode == USB_PERIPHERAL_MODE) ||
+ !dev->phy.otg->host) {
+ set_bit(ID, &dev->inputs);
+ set_bit(B_SESS_VLD, &dev->inputs);
+ }
+ } else {
+ if (!dev->phy.otg->host || !is_host())
+ set_bit(ID, &dev->inputs);
+
+ if (dev->phy.otg->gadget && is_b_sess_vld())
+ set_bit(B_SESS_VLD, &dev->inputs);
+ }
+ spin_lock_irqsave(&dev->lock, flags);
+ if ((test_bit(ID, &dev->inputs)) &&
+ !test_bit(ID_A, &dev->inputs)) {
+ dev->phy.state = OTG_STATE_B_IDLE;
+ } else {
+ set_bit(A_BUS_REQ, &dev->inputs);
+ dev->phy.state = OTG_STATE_A_IDLE;
+ }
+ spin_unlock_irqrestore(&dev->lock, flags);
+
+ work = 1;
+ break;
+ case OTG_STATE_B_IDLE:
+ dev->phy.otg->default_a = 0;
+ if (!test_bit(ID, &dev->inputs) ||
+ test_bit(ID_A, &dev->inputs)) {
+ pr_debug("!id || id_A\n");
+ clear_bit(B_BUS_REQ, &dev->inputs);
+ otg_reset(&dev->phy, 0);
+
+ spin_lock_irqsave(&dev->lock, flags);
+ dev->phy.state = OTG_STATE_A_IDLE;
+ spin_unlock_irqrestore(&dev->lock, flags);
+ msm_otg_set_power(&dev->phy, 0);
+ work = 1;
+ } else if (test_bit(B_SESS_VLD, &dev->inputs) &&
+ !test_bit(ID_B, &dev->inputs)) {
+ pr_debug("b_sess_vld\n");
+ spin_lock_irqsave(&dev->lock, flags);
+ dev->phy.state = OTG_STATE_B_PERIPHERAL;
+ spin_unlock_irqrestore(&dev->lock, flags);
+ msm_otg_set_power(&dev->phy, 0);
+ msm_otg_start_peripheral(dev->phy.otg, 1);
+ } else if (test_bit(B_BUS_REQ, &dev->inputs)) {
+ pr_debug("b_sess_end && b_bus_req\n");
+ ret = msm_otg_start_srp(dev->phy.otg);
+ if (ret < 0) {
+ /* notify user space */
+ clear_bit(B_BUS_REQ, &dev->inputs);
+ work = 1;
+ break;
+ }
+ spin_lock_irqsave(&dev->lock, flags);
+ dev->phy.state = OTG_STATE_B_SRP_INIT;
+ spin_unlock_irqrestore(&dev->lock, flags);
+ msm_otg_start_timer(dev, TB_SRP_FAIL, B_SRP_FAIL);
+ break;
+ } else if (test_bit(ID_B, &dev->inputs)) {
+ atomic_set(&dev->chg_type, USB_CHG_TYPE__SDP);
+ msm_otg_set_power(&dev->phy, USB_IDCHG_MAX);
+ } else {
+ msm_otg_set_power(&dev->phy, 0);
+ pr_debug("entering into lpm\n");
+ msm_otg_put_suspend(dev);
+
+ if (dev->pdata->ldo_set_voltage)
+ dev->pdata->ldo_set_voltage(3075);
+ }
+ break;
+ case OTG_STATE_B_SRP_INIT:
+ if (!test_bit(ID, &dev->inputs) ||
+ test_bit(ID_A, &dev->inputs) ||
+ test_bit(ID_C, &dev->inputs) ||
+ (test_bit(B_SESS_VLD, &dev->inputs) &&
+ !test_bit(ID_B, &dev->inputs))) {
+ pr_debug("!id || id_a/c || b_sess_vld+!id_b\n");
+ msm_otg_del_timer(dev);
+ spin_lock_irqsave(&dev->lock, flags);
+ dev->phy.state = OTG_STATE_B_IDLE;
+ spin_unlock_irqrestore(&dev->lock, flags);
+ work = 1;
+ } else if (test_bit(B_SRP_FAIL, &dev->tmouts)) {
+ pr_debug("b_srp_fail\n");
+ /* notify user space */
+ msm_otg_send_event(dev->phy.otg,
+ OTG_EVENT_NO_RESP_FOR_SRP);
+ clear_bit(B_BUS_REQ, &dev->inputs);
+ clear_bit(B_SRP_FAIL, &dev->tmouts);
+ spin_lock_irqsave(&dev->lock, flags);
+ dev->phy.state = OTG_STATE_B_IDLE;
+ spin_unlock_irqrestore(&dev->lock, flags);
+ dev->b_last_se0_sess = jiffies;
+ work = 1;
+ }
+ break;
+ case OTG_STATE_B_PERIPHERAL:
+ if (!test_bit(ID, &dev->inputs) ||
+ test_bit(ID_A, &dev->inputs) ||
+ test_bit(ID_B, &dev->inputs) ||
+ !test_bit(B_SESS_VLD, &dev->inputs)) {
+ pr_debug("!id || id_a/b || !b_sess_vld\n");
+ clear_bit(B_BUS_REQ, &dev->inputs);
+ spin_lock_irqsave(&dev->lock, flags);
+ dev->phy.state = OTG_STATE_B_IDLE;
+ spin_unlock_irqrestore(&dev->lock, flags);
+ msm_otg_start_peripheral(dev->phy.otg, 0);
+ dev->b_last_se0_sess = jiffies;
+
+ /* Workaround: Reset phy after session */
+ otg_reset(&dev->phy, 1);
+ work = 1;
+ } else if (test_bit(B_BUS_REQ, &dev->inputs) &&
+ dev->phy.otg->gadget->b_hnp_enable &&
+ test_bit(A_BUS_SUSPEND, &dev->inputs)) {
+ pr_debug("b_bus_req && b_hnp_en && a_bus_suspend\n");
+ msm_otg_start_timer(dev, TB_ASE0_BRST, B_ASE0_BRST);
+ msm_otg_start_peripheral(dev->phy.otg, 0);
+ spin_lock_irqsave(&dev->lock, flags);
+ dev->phy.state = OTG_STATE_B_WAIT_ACON;
+ spin_unlock_irqrestore(&dev->lock, flags);
+ /* start HCD even before A-device enable
+ * pull-up to meet HNP timings.
+ */
+ dev->phy.otg->host->is_b_host = 1;
+ msm_otg_start_host(dev->phy.otg, REQUEST_START);
+
+ } else if (test_bit(ID_C, &dev->inputs)) {
+ atomic_set(&dev->chg_type, USB_CHG_TYPE__SDP);
+ msm_otg_set_power(&dev->phy, USB_IDCHG_MAX);
+ } else if (chg_type == USB_CHG_TYPE__WALLCHARGER) {
+#ifdef CONFIG_USB_MSM_ACA
+ del_timer_sync(&dev->id_timer);
+#endif
+ /* Workaround: Reset PHY in SE1 state */
+ otg_reset(&dev->phy, 1);
+ pr_debug("entering into lpm with wall-charger\n");
+ msm_otg_put_suspend(dev);
+ /* Allow idle power collapse */
+ otg_pm_qos_update_latency(dev, 0);
+ }
+ break;
+ case OTG_STATE_B_WAIT_ACON:
+ if (!test_bit(ID, &dev->inputs) ||
+ test_bit(ID_A, &dev->inputs) ||
+ test_bit(ID_B, &dev->inputs) ||
+ !test_bit(B_SESS_VLD, &dev->inputs)) {
+ pr_debug("!id || id_a/b || !b_sess_vld\n");
+ msm_otg_del_timer(dev);
+ /* A-device is physically disconnected during
+ * HNP. Remove HCD.
+ */
+ msm_otg_start_host(dev->phy.otg, REQUEST_STOP);
+ dev->phy.otg->host->is_b_host = 0;
+
+ clear_bit(B_BUS_REQ, &dev->inputs);
+ clear_bit(A_BUS_SUSPEND, &dev->inputs);
+ dev->b_last_se0_sess = jiffies;
+ spin_lock_irqsave(&dev->lock, flags);
+ dev->phy.state = OTG_STATE_B_IDLE;
+ spin_unlock_irqrestore(&dev->lock, flags);
+
+ /* Workaround: Reset phy after session */
+ otg_reset(&dev->phy, 1);
+ work = 1;
+ } else if (test_bit(A_CONN, &dev->inputs)) {
+ pr_debug("a_conn\n");
+ clear_bit(A_BUS_SUSPEND, &dev->inputs);
+ spin_lock_irqsave(&dev->lock, flags);
+ dev->phy.state = OTG_STATE_B_HOST;
+ spin_unlock_irqrestore(&dev->lock, flags);
+ if (test_bit(ID_C, &dev->inputs)) {
+ atomic_set(&dev->chg_type, USB_CHG_TYPE__SDP);
+ msm_otg_set_power(&dev->phy, USB_IDCHG_MAX);
+ }
+ } else if (test_bit(B_ASE0_BRST, &dev->tmouts)) {
+ /* TODO: A-device may send reset after
+ * enabling HNP; a_bus_resume case is
+ * not handled for now.
+ */
+ pr_debug("b_ase0_brst_tmout\n");
+ msm_otg_send_event(dev->phy.otg,
+ OTG_EVENT_HNP_FAILED);
+ msm_otg_start_host(dev->phy.otg, REQUEST_STOP);
+ dev->phy.otg->host->is_b_host = 0;
+ clear_bit(B_ASE0_BRST, &dev->tmouts);
+ clear_bit(A_BUS_SUSPEND, &dev->inputs);
+ clear_bit(B_BUS_REQ, &dev->inputs);
+
+ spin_lock_irqsave(&dev->lock, flags);
+ dev->phy.state = OTG_STATE_B_PERIPHERAL;
+ spin_unlock_irqrestore(&dev->lock, flags);
+ msm_otg_start_peripheral(dev->phy.otg, 1);
+ } else if (test_bit(ID_C, &dev->inputs)) {
+ atomic_set(&dev->chg_type, USB_CHG_TYPE__SDP);
+ msm_otg_set_power(&dev->phy, USB_IDCHG_MAX);
+ }
+ break;
+ case OTG_STATE_B_HOST:
+ /* B_BUS_REQ is not exposed to user space. So
+ * it must be A_CONN for now.
+ */
+ if (!test_bit(B_BUS_REQ, &dev->inputs) ||
+ !test_bit(A_CONN, &dev->inputs)) {
+ pr_debug("!b_bus_req || !a_conn\n");
+ clear_bit(A_CONN, &dev->inputs);
+ clear_bit(B_BUS_REQ, &dev->inputs);
+
+ msm_otg_start_host(dev->phy.otg, REQUEST_STOP);
+ dev->phy.otg->host->is_b_host = 0;
+
+ spin_lock_irqsave(&dev->lock, flags);
+ dev->phy.state = OTG_STATE_B_IDLE;
+ spin_unlock_irqrestore(&dev->lock, flags);
+ /* Workaround: Reset phy after session */
+ otg_reset(&dev->phy, 1);
+ work = 1;
+ } else if (test_bit(ID_C, &dev->inputs)) {
+ atomic_set(&dev->chg_type, USB_CHG_TYPE__SDP);
+ msm_otg_set_power(&dev->phy, USB_IDCHG_MAX);
+ }
+ break;
+ case OTG_STATE_A_IDLE:
+ dev->phy.otg->default_a = 1;
+ if (test_bit(ID, &dev->inputs) &&
+ !test_bit(ID_A, &dev->inputs)) {
+ pr_debug("id && !id_a\n");
+ dev->phy.otg->default_a = 0;
+ otg_reset(&dev->phy, 0);
+ spin_lock_irqsave(&dev->lock, flags);
+ dev->phy.state = OTG_STATE_B_IDLE;
+ spin_unlock_irqrestore(&dev->lock, flags);
+ msm_otg_set_power(&dev->phy, 0);
+ work = 1;
+ } else if (!test_bit(A_BUS_DROP, &dev->inputs) &&
+ (test_bit(A_SRP_DET, &dev->inputs) ||
+ test_bit(A_BUS_REQ, &dev->inputs))) {
+ pr_debug("!a_bus_drop && (a_srp_det || a_bus_req)\n");
+
+ clear_bit(A_SRP_DET, &dev->inputs);
+ /* Disable SRP detection */
+ writel((readl(USB_OTGSC) & ~OTGSC_INTR_STS_MASK) &
+ ~OTGSC_DPIE, USB_OTGSC);
+
+ spin_lock_irqsave(&dev->lock, flags);
+ dev->phy.state = OTG_STATE_A_WAIT_VRISE;
+ spin_unlock_irqrestore(&dev->lock, flags);
+ /* ACA: ID_A: Stop charging untill enumeration */
+ if (test_bit(ID_A, &dev->inputs))
+ msm_otg_set_power(&dev->phy, 0);
+ else
+ dev->pdata->vbus_power(USB_PHY_INTEGRATED, 1);
+ msm_otg_start_timer(dev, TA_WAIT_VRISE, A_WAIT_VRISE);
+ /* no need to schedule work now */
+ } else {
+ pr_debug("No session requested\n");
+
+ /* A-device is not providing power on VBUS.
+ * Enable SRP detection.
+ */
+ writel((readl(USB_OTGSC) & ~OTGSC_INTR_STS_MASK) |
+ OTGSC_DPIE, USB_OTGSC);
+ msm_otg_put_suspend(dev);
+
+ }
+ break;
+ case OTG_STATE_A_WAIT_VRISE:
+ if ((test_bit(ID, &dev->inputs) &&
+ !test_bit(ID_A, &dev->inputs)) ||
+ test_bit(A_BUS_DROP, &dev->inputs) ||
+ test_bit(A_WAIT_VRISE, &dev->tmouts)) {
+ pr_debug("id || a_bus_drop || a_wait_vrise_tmout\n");
+ clear_bit(A_BUS_REQ, &dev->inputs);
+ msm_otg_del_timer(dev);
+ dev->pdata->vbus_power(USB_PHY_INTEGRATED, 0);
+ spin_lock_irqsave(&dev->lock, flags);
+ dev->phy.state = OTG_STATE_A_WAIT_VFALL;
+ spin_unlock_irqrestore(&dev->lock, flags);
+ msm_otg_start_timer(dev, TA_WAIT_VFALL, A_WAIT_VFALL);
+ } else if (test_bit(A_VBUS_VLD, &dev->inputs)) {
+ pr_debug("a_vbus_vld\n");
+ spin_lock_irqsave(&dev->lock, flags);
+ dev->phy.state = OTG_STATE_A_WAIT_BCON;
+ spin_unlock_irqrestore(&dev->lock, flags);
+ if (TA_WAIT_BCON > 0)
+ msm_otg_start_timer(dev, TA_WAIT_BCON,
+ A_WAIT_BCON);
+ /* Start HCD to detect peripherals. */
+ msm_otg_start_host(dev->phy.otg, REQUEST_START);
+ }
+ break;
+ case OTG_STATE_A_WAIT_BCON:
+ if ((test_bit(ID, &dev->inputs) &&
+ !test_bit(ID_A, &dev->inputs)) ||
+ test_bit(A_BUS_DROP, &dev->inputs) ||
+ test_bit(A_WAIT_BCON, &dev->tmouts)) {
+ pr_debug("id_f/b/c || a_bus_drop ||"
+ "a_wait_bcon_tmout\n");
+ if (test_bit(A_WAIT_BCON, &dev->tmouts))
+ msm_otg_send_event(dev->phy.otg,
+ OTG_EVENT_DEV_CONN_TMOUT);
+ msm_otg_del_timer(dev);
+ clear_bit(A_BUS_REQ, &dev->inputs);
+ msm_otg_start_host(dev->phy.otg, REQUEST_STOP);
+ /* Reset both phy and link */
+ otg_reset(&dev->phy, 1);
+ /* ACA: ID_A with NO accessory, just the A plug is
+ * attached to ACA: Use IDCHG_MAX for charging
+ */
+ if (test_bit(ID_A, &dev->inputs))
+ msm_otg_set_power(&dev->phy, USB_IDCHG_MAX);
+ else
+ dev->pdata->vbus_power(USB_PHY_INTEGRATED, 0);
+ spin_lock_irqsave(&dev->lock, flags);
+ dev->phy.state = OTG_STATE_A_WAIT_VFALL;
+ spin_unlock_irqrestore(&dev->lock, flags);
+ msm_otg_start_timer(dev, TA_WAIT_VFALL, A_WAIT_VFALL);
+ } else if (test_bit(B_CONN, &dev->inputs)) {
+ pr_debug("b_conn\n");
+ msm_otg_del_timer(dev);
+ /* HCD is added already. just move to
+ * A_HOST state.
+ */
+ spin_lock_irqsave(&dev->lock, flags);
+ dev->phy.state = OTG_STATE_A_HOST;
+ spin_unlock_irqrestore(&dev->lock, flags);
+ if (test_bit(ID_A, &dev->inputs)) {
+ atomic_set(&dev->chg_type, USB_CHG_TYPE__SDP);
+ msm_otg_set_power(&dev->phy,
+ USB_IDCHG_MIN - get_aca_bmaxpower(dev));
+ }
+ } else if (!test_bit(A_VBUS_VLD, &dev->inputs)) {
+ pr_debug("!a_vbus_vld\n");
+ msm_otg_del_timer(dev);
+ msm_otg_start_host(dev->phy.otg, REQUEST_STOP);
+ spin_lock_irqsave(&dev->lock, flags);
+ dev->phy.state = OTG_STATE_A_VBUS_ERR;
+ spin_unlock_irqrestore(&dev->lock, flags);
+ /* Reset both phy and link */
+ otg_reset(&dev->phy, 1);
+ } else if (test_bit(ID_A, &dev->inputs)) {
+ dev->pdata->vbus_power(USB_PHY_INTEGRATED, 0);
+ } else if (!test_bit(ID, &dev->inputs)) {
+ msm_otg_set_power(&dev->phy, 0);
+ dev->pdata->vbus_power(USB_PHY_INTEGRATED, 1);
+ }
+ break;
+ case OTG_STATE_A_HOST:
+ if ((test_bit(ID, &dev->inputs) &&
+ !test_bit(ID_A, &dev->inputs)) ||
+ test_bit(A_BUS_DROP, &dev->inputs)) {
+ pr_debug("id_f/b/c || a_bus_drop\n");
+ clear_bit(B_CONN, &dev->inputs);
+ spin_lock_irqsave(&dev->lock, flags);
+ dev->phy.state = OTG_STATE_A_WAIT_VFALL;
+ spin_unlock_irqrestore(&dev->lock, flags);
+ msm_otg_start_host(dev->phy.otg, REQUEST_STOP);
+ /* Reset both phy and link */
+ otg_reset(&dev->phy, 1);
+ if (!test_bit(ID_A, &dev->inputs))
+ dev->pdata->vbus_power(USB_PHY_INTEGRATED, 0);
+ msm_otg_start_timer(dev, TA_WAIT_VFALL, A_WAIT_VFALL);
+ msm_otg_set_power(&dev->phy, 0);
+ } else if (!test_bit(A_VBUS_VLD, &dev->inputs)) {
+ pr_debug("!a_vbus_vld\n");
+ clear_bit(B_CONN, &dev->inputs);
+ spin_lock_irqsave(&dev->lock, flags);
+ dev->phy.state = OTG_STATE_A_VBUS_ERR;
+ spin_unlock_irqrestore(&dev->lock, flags);
+ msm_otg_start_host(dev->phy.otg, REQUEST_STOP);
+ /* Reset both phy and link */
+ otg_reset(&dev->phy, 1);
+ /* no work */
+ } else if (!test_bit(A_BUS_REQ, &dev->inputs)) {
+ /* a_bus_req is de-asserted when root hub is
+ * suspended or HNP is in progress.
+ */
+ pr_debug("!a_bus_req\n");
+ spin_lock_irqsave(&dev->lock, flags);
+ dev->phy.state = OTG_STATE_A_SUSPEND;
+ spin_unlock_irqrestore(&dev->lock, flags);
+ if (dev->phy.otg->host->b_hnp_enable) {
+ msm_otg_start_timer(dev, TA_AIDL_BDIS,
+ A_AIDL_BDIS);
+ } else {
+ /* No HNP. Root hub suspended */
+ msm_otg_put_suspend(dev);
+ }
+ if (test_bit(ID_A, &dev->inputs))
+ msm_otg_set_power(&dev->phy,
+ USB_IDCHG_MIN - USB_IB_UNCFG);
+ } else if (!test_bit(B_CONN, &dev->inputs)) {
+ pr_debug("!b_conn\n");
+ spin_lock_irqsave(&dev->lock, flags);
+ dev->phy.state = OTG_STATE_A_WAIT_BCON;
+ spin_unlock_irqrestore(&dev->lock, flags);
+ if (TA_WAIT_BCON > 0)
+ msm_otg_start_timer(dev, TA_WAIT_BCON,
+ A_WAIT_BCON);
+ } else if (test_bit(ID_A, &dev->inputs)) {
+ atomic_set(&dev->chg_type, USB_CHG_TYPE__SDP);
+ dev->pdata->vbus_power(USB_PHY_INTEGRATED, 0);
+ msm_otg_set_power(&dev->phy,
+ USB_IDCHG_MIN - get_aca_bmaxpower(dev));
+ } else if (!test_bit(ID, &dev->inputs)) {
+ atomic_set(&dev->chg_type, USB_CHG_TYPE__INVALID);
+ msm_otg_set_power(&dev->phy, 0);
+ dev->pdata->vbus_power(USB_PHY_INTEGRATED, 1);
+ }
+ break;
+ case OTG_STATE_A_SUSPEND:
+ if ((test_bit(ID, &dev->inputs) &&
+ !test_bit(ID_A, &dev->inputs)) ||
+ test_bit(A_BUS_DROP, &dev->inputs) ||
+ test_bit(A_AIDL_BDIS, &dev->tmouts)) {
+ pr_debug("id_f/b/c || a_bus_drop ||"
+ "a_aidl_bdis_tmout\n");
+ if (test_bit(A_AIDL_BDIS, &dev->tmouts))
+ msm_otg_send_event(dev->phy.otg,
+ OTG_EVENT_HNP_FAILED);
+ msm_otg_del_timer(dev);
+ clear_bit(B_CONN, &dev->inputs);
+ spin_lock_irqsave(&dev->lock, flags);
+ dev->phy.state = OTG_STATE_A_WAIT_VFALL;
+ spin_unlock_irqrestore(&dev->lock, flags);
+ msm_otg_start_host(dev->phy.otg, REQUEST_STOP);
+ dev->pdata->vbus_power(USB_PHY_INTEGRATED, 0);
+ /* Reset both phy and link */
+ otg_reset(&dev->phy, 1);
+ if (!test_bit(ID_A, &dev->inputs))
+ dev->pdata->vbus_power(USB_PHY_INTEGRATED, 0);
+ msm_otg_start_timer(dev, TA_WAIT_VFALL, A_WAIT_VFALL);
+ msm_otg_set_power(&dev->phy, 0);
+ } else if (!test_bit(A_VBUS_VLD, &dev->inputs)) {
+ pr_debug("!a_vbus_vld\n");
+ msm_otg_del_timer(dev);
+ clear_bit(B_CONN, &dev->inputs);
+ spin_lock_irqsave(&dev->lock, flags);
+ dev->phy.state = OTG_STATE_A_VBUS_ERR;
+ spin_unlock_irqrestore(&dev->lock, flags);
+ msm_otg_start_host(dev->phy.otg, REQUEST_STOP);
+ /* Reset both phy and link */
+ otg_reset(&dev->phy, 1);
+ } else if (!test_bit(B_CONN, &dev->inputs) &&
+ dev->phy.otg->host->b_hnp_enable) {
+ pr_debug("!b_conn && b_hnp_enable");
+ /* Clear AIDL_BDIS timer */
+ msm_otg_del_timer(dev);
+ spin_lock_irqsave(&dev->lock, flags);
+ dev->phy.state = OTG_STATE_A_PERIPHERAL;
+ spin_unlock_irqrestore(&dev->lock, flags);
+
+ msm_otg_start_host(dev->phy.otg, REQUEST_HNP_SUSPEND);
+
+ /* We may come here even when B-dev is physically
+ * disconnected during HNP. We go back to host
+ * role if bus is idle for BIDL_ADIS time.
+ */
+ dev->phy.otg->gadget->is_a_peripheral = 1;
+ msm_otg_start_peripheral(dev->phy.otg, 1);
+ /* If ID_A: we can charge in a_peripheral as well */
+ if (test_bit(ID_A, &dev->inputs)) {
+ atomic_set(&dev->chg_type, USB_CHG_TYPE__SDP);
+ msm_otg_set_power(&dev->phy,
+ USB_IDCHG_MIN - USB_IB_UNCFG);
+ }
+ } else if (!test_bit(B_CONN, &dev->inputs) &&
+ !dev->phy.otg->host->b_hnp_enable) {
+ pr_debug("!b_conn && !b_hnp_enable");
+ /* bus request is dropped during suspend.
+ * acquire again for next device.
+ */
+ set_bit(A_BUS_REQ, &dev->inputs);
+ spin_lock_irqsave(&dev->lock, flags);
+ dev->phy.state = OTG_STATE_A_WAIT_BCON;
+ spin_unlock_irqrestore(&dev->lock, flags);
+ if (TA_WAIT_BCON > 0)
+ msm_otg_start_timer(dev, TA_WAIT_BCON,
+ A_WAIT_BCON);
+ msm_otg_set_power(&dev->phy, 0);
+ } else if (test_bit(ID_A, &dev->inputs)) {
+ dev->pdata->vbus_power(USB_PHY_INTEGRATED, 0);
+ atomic_set(&dev->chg_type, USB_CHG_TYPE__SDP);
+ msm_otg_set_power(&dev->phy,
+ USB_IDCHG_MIN - USB_IB_UNCFG);
+ } else if (!test_bit(ID, &dev->inputs)) {
+ msm_otg_set_power(&dev->phy, 0);
+ dev->pdata->vbus_power(USB_PHY_INTEGRATED, 1);
+ }
+ break;
+ case OTG_STATE_A_PERIPHERAL:
+ if ((test_bit(ID, &dev->inputs) &&
+ !test_bit(ID_A, &dev->inputs)) ||
+ test_bit(A_BUS_DROP, &dev->inputs)) {
+ pr_debug("id _f/b/c || a_bus_drop\n");
+ /* Clear BIDL_ADIS timer */
+ msm_otg_del_timer(dev);
+ spin_lock_irqsave(&dev->lock, flags);
+ dev->phy.state = OTG_STATE_A_WAIT_VFALL;
+ spin_unlock_irqrestore(&dev->lock, flags);
+ msm_otg_start_peripheral(dev->phy.otg, 0);
+ dev->phy.otg->gadget->is_a_peripheral = 0;
+ /* HCD was suspended before. Stop it now */
+ msm_otg_start_host(dev->phy.otg, REQUEST_STOP);
+
+ /* Reset both phy and link */
+ otg_reset(&dev->phy, 1);
+ if (!test_bit(ID_A, &dev->inputs))
+ dev->pdata->vbus_power(USB_PHY_INTEGRATED, 0);
+ msm_otg_start_timer(dev, TA_WAIT_VFALL, A_WAIT_VFALL);
+ msm_otg_set_power(&dev->phy, 0);
+ } else if (!test_bit(A_VBUS_VLD, &dev->inputs)) {
+ pr_debug("!a_vbus_vld\n");
+ /* Clear BIDL_ADIS timer */
+ msm_otg_del_timer(dev);
+ spin_lock_irqsave(&dev->lock, flags);
+ dev->phy.state = OTG_STATE_A_VBUS_ERR;
+ spin_unlock_irqrestore(&dev->lock, flags);
+ msm_otg_start_peripheral(dev->phy.otg, 0);
+ dev->phy.otg->gadget->is_a_peripheral = 0;
+ /* HCD was suspended before. Stop it now */
+ msm_otg_start_host(dev->phy.otg, REQUEST_STOP);
+ } else if (test_bit(A_BIDL_ADIS, &dev->tmouts)) {
+ pr_debug("a_bidl_adis_tmout\n");
+ msm_otg_start_peripheral(dev->phy.otg, 0);
+ dev->phy.otg->gadget->is_a_peripheral = 0;
+
+ spin_lock_irqsave(&dev->lock, flags);
+ dev->phy.state = OTG_STATE_A_WAIT_BCON;
+ spin_unlock_irqrestore(&dev->lock, flags);
+ set_bit(A_BUS_REQ, &dev->inputs);
+ msm_otg_start_host(dev->phy.otg, REQUEST_HNP_RESUME);
+ if (TA_WAIT_BCON > 0)
+ msm_otg_start_timer(dev, TA_WAIT_BCON,
+ A_WAIT_BCON);
+ msm_otg_set_power(&dev->phy, 0);
+ } else if (test_bit(ID_A, &dev->inputs)) {
+ dev->pdata->vbus_power(USB_PHY_INTEGRATED, 0);
+ atomic_set(&dev->chg_type, USB_CHG_TYPE__SDP);
+ msm_otg_set_power(&dev->phy,
+ USB_IDCHG_MIN - USB_IB_UNCFG);
+ } else if (!test_bit(ID, &dev->inputs)) {
+ msm_otg_set_power(&dev->phy, 0);
+ dev->pdata->vbus_power(USB_PHY_INTEGRATED, 1);
+ }
+ break;
+ case OTG_STATE_A_WAIT_VFALL:
+ if (test_bit(A_WAIT_VFALL, &dev->tmouts)) {
+ clear_bit(A_VBUS_VLD, &dev->inputs);
+ spin_lock_irqsave(&dev->lock, flags);
+ dev->phy.state = OTG_STATE_A_IDLE;
+ spin_unlock_irqrestore(&dev->lock, flags);
+ work = 1;
+ }
+ break;
+ case OTG_STATE_A_VBUS_ERR:
+ if ((test_bit(ID, &dev->inputs) &&
+ !test_bit(ID_A, &dev->inputs)) ||
+ test_bit(A_BUS_DROP, &dev->inputs) ||
+ test_bit(A_CLR_ERR, &dev->inputs)) {
+ spin_lock_irqsave(&dev->lock, flags);
+ dev->phy.state = OTG_STATE_A_WAIT_VFALL;
+ spin_unlock_irqrestore(&dev->lock, flags);
+ if (!test_bit(ID_A, &dev->inputs))
+ dev->pdata->vbus_power(USB_PHY_INTEGRATED, 0);
+ msm_otg_start_timer(dev, TA_WAIT_VFALL, A_WAIT_VFALL);
+ msm_otg_set_power(&dev->phy, 0);
+ }
+ break;
+ default:
+ pr_err("invalid OTG state\n");
+ }
+
+ if (work)
+ queue_work(dev->wq, &dev->sm_work);
+
+#ifdef CONFIG_USB_MSM_ACA
+ /* Start id_polling if (ID_FLOAT&BSV) || ID_A/B/C */
+ if ((test_bit(ID, &dev->inputs) &&
+ test_bit(B_SESS_VLD, &dev->inputs) &&
+ chg_type != USB_CHG_TYPE__WALLCHARGER) ||
+ test_bit(ID_A, &dev->inputs)) {
+ mod_timer(&dev->id_timer, jiffies +
+ msecs_to_jiffies(OTG_ID_POLL_MS));
+ return;
+ }
+ del_timer(&dev->id_timer);
+#endif
+ /* IRQ/sysfs may queue work. Check work_pending. otherwise
+ * we might endup releasing wakelock after it is acquired
+ * in IRQ/sysfs.
+ */
+ if (!work_pending(&dev->sm_work) && !hrtimer_active(&dev->timer) &&
+ !work_pending(&dev->otg_resume_work))
+ wake_unlock(&dev->wlock);
+}
+
+#ifdef CONFIG_USB_MSM_ACA
+static void msm_otg_id_func(unsigned long _dev)
+{
+ struct msm_otg *dev = (struct msm_otg *) _dev;
+ u8 phy_ints;
+
+#ifdef CONFIG_USB_MSM_STANDARD_ACA
+ /*
+ * When standard ACA is attached RID_A and RID_GND states are only
+ * possible. RID_A-->RID_GND transition generates IdGnd interrupt
+ * from PHY. Hence polling is disabled.
+ */
+ if (test_bit(ID_A, &dev->inputs))
+ goto out;
+#endif
+
+ if (atomic_read(&dev->in_lpm))
+ msm_otg_set_suspend(&dev->phy, 0);
+
+ phy_ints = ulpi_read(dev, 0x13);
+
+ /*
+ * ACA timer will be kicked again after the PHY
+ * state is recovered.
+ */
+ if (phy_ints == -ETIMEDOUT)
+ return;
+
+
+ /* If id_gnd happened then stop and let isr take care of this */
+ if (phy_id_state_gnd(phy_ints))
+ goto out;
+
+ if ((test_bit(ID_A, &dev->inputs) == phy_id_state_a(phy_ints)) &&
+ (test_bit(ID_B, &dev->inputs) == phy_id_state_b(phy_ints)) &&
+ (test_bit(ID_C, &dev->inputs) == phy_id_state_c(phy_ints))) {
+ mod_timer(&dev->id_timer,
+ jiffies + msecs_to_jiffies(OTG_ID_POLL_MS));
+ goto out;
+ } else {
+ set_aca_id_inputs(dev);
+ }
+ wake_lock(&dev->wlock);
+ queue_work(dev->wq, &dev->sm_work);
+out:
+ /* OOPS: runing while !BSV, schedule work to initiate LPM */
+ if (!is_b_sess_vld()) {
+ clear_bit(B_SESS_VLD, &dev->inputs);
+ wake_lock(&dev->wlock);
+ queue_work(dev->wq, &dev->sm_work);
+ }
+ return;
+}
+#endif
+#ifdef CONFIG_USB_OTG
+static ssize_t
+set_pwr_down(struct device *_dev, struct device_attribute *attr,
+ const char *buf, size_t count)
+{
+ struct msm_otg *dev = the_msm_otg;
+ int value;
+ enum usb_otg_state state;
+ unsigned long flags;
+
+ spin_lock_irqsave(&dev->lock, flags);
+ state = dev->phy.state;
+ spin_unlock_irqrestore(&dev->lock, flags);
+
+ /* Applicable for only A-Device */
+ if (state <= OTG_STATE_A_IDLE)
+ return -EINVAL;
+
+ sscanf(buf, "%d", &value);
+
+ if (test_bit(A_BUS_DROP, &dev->inputs) != !!value) {
+ change_bit(A_BUS_DROP, &dev->inputs);
+ wake_lock(&dev->wlock);
+ queue_work(dev->wq, &dev->sm_work);
+ }
+
+ return count;
+}
+static DEVICE_ATTR(pwr_down, S_IRUGO | S_IWUSR, NULL, set_pwr_down);
+
+static ssize_t
+set_srp_req(struct device *_dev, struct device_attribute *attr,
+ const char *buf, size_t count)
+{
+ struct msm_otg *dev = the_msm_otg;
+ enum usb_otg_state state;
+ unsigned long flags;
+
+ spin_lock_irqsave(&dev->lock, flags);
+ state = dev->phy.state;
+ spin_unlock_irqrestore(&dev->lock, flags);
+
+ if (state != OTG_STATE_B_IDLE)
+ return -EINVAL;
+
+ set_bit(B_BUS_REQ, &dev->inputs);
+ wake_lock(&dev->wlock);
+ queue_work(dev->wq, &dev->sm_work);
+
+ return count;
+}
+static DEVICE_ATTR(srp_req, S_IRUGO | S_IWUSR, NULL, set_srp_req);
+
+static ssize_t
+set_clr_err(struct device *_dev, struct device_attribute *attr,
+ const char *buf, size_t count)
+{
+ struct msm_otg *dev = the_msm_otg;
+ enum usb_otg_state state;
+ unsigned long flags;
+
+ spin_lock_irqsave(&dev->lock, flags);
+ state = dev->phy.state;
+ spin_unlock_irqrestore(&dev->lock, flags);
+
+ if (state == OTG_STATE_A_VBUS_ERR) {
+ set_bit(A_CLR_ERR, &dev->inputs);
+ wake_lock(&dev->wlock);
+ queue_work(dev->wq, &dev->sm_work);
+ }
+
+ return count;
+}
+static DEVICE_ATTR(clr_err, S_IRUGO | S_IWUSR, NULL, set_clr_err);
+
+static struct attribute *msm_otg_attrs[] = {
+ &dev_attr_pwr_down.attr,
+ &dev_attr_srp_req.attr,
+ &dev_attr_clr_err.attr,
+ NULL,
+};
+
+static struct attribute_group msm_otg_attr_grp = {
+ .attrs = msm_otg_attrs,
+};
+#endif
+
+#ifdef CONFIG_DEBUG_FS
+static int otg_open(struct inode *inode, struct file *file)
+{
+ file->private_data = inode->i_private;
+ return 0;
+}
+static ssize_t otg_mode_write(struct file *file, const char __user *buf,
+ size_t count, loff_t *ppos)
+{
+ struct msm_otg *dev = file->private_data;
+ int ret = count;
+ int work = 0;
+ unsigned long flags;
+
+ spin_lock_irqsave(&dev->lock, flags);
+ dev->pdata->otg_mode = OTG_USER_CONTROL;
+ if (!memcmp(buf, "none", 4)) {
+ clear_bit(B_SESS_VLD, &dev->inputs);
+ set_bit(ID, &dev->inputs);
+ work = 1;
+ } else if (!memcmp(buf, "peripheral", 10)) {
+ set_bit(B_SESS_VLD, &dev->inputs);
+ set_bit(ID, &dev->inputs);
+ work = 1;
+ } else if (!memcmp(buf, "host", 4)) {
+ clear_bit(B_SESS_VLD, &dev->inputs);
+ clear_bit(ID, &dev->inputs);
+ set_bit(A_BUS_REQ, &dev->inputs);
+ work = 1;
+ } else {
+ pr_info("%s: unknown mode specified\n", __func__);
+ ret = -EINVAL;
+ }
+ spin_unlock_irqrestore(&dev->lock, flags);
+
+ if (work) {
+ wake_lock(&dev->wlock);
+ queue_work(dev->wq, &dev->sm_work);
+ }
+
+ return ret;
+}
+const struct file_operations otgfs_fops = {
+ .open = otg_open,
+ .write = otg_mode_write,
+};
+
+#define OTG_INFO_SIZE 512
+static ssize_t otg_info_read(struct file *file, char __user *ubuf,
+ size_t count, loff_t *ppos)
+{
+ char *buf;
+ int temp = 0;
+ int ret;
+ struct msm_otg *dev = file->private_data;
+
+ buf = kzalloc(sizeof(char) * OTG_INFO_SIZE, GFP_KERNEL);
+ if (!buf)
+ return -ENOMEM;
+
+ temp += scnprintf(buf + temp, OTG_INFO_SIZE - temp,
+ "OTG State: %s\n"
+ "OTG Mode: %d\n"
+ "OTG Inputs: 0x%lx\n"
+ "Charger Type: %d\n"
+ "PMIC VBUS Support: %u\n"
+ "PMIC ID Support: %u\n"
+ "USB In SPS: %d\n"
+ "pre_emphasis_level: 0x%x\n"
+ "cdr_auto_reset: 0x%x\n"
+ "hs_drv_amplitude: 0x%x\n"
+ "se1_gate_state: 0x%x\n"
+ "swfi_latency: 0x%x\n"
+ "PHY Powercollapse: 0x%x\n",
+ state_string(dev->phy.state),
+ dev->pdata->otg_mode,
+ dev->inputs,
+ atomic_read(&dev->chg_type),
+ dev->pmic_vbus_notif_supp,
+ dev->pmic_id_notif_supp,
+ dev->pdata->usb_in_sps,
+ dev->pdata->pemp_level,
+ dev->pdata->cdr_autoreset,
+ dev->pdata->drv_ampl,
+ dev->pdata->se1_gating,
+ dev->pdata->swfi_latency,
+ dev->pdata->phy_can_powercollapse);
+
+ ret = simple_read_from_buffer(ubuf, count, ppos, buf, temp);
+
+ kfree(buf);
+
+ return ret;
+}
+
+const struct file_operations otgfs_info_fops = {
+ .open = otg_open,
+ .read = otg_info_read,
+};
+
+struct dentry *otg_debug_root;
+struct dentry *otg_debug_mode;
+struct dentry *otg_debug_info;
+#endif
+
+static int otg_debugfs_init(struct msm_otg *dev)
+{
+#ifdef CONFIG_DEBUG_FS
+ otg_debug_root = debugfs_create_dir("otg", NULL);
+ if (!otg_debug_root)
+ return -ENOENT;
+
+ otg_debug_mode = debugfs_create_file("mode", 0222,
+ otg_debug_root, dev,
+ &otgfs_fops);
+ if (!otg_debug_mode)
+ goto free_root;
+
+ otg_debug_info = debugfs_create_file("info", 0444,
+ otg_debug_root, dev,
+ &otgfs_info_fops);
+ if (!otg_debug_info)
+ goto free_mode;
+
+ return 0;
+
+free_mode:
+ debugfs_remove(otg_debug_mode);
+ otg_debug_mode = NULL;
+
+free_root:
+ debugfs_remove(otg_debug_root);
+ otg_debug_root = NULL;
+ return -ENOENT;
+#endif
+ return 0;
+}
+
+static void otg_debugfs_cleanup(void)
+{
+#ifdef CONFIG_DEBUG_FS
+ debugfs_remove(otg_debug_info);
+ debugfs_remove(otg_debug_mode);
+ debugfs_remove(otg_debug_root);
+#endif
+}
+
+struct usb_phy_io_ops msm_otg_io_ops = {
+ .read = usb_ulpi_read,
+ .write = usb_ulpi_write,
+};
+
+static int __init msm_otg_probe(struct platform_device *pdev)
+{
+ int ret = 0;
+ struct resource *res;
+ struct msm_otg *dev;
+
+ dev = kzalloc(sizeof(struct msm_otg), GFP_KERNEL);
+ if (!dev)
+ return -ENOMEM;
+
+ dev->phy.otg = kzalloc(sizeof(struct usb_otg), GFP_KERNEL);
+ if (!dev->phy.otg) {
+ kfree(dev);
+ return -ENOMEM;
+ }
+
+ the_msm_otg = dev;
+ dev->phy.dev = &pdev->dev;
+ dev->phy.otg->phy = &dev->phy;
+ dev->pdata = pdev->dev.platform_data;
+
+ if (!dev->pdata) {
+ ret = -ENODEV;
+ goto free_dev;
+ }
+
+#ifdef CONFIG_USB_EHCI_MSM_72K
+ if (!dev->pdata->vbus_power) {
+ ret = -ENODEV;
+ goto free_dev;
+ } else
+ dev->pdata->vbus_power(USB_PHY_INTEGRATED, 0);
+
+#endif
+
+ if (dev->pdata->rpc_connect) {
+ ret = dev->pdata->rpc_connect(1);
+ pr_debug("%s: rpc_connect(%d)\n", __func__, ret);
+ if (ret) {
+ pr_err("%s: rpc connect failed\n", __func__);
+ ret = -ENODEV;
+ goto free_dev;
+ }
+ }
+
+ dev->alt_core_clk = clk_get(&pdev->dev, "alt_core_clk");
+ if (IS_ERR(dev->alt_core_clk)) {
+ pr_err("%s: failed to get alt_core_clk\n", __func__);
+ ret = PTR_ERR(dev->alt_core_clk);
+ goto rpc_fail;
+ }
+ clk_set_rate(dev->alt_core_clk, 60000000);
+
+ /* pm qos request to prevent apps idle power collapse */
+ pm_qos_add_request(&dev->pdata->pm_qos_req_dma, PM_QOS_CPU_DMA_LATENCY,
+ PM_QOS_DEFAULT_VALUE);
+
+ dev->core_clk = clk_get(&pdev->dev, "core_clk");
+ if (IS_ERR(dev->core_clk)) {
+ pr_err("%s: failed to get core_clk\n", __func__);
+ ret = PTR_ERR(dev->core_clk);
+ goto put_alt_core_clk;
+ }
+ /* CORE clk must be running at >60Mhz for correct HSUSB operation
+ * and USB core cannot tolerate frequency changes on CORE CLK.
+ * Vote for maximum clk frequency for CORE clock.
+ */
+ clk_set_rate(dev->core_clk, INT_MAX);
+
+ clk_prepare_enable(dev->core_clk);
+
+ if (!dev->pdata->pclk_is_hw_gated) {
+ dev->iface_clk = clk_get(&pdev->dev, "iface_clk");
+ if (IS_ERR(dev->iface_clk)) {
+ pr_err("%s: failed to get abh_clk\n", __func__);
+ ret = PTR_ERR(dev->iface_clk);
+ goto put_core_clk;
+ }
+ clk_prepare_enable(dev->iface_clk);
+ }
+
+ if (!dev->pdata->phy_reset) {
+ dev->phy_reset_clk = clk_get(&pdev->dev, "phy_clk");
+ if (IS_ERR(dev->phy_reset_clk)) {
+ pr_err("%s: failed to get phy_clk\n", __func__);
+ ret = PTR_ERR(dev->phy_reset_clk);
+ goto put_iface_clk;
+ }
+ }
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ if (!res) {
+ pr_err("%s: failed to get platform resource mem\n", __func__);
+ ret = -ENODEV;
+ goto put_phy_clk;
+ }
+
+ dev->regs = ioremap(res->start, resource_size(res));
+ if (!dev->regs) {
+ pr_err("%s: ioremap failed\n", __func__);
+ ret = -ENOMEM;
+ goto put_phy_clk;
+ }
+ dev->irq = platform_get_irq(pdev, 0);
+ if (!dev->irq) {
+ pr_err("%s: platform_get_irq failed\n", __func__);
+ ret = -ENODEV;
+ goto free_regs;
+ }
+ dev->xo_handle = msm_xo_get(MSM_XO_TCXO_D1, "usb");
+ if (IS_ERR(dev->xo_handle)) {
+ pr_err(" %s not able to get the handle"
+ "to vote for TCXO D1 buffer\n", __func__);
+ ret = PTR_ERR(dev->xo_handle);
+ goto free_regs;
+ }
+
+ ret = msm_xo_mode_vote(dev->xo_handle, MSM_XO_MODE_ON);
+ if (ret) {
+ pr_err("%s failed to vote for TCXO"
+ "D1 buffer%d\n", __func__, ret);
+ goto free_xo_handle;
+ }
+
+
+ msm_otg_init_timer(dev);
+ INIT_WORK(&dev->sm_work, msm_otg_sm_work);
+ INIT_WORK(&dev->otg_resume_work, msm_otg_resume_w);
+ spin_lock_init(&dev->lock);
+ wake_lock_init(&dev->wlock, WAKE_LOCK_SUSPEND, "msm_otg");
+
+ dev->wq = alloc_workqueue("k_otg", WQ_NON_REENTRANT, 0);
+ if (!dev->wq) {
+ ret = -ENOMEM;
+ goto free_wlock;
+ }
+
+ if (dev->pdata->init_gpio) {
+ ret = dev->pdata->init_gpio(1);
+ if (ret) {
+ pr_err("%s: gpio init failed with err:%d\n",
+ __func__, ret);
+ goto free_wq;
+ }
+ }
+ /* To reduce phy power consumption and to avoid external LDO
+ * on the board, PMIC comparators can be used to detect VBUS
+ * session change.
+ */
+ if (dev->pdata->pmic_vbus_notif_init) {
+ ret = dev->pdata->pmic_vbus_notif_init
+ (&msm_otg_set_vbus_state, 1);
+ if (!ret) {
+ dev->pmic_vbus_notif_supp = 1;
+ } else if (ret != -ENOTSUPP) {
+ pr_err("%s: pmic_vbus_notif_init() failed, err:%d\n",
+ __func__, ret);
+ goto free_gpio;
+ }
+ }
+
+ if (dev->pdata->phy_id_setup_init) {
+ ret = dev->pdata->phy_id_setup_init(1);
+ if (ret) {
+ pr_err("%s: phy_id_setup_init failed err:%d",
+ __func__, ret);
+ goto free_pmic_vbus_notif;
+ }
+ }
+
+ if (dev->pdata->pmic_vbus_irq)
+ dev->vbus_on_irq = dev->pdata->pmic_vbus_irq;
+
+ /* vote for vddcx, as PHY cannot tolerate vddcx below 1.0V */
+ if (dev->pdata->init_vddcx) {
+ ret = dev->pdata->init_vddcx(1);
+ if (ret) {
+ pr_err("%s: unable to enable vddcx digital core:%d\n",
+ __func__, ret);
+ goto free_phy_id_setup;
+ }
+ }
+
+ if (dev->pdata->ldo_init) {
+ ret = dev->pdata->ldo_init(1);
+ if (ret) {
+ pr_err("%s: ldo_init failed with err:%d\n",
+ __func__, ret);
+ goto free_config_vddcx;
+ }
+ }
+
+ if (dev->pdata->ldo_enable) {
+ ret = dev->pdata->ldo_enable(1);
+ if (ret) {
+ pr_err("%s: ldo_enable failed with err:%d\n",
+ __func__, ret);
+ goto free_ldo_init;
+ }
+ }
+
+
+ /* ACk all pending interrupts and clear interrupt enable registers */
+ writel((readl(USB_OTGSC) & ~OTGSC_INTR_MASK), USB_OTGSC);
+ writel(readl(USB_USBSTS), USB_USBSTS);
+ writel(0, USB_USBINTR);
+ /* Ensure that above STOREs are completed before enabling interrupts */
+ mb();
+
+ ret = request_irq(dev->irq, msm_otg_irq, IRQF_SHARED,
+ "msm_otg", dev);
+ if (ret) {
+ pr_err("%s: request irq failed\n", __func__);
+ goto free_ldo_enable;
+ }
+
+ dev->phy.set_suspend = msm_otg_set_suspend;
+ dev->phy.set_power = msm_otg_set_power;
+
+ dev->phy.otg->set_peripheral = msm_otg_set_peripheral;
+#ifdef CONFIG_USB_EHCI_MSM_72K
+ dev->phy.otg->set_host = msm_otg_set_host;
+#endif
+ dev->phy.otg->start_hnp = msm_otg_start_hnp;
+ dev->phy.otg->send_event = msm_otg_send_event;
+ dev->set_clk = msm_otg_set_clk;
+ dev->reset = otg_reset;
+ dev->phy.io_ops = &msm_otg_io_ops;
+ if (usb_set_transceiver(&dev->phy)) {
+ WARN_ON(1);
+ goto free_otg_irq;
+ }
+#ifdef CONFIG_USB_MSM_ACA
+ /* Link doesnt support id_a/b/c interrupts, hence polling
+ * needs to be done to support ACA charger
+ */
+ init_timer(&dev->id_timer);
+ dev->id_timer.function = msm_otg_id_func;
+ dev->id_timer.data = (unsigned long) dev;
+#endif
+
+ atomic_set(&dev->chg_type, USB_CHG_TYPE__INVALID);
+ if (dev->pdata->chg_init && dev->pdata->chg_init(1))
+ pr_err("%s: chg_init failed\n", __func__);
+
+ device_init_wakeup(&pdev->dev, 1);
+
+ ret = pm_runtime_set_active(&pdev->dev);
+ if (ret < 0)
+ pr_err("%s: pm_runtime: Fail to set active\n", __func__);
+
+ ret = 0;
+ pm_runtime_enable(&pdev->dev);
+ pm_runtime_get(&pdev->dev);
+
+
+ ret = otg_debugfs_init(dev);
+ if (ret) {
+ pr_err("%s: otg_debugfs_init failed\n", __func__);
+ goto chg_deinit;
+ }
+
+#ifdef CONFIG_USB_OTG
+ ret = sysfs_create_group(&pdev->dev.kobj, &msm_otg_attr_grp);
+ if (ret < 0) {
+ pr_err("%s: Failed to create the sysfs entry\n", __func__);
+ otg_debugfs_cleanup();
+ goto chg_deinit;
+ }
+#endif
+
+
+ return 0;
+
+chg_deinit:
+ if (dev->pdata->chg_init)
+ dev->pdata->chg_init(0);
+free_otg_irq:
+ free_irq(dev->irq, dev);
+free_ldo_enable:
+ if (dev->pdata->ldo_enable)
+ dev->pdata->ldo_enable(0);
+ if (dev->pdata->setup_gpio)
+ dev->pdata->setup_gpio(USB_SWITCH_DISABLE);
+free_ldo_init:
+ if (dev->pdata->ldo_init)
+ dev->pdata->ldo_init(0);
+free_config_vddcx:
+ if (dev->pdata->init_vddcx)
+ dev->pdata->init_vddcx(0);
+free_phy_id_setup:
+ if (dev->pdata->phy_id_setup_init)
+ dev->pdata->phy_id_setup_init(0);
+free_pmic_vbus_notif:
+ if (dev->pdata->pmic_vbus_notif_init && dev->pmic_vbus_notif_supp)
+ dev->pdata->pmic_vbus_notif_init(&msm_otg_set_vbus_state, 0);
+free_gpio:
+ if (dev->pdata->init_gpio)
+ dev->pdata->init_gpio(0);
+free_wq:
+ destroy_workqueue(dev->wq);
+free_wlock:
+ wake_lock_destroy(&dev->wlock);
+free_xo_handle:
+ msm_xo_put(dev->xo_handle);
+free_regs:
+ iounmap(dev->regs);
+put_phy_clk:
+ if (dev->phy_reset_clk)
+ clk_put(dev->phy_reset_clk);
+put_iface_clk:
+ if (dev->iface_clk) {
+ clk_disable_unprepare(dev->iface_clk);
+ clk_put(dev->iface_clk);
+ }
+put_core_clk:
+ clk_disable_unprepare(dev->core_clk);
+ clk_put(dev->core_clk);
+put_alt_core_clk:
+ clk_put(dev->alt_core_clk);
+rpc_fail:
+ if (dev->pdata->rpc_connect)
+ dev->pdata->rpc_connect(0);
+free_dev:
+ kfree(dev->phy.otg);
+ kfree(dev);
+ return ret;
+}
+
+static int __exit msm_otg_remove(struct platform_device *pdev)
+{
+ struct msm_otg *dev = the_msm_otg;
+
+ otg_debugfs_cleanup();
+#ifdef CONFIG_USB_OTG
+ sysfs_remove_group(&pdev->dev.kobj, &msm_otg_attr_grp);
+#endif
+ destroy_workqueue(dev->wq);
+ wake_lock_destroy(&dev->wlock);
+
+ if (dev->pdata->setup_gpio)
+ dev->pdata->setup_gpio(USB_SWITCH_DISABLE);
+
+ if (dev->pdata->init_vddcx)
+ dev->pdata->init_vddcx(0);
+ if (dev->pdata->ldo_enable)
+ dev->pdata->ldo_enable(0);
+
+ if (dev->pdata->ldo_init)
+ dev->pdata->ldo_init(0);
+
+ if (dev->pmic_vbus_notif_supp)
+ dev->pdata->pmic_vbus_notif_init(&msm_otg_set_vbus_state, 0);
+
+ if (dev->pdata->phy_id_setup_init)
+ dev->pdata->phy_id_setup_init(0);
+
+ if (dev->pmic_id_notif_supp)
+ dev->pdata->pmic_id_notif_init(&msm_otg_set_id_state, 0);
+
+#ifdef CONFIG_USB_MSM_ACA
+ del_timer_sync(&dev->id_timer);
+#endif
+ if (dev->pdata->chg_init)
+ dev->pdata->chg_init(0);
+ free_irq(dev->irq, pdev);
+ iounmap(dev->regs);
+ clk_disable_unprepare(dev->core_clk);
+ clk_put(dev->core_clk);
+ if (dev->iface_clk) {
+ clk_disable_unprepare(dev->iface_clk);
+ clk_put(dev->iface_clk);
+ }
+ if (dev->alt_core_clk)
+ clk_put(dev->alt_core_clk);
+ if (dev->phy_reset_clk)
+ clk_put(dev->phy_reset_clk);
+ if (dev->pdata->rpc_connect)
+ dev->pdata->rpc_connect(0);
+ msm_xo_put(dev->xo_handle);
+ pm_qos_remove_request(&dev->pdata->pm_qos_req_dma);
+
+ pm_runtime_put(&pdev->dev);
+ pm_runtime_disable(&pdev->dev);
+ kfree(dev->phy.otg);
+ kfree(dev);
+ return 0;
+}
+
+static int msm_otg_runtime_suspend(struct device *dev)
+{
+ struct msm_otg *otg = the_msm_otg;
+
+ dev_dbg(dev, "pm_runtime: suspending...\n");
+ msm_otg_suspend(otg);
+ return 0;
+}
+
+static int msm_otg_runtime_resume(struct device *dev)
+{
+ struct msm_otg *otg = the_msm_otg;
+
+ dev_dbg(dev, "pm_runtime: resuming...\n");
+ msm_otg_resume(otg);
+ return 0;
+}
+
+static int msm_otg_runtime_idle(struct device *dev)
+{
+ dev_dbg(dev, "pm_runtime: idling...\n");
+ return 0;
+}
+
+static struct dev_pm_ops msm_otg_dev_pm_ops = {
+ .runtime_suspend = msm_otg_runtime_suspend,
+ .runtime_resume = msm_otg_runtime_resume,
+ .runtime_idle = msm_otg_runtime_idle,
+};
+
+static struct platform_driver msm_otg_driver = {
+ .remove = __exit_p(msm_otg_remove),
+ .driver = {
+ .name = DRIVER_NAME,
+ .owner = THIS_MODULE,
+ .pm = &msm_otg_dev_pm_ops,
+ },
+};
+
+static int __init msm_otg_init(void)
+{
+ return platform_driver_probe(&msm_otg_driver, msm_otg_probe);
+}
+
+static void __exit msm_otg_exit(void)
+{
+ platform_driver_unregister(&msm_otg_driver);
+}
+
+module_init(msm_otg_init);
+module_exit(msm_otg_exit);
+
+MODULE_LICENSE("GPL v2");
+MODULE_DESCRIPTION("MSM usb transceiver driver");
+MODULE_VERSION("1.00");
diff --git a/drivers/usb/otg/msm_otg.c b/drivers/usb/otg/msm_otg.c
index 1d0347c..59f01f6 100644
--- a/drivers/usb/otg/msm_otg.c
+++ b/drivers/usb/otg/msm_otg.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2009-2011, Code Aurora Forum. All rights reserved.
+/* Copyright (c) 2009-2012, Code Aurora Forum. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -9,11 +9,6 @@
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- *
*/
#include <linux/module.h>
@@ -30,23 +25,32 @@
#include <linux/debugfs.h>
#include <linux/seq_file.h>
#include <linux/pm_runtime.h>
+#include <linux/of.h>
+#include <linux/dma-mapping.h>
#include <linux/usb.h>
#include <linux/usb/otg.h>
#include <linux/usb/ulpi.h>
#include <linux/usb/gadget.h>
#include <linux/usb/hcd.h>
+#include <linux/usb/quirks.h>
#include <linux/usb/msm_hsusb.h>
#include <linux/usb/msm_hsusb_hw.h>
#include <linux/regulator/consumer.h>
+#include <linux/mfd/pm8xxx/pm8921-charger.h>
+#include <linux/mfd/pm8xxx/misc.h>
+#include <linux/power_supply.h>
#include <mach/clk.h>
+#include <mach/msm_xo.h>
+#include <mach/msm_bus.h>
+#include <mach/rpm-regulator.h>
#define MSM_USB_BASE (motg->regs)
#define DRIVER_NAME "msm_otg"
+#define ID_TIMER_FREQ (jiffies + msecs_to_jiffies(500))
#define ULPI_IO_TIMEOUT_USEC (10 * 1000)
-
#define USB_PHY_3P3_VOL_MIN 3050000 /* uV */
#define USB_PHY_3P3_VOL_MAX 3300000 /* uV */
#define USB_PHY_3P3_HPM_LOAD 50000 /* uA */
@@ -57,61 +61,58 @@
#define USB_PHY_1P8_HPM_LOAD 50000 /* uA */
#define USB_PHY_1P8_LPM_LOAD 4000 /* uA */
-#define USB_PHY_VDD_DIG_VOL_MIN 1000000 /* uV */
+#define USB_PHY_VDD_DIG_VOL_NONE 0 /*uV */
+#define USB_PHY_VDD_DIG_VOL_MIN 1045000 /* uV */
#define USB_PHY_VDD_DIG_VOL_MAX 1320000 /* uV */
+static DECLARE_COMPLETION(pmic_vbus_init);
+static struct msm_otg *the_msm_otg;
+static bool debug_aca_enabled;
+static bool debug_bus_voting_enabled;
+
static struct regulator *hsusb_3p3;
static struct regulator *hsusb_1p8;
static struct regulator *hsusb_vddcx;
+static struct regulator *vbus_otg;
+static struct regulator *mhl_analog_switch;
+static struct power_supply *psy;
-static int msm_hsusb_init_vddcx(struct msm_otg *motg, int init)
+static bool aca_id_turned_on;
+static inline bool aca_enabled(void)
{
- int ret = 0;
-
- if (init) {
- hsusb_vddcx = regulator_get(motg->phy.dev, "HSUSB_VDDCX");
- if (IS_ERR(hsusb_vddcx)) {
- dev_err(motg->phy.dev, "unable to get hsusb vddcx\n");
- return PTR_ERR(hsusb_vddcx);
- }
-
- ret = regulator_set_voltage(hsusb_vddcx,
- USB_PHY_VDD_DIG_VOL_MIN,
- USB_PHY_VDD_DIG_VOL_MAX);
- if (ret) {
- dev_err(motg->phy.dev, "unable to set the voltage "
- "for hsusb vddcx\n");
- regulator_put(hsusb_vddcx);
- return ret;
- }
-
- ret = regulator_enable(hsusb_vddcx);
- if (ret) {
- dev_err(motg->phy.dev, "unable to enable hsusb vddcx\n");
- regulator_put(hsusb_vddcx);
- }
- } else {
- ret = regulator_set_voltage(hsusb_vddcx, 0,
- USB_PHY_VDD_DIG_VOL_MAX);
- if (ret)
- dev_err(motg->phy.dev, "unable to set the voltage "
- "for hsusb vddcx\n");
- ret = regulator_disable(hsusb_vddcx);
- if (ret)
- dev_err(motg->phy.dev, "unable to disable hsusb vddcx\n");
-
- regulator_put(hsusb_vddcx);
- }
-
- return ret;
+#ifdef CONFIG_USB_MSM_ACA
+ return true;
+#else
+ return debug_aca_enabled;
+#endif
}
+enum usb_vdd_value {
+ VDD_NONE = 0,
+ VDD_MIN,
+ VDD_MAX,
+ VDD_VAL_MAX,
+};
+
+static const int vdd_val[VDD_TYPE_MAX][VDD_VAL_MAX] = {
+ { /* VDD_CX CORNER Voting */
+ [VDD_NONE] = RPM_VREG_CORNER_NONE,
+ [VDD_MIN] = RPM_VREG_CORNER_NOMINAL,
+ [VDD_MAX] = RPM_VREG_CORNER_HIGH,
+ },
+ { /* VDD_CX Voltage Voting */
+ [VDD_NONE] = USB_PHY_VDD_DIG_VOL_NONE,
+ [VDD_MIN] = USB_PHY_VDD_DIG_VOL_MIN,
+ [VDD_MAX] = USB_PHY_VDD_DIG_VOL_MAX,
+ },
+};
+
static int msm_hsusb_ldo_init(struct msm_otg *motg, int init)
{
int rc = 0;
if (init) {
- hsusb_3p3 = regulator_get(motg->phy.dev, "HSUSB_3p3");
+ hsusb_3p3 = devm_regulator_get(motg->phy.dev, "HSUSB_3p3");
if (IS_ERR(hsusb_3p3)) {
dev_err(motg->phy.dev, "unable to get hsusb 3p3\n");
return PTR_ERR(hsusb_3p3);
@@ -120,60 +121,43 @@
rc = regulator_set_voltage(hsusb_3p3, USB_PHY_3P3_VOL_MIN,
USB_PHY_3P3_VOL_MAX);
if (rc) {
- dev_err(motg->phy.dev, "unable to set voltage level "
- "for hsusb 3p3\n");
- goto put_3p3;
+ dev_err(motg->phy.dev, "unable to set voltage level for"
+ "hsusb 3p3\n");
+ return rc;
}
- rc = regulator_enable(hsusb_3p3);
- if (rc) {
- dev_err(motg->phy.dev, "unable to enable the hsusb 3p3\n");
- goto put_3p3;
- }
- hsusb_1p8 = regulator_get(motg->phy.dev, "HSUSB_1p8");
+ hsusb_1p8 = devm_regulator_get(motg->phy.dev, "HSUSB_1p8");
if (IS_ERR(hsusb_1p8)) {
dev_err(motg->phy.dev, "unable to get hsusb 1p8\n");
rc = PTR_ERR(hsusb_1p8);
- goto disable_3p3;
+ goto put_3p3_lpm;
}
rc = regulator_set_voltage(hsusb_1p8, USB_PHY_1P8_VOL_MIN,
USB_PHY_1P8_VOL_MAX);
if (rc) {
- dev_err(motg->phy.dev, "unable to set voltage level "
- "for hsusb 1p8\n");
- goto put_1p8;
- }
- rc = regulator_enable(hsusb_1p8);
- if (rc) {
- dev_err(motg->phy.dev, "unable to enable the hsusb 1p8\n");
+ dev_err(motg->phy.dev, "unable to set voltage level for"
+ "hsusb 1p8\n");
goto put_1p8;
}
return 0;
}
- regulator_disable(hsusb_1p8);
put_1p8:
- regulator_put(hsusb_1p8);
-disable_3p3:
- regulator_disable(hsusb_3p3);
-put_3p3:
- regulator_put(hsusb_3p3);
+ regulator_set_voltage(hsusb_1p8, 0, USB_PHY_1P8_VOL_MAX);
+put_3p3_lpm:
+ regulator_set_voltage(hsusb_3p3, 0, USB_PHY_3P3_VOL_MAX);
return rc;
}
-#ifdef CONFIG_PM_SLEEP
-#define USB_PHY_SUSP_DIG_VOL 500000
static int msm_hsusb_config_vddcx(int high)
{
- int max_vol = USB_PHY_VDD_DIG_VOL_MAX;
+ struct msm_otg *motg = the_msm_otg;
+ enum usb_vdd_type vdd_type = motg->vdd_type;
+ int max_vol = vdd_val[vdd_type][VDD_MAX];
int min_vol;
int ret;
- if (high)
- min_vol = USB_PHY_VDD_DIG_VOL_MIN;
- else
- min_vol = USB_PHY_SUSP_DIG_VOL;
-
+ min_vol = vdd_val[vdd_type][!!high];
ret = regulator_set_voltage(hsusb_vddcx, min_vol, max_vol);
if (ret) {
pr_err("%s: unable to set the voltage for regulator "
@@ -185,18 +169,17 @@
return ret;
}
-#endif
-static int msm_hsusb_ldo_set_mode(int on)
+static int msm_hsusb_ldo_enable(struct msm_otg *motg, int on)
{
int ret = 0;
- if (!hsusb_1p8 || IS_ERR(hsusb_1p8)) {
+ if (IS_ERR(hsusb_1p8)) {
pr_err("%s: HSUSB_1p8 is not initialized\n", __func__);
return -ENODEV;
}
- if (!hsusb_3p3 || IS_ERR(hsusb_3p3)) {
+ if (IS_ERR(hsusb_3p3)) {
pr_err("%s: HSUSB_3p3 is not initialized\n", __func__);
return -ENODEV;
}
@@ -205,29 +188,61 @@
ret = regulator_set_optimum_mode(hsusb_1p8,
USB_PHY_1P8_HPM_LOAD);
if (ret < 0) {
- pr_err("%s: Unable to set HPM of the regulator "
+ pr_err("%s: Unable to set HPM of the regulator:"
"HSUSB_1p8\n", __func__);
return ret;
}
+
+ ret = regulator_enable(hsusb_1p8);
+ if (ret) {
+ dev_err(motg->phy.dev, "%s: unable to enable the hsusb 1p8\n",
+ __func__);
+ regulator_set_optimum_mode(hsusb_1p8, 0);
+ return ret;
+ }
+
ret = regulator_set_optimum_mode(hsusb_3p3,
USB_PHY_3P3_HPM_LOAD);
if (ret < 0) {
- pr_err("%s: Unable to set HPM of the regulator "
+ pr_err("%s: Unable to set HPM of the regulator:"
"HSUSB_3p3\n", __func__);
- regulator_set_optimum_mode(hsusb_1p8,
- USB_PHY_1P8_LPM_LOAD);
+ regulator_set_optimum_mode(hsusb_1p8, 0);
+ regulator_disable(hsusb_1p8);
return ret;
}
+
+ ret = regulator_enable(hsusb_3p3);
+ if (ret) {
+ dev_err(motg->phy.dev, "%s: unable to enable the hsusb 3p3\n",
+ __func__);
+ regulator_set_optimum_mode(hsusb_3p3, 0);
+ regulator_set_optimum_mode(hsusb_1p8, 0);
+ regulator_disable(hsusb_1p8);
+ return ret;
+ }
+
} else {
- ret = regulator_set_optimum_mode(hsusb_1p8,
- USB_PHY_1P8_LPM_LOAD);
+ ret = regulator_disable(hsusb_1p8);
+ if (ret) {
+ dev_err(motg->phy.dev, "%s: unable to disable the hsusb 1p8\n",
+ __func__);
+ return ret;
+ }
+
+ ret = regulator_set_optimum_mode(hsusb_1p8, 0);
if (ret < 0)
- pr_err("%s: Unable to set LPM of the regulator "
+ pr_err("%s: Unable to set LPM of the regulator:"
"HSUSB_1p8\n", __func__);
- ret = regulator_set_optimum_mode(hsusb_3p3,
- USB_PHY_3P3_LPM_LOAD);
+
+ ret = regulator_disable(hsusb_3p3);
+ if (ret) {
+ dev_err(motg->phy.dev, "%s: unable to disable the hsusb 3p3\n",
+ __func__);
+ return ret;
+ }
+ ret = regulator_set_optimum_mode(hsusb_3p3, 0);
if (ret < 0)
- pr_err("%s: Unable to set LPM of the regulator "
+ pr_err("%s: Unable to set LPM of the regulator:"
"HSUSB_3p3\n", __func__);
}
@@ -235,6 +250,26 @@
return ret < 0 ? ret : 0;
}
+static void msm_hsusb_mhl_switch_enable(struct msm_otg *motg, bool on)
+{
+ struct msm_otg_platform_data *pdata = motg->pdata;
+
+ if (!pdata->mhl_enable)
+ return;
+
+ if (!mhl_analog_switch) {
+ pr_err("%s: mhl_analog_switch is NULL.\n", __func__);
+ return;
+ }
+
+ if (on) {
+ if (regulator_enable(mhl_analog_switch))
+ pr_err("unable to enable mhl_analog_switch\n");
+ } else {
+ regulator_disable(mhl_analog_switch);
+ }
+}
+
static int ulpi_read(struct usb_phy *phy, u32 reg)
{
struct msm_otg *motg = container_of(phy, struct msm_otg, phy);
@@ -310,6 +345,9 @@
{
int ret;
+ if (IS_ERR(motg->clk))
+ return 0;
+
if (assert) {
ret = clk_reset(motg->clk, CLK_RESET_ASSERT);
if (ret)
@@ -326,6 +364,9 @@
{
int ret;
+ if (IS_ERR(motg->phy_reset_clk))
+ return 0;
+
ret = clk_reset(motg->phy_reset_clk, CLK_RESET_ASSERT);
if (ret) {
dev_err(motg->phy.dev, "usb phy clk assert failed\n");
@@ -390,26 +431,13 @@
}
#define LINK_RESET_TIMEOUT_USEC (250 * 1000)
-static int msm_otg_reset(struct usb_phy *phy)
+static int msm_otg_link_reset(struct msm_otg *motg)
{
- struct msm_otg *motg = container_of(phy, struct msm_otg, phy);
- struct msm_otg_platform_data *pdata = motg->pdata;
int cnt = 0;
- int ret;
- u32 val = 0;
- u32 ulpi_val = 0;
- ret = msm_otg_phy_reset(motg);
- if (ret) {
- dev_err(phy->dev, "phy_reset failed\n");
- return ret;
- }
-
- ulpi_init(motg);
-
- writel(USBCMD_RESET, USB_USBCMD);
+ writel_relaxed(USBCMD_RESET, USB_USBCMD);
while (cnt < LINK_RESET_TIMEOUT_USEC) {
- if (!(readl(USB_USBCMD) & USBCMD_RESET))
+ if (!(readl_relaxed(USB_USBCMD) & USBCMD_RESET))
break;
udelay(1);
cnt++;
@@ -418,15 +446,59 @@
return -ETIMEDOUT;
/* select ULPI phy */
- writel(0x80000000, USB_PORTSC);
+ writel_relaxed(0x80000000, USB_PORTSC);
+ writel_relaxed(0x0, USB_AHBBURST);
+ writel_relaxed(0x08, USB_AHBMODE);
+ return 0;
+}
+
+static int msm_otg_reset(struct usb_phy *phy)
+{
+ struct msm_otg *motg = container_of(phy, struct msm_otg, phy);
+ struct msm_otg_platform_data *pdata = motg->pdata;
+ int ret;
+ u32 val = 0;
+ u32 ulpi_val = 0;
+
+ /*
+ * USB PHY and Link reset also reset the USB BAM.
+ * Thus perform reset operation only once to avoid
+ * USB BAM reset on other cases e.g. USB cable disconnections.
+ */
+ if (pdata->disable_reset_on_disconnect) {
+ if (motg->reset_counter)
+ return 0;
+ else
+ motg->reset_counter++;
+ }
+
+ if (!IS_ERR(motg->clk))
+ clk_prepare_enable(motg->clk);
+ ret = msm_otg_phy_reset(motg);
+ if (ret) {
+ dev_err(phy->dev, "phy_reset failed\n");
+ return ret;
+ }
+
+ aca_id_turned_on = false;
+ ret = msm_otg_link_reset(motg);
+ if (ret) {
+ dev_err(phy->dev, "link reset failed\n");
+ return ret;
+ }
msleep(100);
- writel(0x0, USB_AHBBURST);
- writel(0x00, USB_AHBMODE);
+ ulpi_init(motg);
+
+ /* Ensure that RESET operation is completed before turning off clock */
+ mb();
+
+ if (!IS_ERR(motg->clk))
+ clk_disable_unprepare(motg->clk);
if (pdata->otg_control == OTG_PHY_CONTROL) {
- val = readl(USB_OTGSC);
+ val = readl_relaxed(USB_OTGSC);
if (pdata->mode == USB_OTG) {
ulpi_val = ULPI_INT_IDGRD | ULPI_INT_SESS_VALID;
val |= OTGSC_IDIE | OTGSC_BSVIE;
@@ -434,14 +506,223 @@
ulpi_val = ULPI_INT_SESS_VALID;
val |= OTGSC_BSVIE;
}
- writel(val, USB_OTGSC);
+ writel_relaxed(val, USB_OTGSC);
ulpi_write(phy, ulpi_val, ULPI_USB_INT_EN_RISE);
ulpi_write(phy, ulpi_val, ULPI_USB_INT_EN_FALL);
+ } else if (pdata->otg_control == OTG_PMIC_CONTROL) {
+ ulpi_write(phy, OTG_COMP_DISABLE,
+ ULPI_SET(ULPI_PWR_CLK_MNG_REG));
+ /* Enable PMIC pull-up */
+ pm8xxx_usb_id_pullup(1);
}
return 0;
}
+static const char *timer_string(int bit)
+{
+ switch (bit) {
+ case A_WAIT_VRISE: return "a_wait_vrise";
+ case A_WAIT_VFALL: return "a_wait_vfall";
+ case B_SRP_FAIL: return "b_srp_fail";
+ case A_WAIT_BCON: return "a_wait_bcon";
+ case A_AIDL_BDIS: return "a_aidl_bdis";
+ case A_BIDL_ADIS: return "a_bidl_adis";
+ case B_ASE0_BRST: return "b_ase0_brst";
+ case A_TST_MAINT: return "a_tst_maint";
+ case B_TST_SRP: return "b_tst_srp";
+ case B_TST_CONFIG: return "b_tst_config";
+ default: return "UNDEFINED";
+ }
+}
+
+static enum hrtimer_restart msm_otg_timer_func(struct hrtimer *hrtimer)
+{
+ struct msm_otg *motg = container_of(hrtimer, struct msm_otg, timer);
+
+ switch (motg->active_tmout) {
+ case A_WAIT_VRISE:
+ /* TODO: use vbus_vld interrupt */
+ set_bit(A_VBUS_VLD, &motg->inputs);
+ break;
+ case A_TST_MAINT:
+ /* OTG PET: End session after TA_TST_MAINT */
+ set_bit(A_BUS_DROP, &motg->inputs);
+ break;
+ case B_TST_SRP:
+ /*
+ * OTG PET: Initiate SRP after TB_TST_SRP of
+ * previous session end.
+ */
+ set_bit(B_BUS_REQ, &motg->inputs);
+ break;
+ case B_TST_CONFIG:
+ clear_bit(A_CONN, &motg->inputs);
+ break;
+ default:
+ set_bit(motg->active_tmout, &motg->tmouts);
+ }
+
+ pr_debug("expired %s timer\n", timer_string(motg->active_tmout));
+ queue_work(system_nrt_wq, &motg->sm_work);
+ return HRTIMER_NORESTART;
+}
+
+static void msm_otg_del_timer(struct msm_otg *motg)
+{
+ int bit = motg->active_tmout;
+
+ pr_debug("deleting %s timer. remaining %lld msec\n", timer_string(bit),
+ div_s64(ktime_to_us(hrtimer_get_remaining(
+ &motg->timer)), 1000));
+ hrtimer_cancel(&motg->timer);
+ clear_bit(bit, &motg->tmouts);
+}
+
+static void msm_otg_start_timer(struct msm_otg *motg, int time, int bit)
+{
+ clear_bit(bit, &motg->tmouts);
+ motg->active_tmout = bit;
+ pr_debug("starting %s timer\n", timer_string(bit));
+ hrtimer_start(&motg->timer,
+ ktime_set(time / 1000, (time % 1000) * 1000000),
+ HRTIMER_MODE_REL);
+}
+
+static void msm_otg_init_timer(struct msm_otg *motg)
+{
+ hrtimer_init(&motg->timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
+ motg->timer.function = msm_otg_timer_func;
+}
+
+static int msm_otg_start_hnp(struct usb_otg *otg)
+{
+ struct msm_otg *motg = container_of(otg->phy, struct msm_otg, phy);
+
+ if (otg->phy->state != OTG_STATE_A_HOST) {
+ pr_err("HNP can not be initiated in %s state\n",
+ otg_state_string(otg->phy->state));
+ return -EINVAL;
+ }
+
+ pr_debug("A-Host: HNP initiated\n");
+ clear_bit(A_BUS_REQ, &motg->inputs);
+ queue_work(system_nrt_wq, &motg->sm_work);
+ return 0;
+}
+
+static int msm_otg_start_srp(struct usb_otg *otg)
+{
+ struct msm_otg *motg = container_of(otg->phy, struct msm_otg, phy);
+ u32 val;
+ int ret = 0;
+
+ if (otg->phy->state != OTG_STATE_B_IDLE) {
+ pr_err("SRP can not be initiated in %s state\n",
+ otg_state_string(otg->phy->state));
+ ret = -EINVAL;
+ goto out;
+ }
+
+ if ((jiffies - motg->b_last_se0_sess) < msecs_to_jiffies(TB_SRP_INIT)) {
+ pr_debug("initial conditions of SRP are not met. Try again"
+ "after some time\n");
+ ret = -EAGAIN;
+ goto out;
+ }
+
+ pr_debug("B-Device SRP started\n");
+
+ /*
+ * PHY won't pull D+ high unless it detects Vbus valid.
+ * Since by definition, SRP is only done when Vbus is not valid,
+ * software work-around needs to be used to spoof the PHY into
+ * thinking it is valid. This can be done using the VBUSVLDEXTSEL and
+ * VBUSVLDEXT register bits.
+ */
+ ulpi_write(otg->phy, 0x03, 0x97);
+ /*
+ * Harware auto assist data pulsing: Data pulse is given
+ * for 7msec; wait for vbus
+ */
+ val = readl_relaxed(USB_OTGSC);
+ writel_relaxed((val & ~OTGSC_INTSTS_MASK) | OTGSC_HADP, USB_OTGSC);
+
+ /* VBUS plusing is obsoleted in OTG 2.0 supplement */
+out:
+ return ret;
+}
+
+static void msm_otg_host_hnp_enable(struct usb_otg *otg, bool enable)
+{
+ struct usb_hcd *hcd = bus_to_hcd(otg->host);
+ struct usb_device *rhub = otg->host->root_hub;
+
+ if (enable) {
+ pm_runtime_disable(&rhub->dev);
+ rhub->state = USB_STATE_NOTATTACHED;
+ hcd->driver->bus_suspend(hcd);
+ clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
+ } else {
+ usb_remove_hcd(hcd);
+ msm_otg_reset(otg->phy);
+ usb_add_hcd(hcd, hcd->irq, IRQF_SHARED);
+ }
+}
+
+static int msm_otg_set_suspend(struct usb_phy *phy, int suspend)
+{
+ struct msm_otg *motg = container_of(phy, struct msm_otg, phy);
+
+ if (aca_enabled())
+ return 0;
+
+ if (suspend) {
+ switch (phy->state) {
+ case OTG_STATE_A_WAIT_BCON:
+ if (TA_WAIT_BCON > 0)
+ break;
+ /* fall through */
+ case OTG_STATE_A_HOST:
+ pr_debug("host bus suspend\n");
+ clear_bit(A_BUS_REQ, &motg->inputs);
+ queue_work(system_nrt_wq, &motg->sm_work);
+ break;
+ case OTG_STATE_B_PERIPHERAL:
+ pr_debug("peripheral bus suspend\n");
+ if (!(motg->caps & ALLOW_LPM_ON_DEV_SUSPEND))
+ break;
+ set_bit(A_BUS_SUSPEND, &motg->inputs);
+ queue_work(system_nrt_wq, &motg->sm_work);
+ break;
+
+ default:
+ break;
+ }
+ } else {
+ switch (phy->state) {
+ case OTG_STATE_A_SUSPEND:
+ /* Remote wakeup or resume */
+ set_bit(A_BUS_REQ, &motg->inputs);
+ phy->state = OTG_STATE_A_HOST;
+
+ /* ensure hardware is not in low power mode */
+ pm_runtime_resume(phy->dev);
+ break;
+ case OTG_STATE_B_PERIPHERAL:
+ pr_debug("peripheral bus resume\n");
+ if (!(motg->caps & ALLOW_LPM_ON_DEV_SUSPEND))
+ break;
+ clear_bit(A_BUS_SUSPEND, &motg->inputs);
+ queue_work(system_nrt_wq, &motg->sm_work);
+ break;
+ default:
+ break;
+ }
+ }
+ return 0;
+}
+
#define PHY_SUSPEND_TIMEOUT_USEC (500 * 1000)
#define PHY_RESUME_TIMEOUT_USEC (100 * 1000)
@@ -452,11 +733,20 @@
struct usb_bus *bus = phy->otg->host;
struct msm_otg_platform_data *pdata = motg->pdata;
int cnt = 0;
+ bool host_bus_suspend, device_bus_suspend, dcp;
+ u32 phy_ctrl_val = 0, cmd_val;
+ unsigned ret;
+ u32 portsc;
if (atomic_read(&motg->in_lpm))
return 0;
disable_irq(motg->irq);
+ host_bus_suspend = phy->otg->host && !test_bit(ID, &motg->inputs);
+ device_bus_suspend = phy->otg->gadget && test_bit(ID, &motg->inputs) &&
+ test_bit(A_BUS_SUSPEND, &motg->inputs) &&
+ motg->caps & ALLOW_LPM_ON_DEV_SUSPEND;
+ dcp = motg->chg_type == USB_DCP_CHARGER;
/*
* Chipidea 45-nm PHY suspend sequence:
*
@@ -481,17 +771,22 @@
ulpi_write(phy, 0x08, 0x09);
}
- /*
+
+ /* Set the PHCD bit, only if it is not set by the controller.
* PHY may take some time or even fail to enter into low power
* mode (LPM). Hence poll for 500 msec and reset the PHY and link
* in failure case.
*/
- writel(readl(USB_PORTSC) | PORTSC_PHCD, USB_PORTSC);
- while (cnt < PHY_SUSPEND_TIMEOUT_USEC) {
- if (readl(USB_PORTSC) & PORTSC_PHCD)
- break;
- udelay(1);
- cnt++;
+ portsc = readl_relaxed(USB_PORTSC);
+ if (!(portsc & PORTSC_PHCD)) {
+ writel_relaxed(portsc | PORTSC_PHCD,
+ USB_PORTSC);
+ while (cnt < PHY_SUSPEND_TIMEOUT_USEC) {
+ if (readl_relaxed(USB_PORTSC) & PORTSC_PHCD)
+ break;
+ udelay(1);
+ cnt++;
+ }
}
if (cnt >= PHY_SUSPEND_TIMEOUT_USEC) {
@@ -507,34 +802,69 @@
* line must be disabled till async interrupt enable bit is cleared
* in USBCMD register. Assert STP (ULPI interface STOP signal) to
* block data communication from PHY.
+ *
+ * PHY retention mode is disallowed while entering to LPM with wall
+ * charger connected. But PHY is put into suspend mode. Hence
+ * enable asynchronous interrupt to detect charger disconnection when
+ * PMIC notifications are unavailable.
*/
- writel(readl(USB_USBCMD) | ASYNC_INTR_CTRL | ULPI_STP_CTRL, USB_USBCMD);
+ cmd_val = readl_relaxed(USB_USBCMD);
+ if (host_bus_suspend || device_bus_suspend ||
+ (motg->pdata->otg_control == OTG_PHY_CONTROL && dcp))
+ cmd_val |= ASYNC_INTR_CTRL | ULPI_STP_CTRL;
+ else
+ cmd_val |= ULPI_STP_CTRL;
+ writel_relaxed(cmd_val, USB_USBCMD);
- if (motg->pdata->phy_type == SNPS_28NM_INTEGRATED_PHY &&
- motg->pdata->otg_control == OTG_PMIC_CONTROL)
- writel(readl(USB_PHY_CTRL) | PHY_RETEN, USB_PHY_CTRL);
+ /*
+ * BC1.2 spec mandates PD to enable VDP_SRC when charging from DCP.
+ * PHY retention and collapse can not happen with VDP_SRC enabled.
+ */
+ if (motg->caps & ALLOW_PHY_RETENTION && !host_bus_suspend &&
+ !device_bus_suspend && !dcp) {
+ phy_ctrl_val = readl_relaxed(USB_PHY_CTRL);
+ if (motg->pdata->otg_control == OTG_PHY_CONTROL)
+ /* Enable PHY HV interrupts to wake MPM/Link */
+ phy_ctrl_val |=
+ (PHY_IDHV_INTEN | PHY_OTGSESSVLDHV_INTEN);
- clk_disable(motg->pclk);
- clk_disable(motg->clk);
- if (motg->core_clk)
- clk_disable(motg->core_clk);
-
- if (!IS_ERR(motg->pclk_src))
- clk_disable(motg->pclk_src);
-
- if (motg->pdata->phy_type == SNPS_28NM_INTEGRATED_PHY &&
- motg->pdata->otg_control == OTG_PMIC_CONTROL) {
- msm_hsusb_ldo_set_mode(0);
- msm_hsusb_config_vddcx(0);
+ writel_relaxed(phy_ctrl_val & ~PHY_RETEN, USB_PHY_CTRL);
+ motg->lpm_flags |= PHY_RETENTIONED;
}
- if (device_may_wakeup(phy->dev))
+ /* Ensure that above operation is completed before turning off clocks */
+ mb();
+ clk_disable_unprepare(motg->pclk);
+ clk_disable_unprepare(motg->core_clk);
+
+ /* usb phy no more require TCXO clock, hence vote for TCXO disable */
+ ret = msm_xo_mode_vote(motg->xo_handle, MSM_XO_MODE_OFF);
+ if (ret)
+ dev_err(phy->dev, "%s failed to devote for "
+ "TCXO D0 buffer%d\n", __func__, ret);
+
+ if (motg->caps & ALLOW_PHY_POWER_COLLAPSE &&
+ !host_bus_suspend && !dcp) {
+ msm_hsusb_ldo_enable(motg, 0);
+ motg->lpm_flags |= PHY_PWR_COLLAPSED;
+ }
+
+ if (motg->lpm_flags & PHY_RETENTIONED) {
+ msm_hsusb_config_vddcx(0);
+ msm_hsusb_mhl_switch_enable(motg, 0);
+ }
+
+ if (device_may_wakeup(phy->dev)) {
enable_irq_wake(motg->irq);
+ if (motg->pdata->pmic_id_irq)
+ enable_irq_wake(motg->pdata->pmic_id_irq);
+ }
if (bus)
clear_bit(HCD_FLAG_HW_ACCESSIBLE, &(bus_to_hcd(bus))->flags);
atomic_set(&motg->in_lpm, 1);
enable_irq(motg->irq);
+ wake_unlock(&motg->wlock);
dev_info(phy->dev, "USB in low power mode\n");
@@ -547,23 +877,40 @@
struct usb_bus *bus = phy->otg->host;
int cnt = 0;
unsigned temp;
+ u32 phy_ctrl_val = 0;
+ unsigned ret;
if (!atomic_read(&motg->in_lpm))
return 0;
- if (!IS_ERR(motg->pclk_src))
- clk_enable(motg->pclk_src);
+ wake_lock(&motg->wlock);
- clk_enable(motg->pclk);
- clk_enable(motg->clk);
- if (motg->core_clk)
- clk_enable(motg->core_clk);
+ /* Vote for TCXO when waking up the phy */
+ ret = msm_xo_mode_vote(motg->xo_handle, MSM_XO_MODE_ON);
+ if (ret)
+ dev_err(phy->dev, "%s failed to vote for "
+ "TCXO D0 buffer%d\n", __func__, ret);
- if (motg->pdata->phy_type == SNPS_28NM_INTEGRATED_PHY &&
- motg->pdata->otg_control == OTG_PMIC_CONTROL) {
- msm_hsusb_ldo_set_mode(1);
+ clk_prepare_enable(motg->core_clk);
+
+ clk_prepare_enable(motg->pclk);
+
+ if (motg->lpm_flags & PHY_PWR_COLLAPSED) {
+ msm_hsusb_ldo_enable(motg, 1);
+ motg->lpm_flags &= ~PHY_PWR_COLLAPSED;
+ }
+
+ if (motg->lpm_flags & PHY_RETENTIONED) {
+ msm_hsusb_mhl_switch_enable(motg, 1);
msm_hsusb_config_vddcx(1);
- writel(readl(USB_PHY_CTRL) & ~PHY_RETEN, USB_PHY_CTRL);
+ phy_ctrl_val = readl_relaxed(USB_PHY_CTRL);
+ phy_ctrl_val |= PHY_RETEN;
+ if (motg->pdata->otg_control == OTG_PHY_CONTROL)
+ /* Disable PHY HV interrupts */
+ phy_ctrl_val &=
+ ~(PHY_IDHV_INTEN | PHY_OTGSESSVLDHV_INTEN);
+ writel_relaxed(phy_ctrl_val, USB_PHY_CTRL);
+ motg->lpm_flags &= ~PHY_RETENTIONED;
}
temp = readl(USB_USBCMD);
@@ -598,8 +945,11 @@
}
skip_phy_resume:
- if (device_may_wakeup(phy->dev))
+ if (device_may_wakeup(phy->dev)) {
disable_irq_wake(motg->irq);
+ if (motg->pdata->pmic_id_irq)
+ disable_irq_wake(motg->pdata->pmic_id_irq);
+ }
if (bus)
set_bit(HCD_FLAG_HW_ACCESSIBLE, &(bus_to_hcd(bus))->flags);
@@ -607,7 +957,6 @@
if (motg->async_int) {
motg->async_int = 0;
- pm_runtime_put(phy->dev);
enable_irq(motg->irq);
}
@@ -617,13 +966,91 @@
}
#endif
+static int msm_otg_notify_chg_type(struct msm_otg *motg)
+{
+ static int charger_type;
+ /*
+ * TODO
+ * Unify OTG driver charger types and power supply charger types
+ */
+ if (charger_type == motg->chg_type)
+ return 0;
+
+ if (motg->chg_type == USB_SDP_CHARGER)
+ charger_type = POWER_SUPPLY_TYPE_USB;
+ else if (motg->chg_type == USB_CDP_CHARGER)
+ charger_type = POWER_SUPPLY_TYPE_USB_CDP;
+ else if (motg->chg_type == USB_DCP_CHARGER)
+ charger_type = POWER_SUPPLY_TYPE_USB_DCP;
+ else if ((motg->chg_type == USB_ACA_DOCK_CHARGER ||
+ motg->chg_type == USB_ACA_A_CHARGER ||
+ motg->chg_type == USB_ACA_B_CHARGER ||
+ motg->chg_type == USB_ACA_C_CHARGER))
+ charger_type = POWER_SUPPLY_TYPE_USB_ACA;
+ else
+ charger_type = POWER_SUPPLY_TYPE_BATTERY;
+
+ return pm8921_set_usb_power_supply_type(charger_type);
+}
+
+static int msm_otg_notify_power_supply(struct msm_otg *motg, unsigned mA)
+{
+
+ if (!psy)
+ goto psy_not_supported;
+
+ if (motg->cur_power == 0 && mA > 0) {
+ /* Enable charging */
+ if (power_supply_set_online(psy, true))
+ goto psy_not_supported;
+ } else if (motg->cur_power > 0 && mA == 0) {
+ /* Disable charging */
+ if (power_supply_set_online(psy, false))
+ goto psy_not_supported;
+ return 0;
+ }
+ /* Set max current limit */
+ if (power_supply_set_current_limit(psy, 1000*mA))
+ goto psy_not_supported;
+
+ return 0;
+
+psy_not_supported:
+ dev_dbg(motg->phy.dev, "Power Supply doesn't support USB charger\n");
+ return -ENXIO;
+}
+
static void msm_otg_notify_charger(struct msm_otg *motg, unsigned mA)
{
+ struct usb_gadget *g = motg->phy.otg->gadget;
+
+ if (g && g->is_a_peripheral)
+ return;
+
+ if ((motg->chg_type == USB_ACA_DOCK_CHARGER ||
+ motg->chg_type == USB_ACA_A_CHARGER ||
+ motg->chg_type == USB_ACA_B_CHARGER ||
+ motg->chg_type == USB_ACA_C_CHARGER) &&
+ mA > IDEV_ACA_CHG_LIMIT)
+ mA = IDEV_ACA_CHG_LIMIT;
+
+ if (msm_otg_notify_chg_type(motg))
+ dev_err(motg->phy.dev,
+ "Failed notifying %d charger type to PMIC\n",
+ motg->chg_type);
+
if (motg->cur_power == mA)
return;
- /* TODO: Notify PMIC about available current */
dev_info(motg->phy.dev, "Avail curr from USB = %u\n", mA);
+
+ /*
+ * Use Power Supply API if supported, otherwise fallback
+ * to legacy pm8921 API.
+ */
+ if (msm_otg_notify_power_supply(motg, mA))
+ pm8921_charger_vbus_draw(mA);
+
motg->cur_power = mA;
}
@@ -644,22 +1071,24 @@
return 0;
}
-static void msm_otg_start_host(struct usb_phy *phy, int on)
+static void msm_otg_start_host(struct usb_otg *otg, int on)
{
- struct msm_otg *motg = container_of(phy, struct msm_otg, phy);
+ struct msm_otg *motg = container_of(otg->phy, struct msm_otg, phy);
struct msm_otg_platform_data *pdata = motg->pdata;
struct usb_hcd *hcd;
- if (!phy->otg->host)
+ if (!otg->host)
return;
- hcd = bus_to_hcd(phy->otg->host);
+ hcd = bus_to_hcd(otg->host);
if (on) {
- dev_dbg(phy->dev, "host on\n");
+ dev_dbg(otg->phy->dev, "host on\n");
- if (pdata->vbus_power)
- pdata->vbus_power(1);
+ if (pdata->otg_control == OTG_PHY_CONTROL)
+ ulpi_write(otg->phy, OTG_COMP_DISABLE,
+ ULPI_SET(ULPI_PWR_CLK_MNG_REG));
+
/*
* Some boards have a switch cotrolled by gpio
* to enable/disable internal HUB. Enable internal
@@ -667,19 +1096,139 @@
*/
if (pdata->setup_gpio)
pdata->setup_gpio(OTG_STATE_A_HOST);
-#ifdef CONFIG_USB
usb_add_hcd(hcd, hcd->irq, IRQF_SHARED);
-#endif
} else {
- dev_dbg(phy->dev, "host off\n");
+ dev_dbg(otg->phy->dev, "host off\n");
-#ifdef CONFIG_USB
usb_remove_hcd(hcd);
-#endif
+ /* HCD core reset all bits of PORTSC. select ULPI phy */
+ writel_relaxed(0x80000000, USB_PORTSC);
+
if (pdata->setup_gpio)
pdata->setup_gpio(OTG_STATE_UNDEFINED);
- if (pdata->vbus_power)
- pdata->vbus_power(0);
+
+ if (pdata->otg_control == OTG_PHY_CONTROL)
+ ulpi_write(otg->phy, OTG_COMP_DISABLE,
+ ULPI_CLR(ULPI_PWR_CLK_MNG_REG));
+ }
+}
+
+static int msm_otg_usbdev_notify(struct notifier_block *self,
+ unsigned long action, void *priv)
+{
+ struct msm_otg *motg = container_of(self, struct msm_otg, usbdev_nb);
+ struct usb_otg *otg = motg->phy.otg;
+ struct usb_device *udev = priv;
+
+ if (action == USB_BUS_ADD || action == USB_BUS_REMOVE)
+ goto out;
+
+ if (udev->bus != otg->host)
+ goto out;
+ /*
+ * Interested in devices connected directly to the root hub.
+ * ACA dock can supply IDEV_CHG irrespective devices connected
+ * on the accessory port.
+ */
+ if (!udev->parent || udev->parent->parent ||
+ motg->chg_type == USB_ACA_DOCK_CHARGER)
+ goto out;
+
+ switch (action) {
+ case USB_DEVICE_ADD:
+ if (aca_enabled())
+ usb_disable_autosuspend(udev);
+ if (otg->phy->state == OTG_STATE_A_WAIT_BCON) {
+ pr_debug("B_CONN set\n");
+ set_bit(B_CONN, &motg->inputs);
+ msm_otg_del_timer(motg);
+ otg->phy->state = OTG_STATE_A_HOST;
+ /*
+ * OTG PET: A-device must end session within
+ * 10 sec after PET enumeration.
+ */
+ if (udev->quirks & USB_QUIRK_OTG_PET)
+ msm_otg_start_timer(motg, TA_TST_MAINT,
+ A_TST_MAINT);
+ }
+ /* fall through */
+ case USB_DEVICE_CONFIG:
+ if (udev->actconfig)
+ motg->mA_port = udev->actconfig->desc.bMaxPower * 2;
+ else
+ motg->mA_port = IUNIT;
+ if (otg->phy->state == OTG_STATE_B_HOST)
+ msm_otg_del_timer(motg);
+ break;
+ case USB_DEVICE_REMOVE:
+ if ((otg->phy->state == OTG_STATE_A_HOST) ||
+ (otg->phy->state == OTG_STATE_A_SUSPEND)) {
+ pr_debug("B_CONN clear\n");
+ clear_bit(B_CONN, &motg->inputs);
+ /*
+ * OTG PET: A-device must end session after
+ * PET disconnection if it is enumerated
+ * with bcdDevice[0] = 1. USB core sets
+ * bus->otg_vbus_off for us. clear it here.
+ */
+ if (udev->bus->otg_vbus_off) {
+ udev->bus->otg_vbus_off = 0;
+ set_bit(A_BUS_DROP, &motg->inputs);
+ }
+ queue_work(system_nrt_wq, &motg->sm_work);
+ }
+ default:
+ break;
+ }
+ if (test_bit(ID_A, &motg->inputs))
+ msm_otg_notify_charger(motg, IDEV_ACA_CHG_MAX -
+ motg->mA_port);
+out:
+ return NOTIFY_OK;
+}
+
+static void msm_hsusb_vbus_power(struct msm_otg *motg, bool on)
+{
+ int ret;
+ static bool vbus_is_on;
+
+ if (vbus_is_on == on)
+ return;
+
+ if (motg->pdata->vbus_power) {
+ ret = motg->pdata->vbus_power(on);
+ if (!ret)
+ vbus_is_on = on;
+ return;
+ }
+
+ if (!vbus_otg) {
+ pr_err("vbus_otg is NULL.");
+ return;
+ }
+
+ /*
+ * if entering host mode tell the charger to not draw any current
+ * from usb before turning on the boost.
+ * if exiting host mode disable the boost before enabling to draw
+ * current from the source.
+ */
+ if (on) {
+ pm8921_disable_source_current(on);
+ ret = regulator_enable(vbus_otg);
+ if (ret) {
+ pr_err("unable to enable vbus_otg\n");
+ return;
+ }
+ vbus_is_on = true;
+ } else {
+ ret = regulator_disable(vbus_otg);
+ if (ret) {
+ pr_err("unable to disable vbus_otg\n");
+ return;
+ }
+ pm8921_disable_source_current(on);
+ vbus_is_on = false;
}
}
@@ -697,13 +1246,23 @@
return -ENODEV;
}
+ if (!motg->pdata->vbus_power && host) {
+ vbus_otg = devm_regulator_get(motg->phy.dev, "vbus_otg");
+ if (IS_ERR(vbus_otg)) {
+ pr_err("Unable to get vbus_otg\n");
+ return -ENODEV;
+ }
+ }
+
if (!host) {
if (otg->phy->state == OTG_STATE_A_HOST) {
pm_runtime_get_sync(otg->phy->dev);
- msm_otg_start_host(otg->phy, 0);
+ usb_unregister_notify(&motg->usbdev_nb);
+ msm_otg_start_host(otg, 0);
+ msm_hsusb_vbus_power(motg, 0);
otg->host = NULL;
otg->phy->state = OTG_STATE_UNDEFINED;
- schedule_work(&motg->sm_work);
+ queue_work(system_nrt_wq, &motg->sm_work);
} else {
otg->host = NULL;
}
@@ -714,6 +1273,11 @@
hcd = bus_to_hcd(host);
hcd->power_budget = motg->pdata->power_budget;
+#ifdef CONFIG_USB_OTG
+ host->otg_port = 1;
+#endif
+ motg->usbdev_nb.notifier_call = msm_otg_usbdev_notify;
+ usb_register_notify(&motg->usbdev_nb);
otg->host = host;
dev_dbg(otg->phy->dev, "host driver registered w/ tranceiver\n");
@@ -723,22 +1287,23 @@
*/
if (motg->pdata->mode == USB_HOST || otg->gadget) {
pm_runtime_get_sync(otg->phy->dev);
- schedule_work(&motg->sm_work);
+ queue_work(system_nrt_wq, &motg->sm_work);
}
return 0;
}
-static void msm_otg_start_peripheral(struct usb_phy *phy, int on)
+static void msm_otg_start_peripheral(struct usb_otg *otg, int on)
{
- struct msm_otg *motg = container_of(phy, struct msm_otg, phy);
+ int ret;
+ struct msm_otg *motg = container_of(otg->phy, struct msm_otg, phy);
struct msm_otg_platform_data *pdata = motg->pdata;
- if (!phy->otg->gadget)
+ if (!otg->gadget)
return;
if (on) {
- dev_dbg(phy->dev, "gadget on\n");
+ dev_dbg(otg->phy->dev, "gadget on\n");
/*
* Some boards have a switch cotrolled by gpio
* to enable/disable internal HUB. Disable internal
@@ -746,10 +1311,27 @@
*/
if (pdata->setup_gpio)
pdata->setup_gpio(OTG_STATE_B_PERIPHERAL);
- usb_gadget_vbus_connect(phy->otg->gadget);
+
+ /* Configure BUS performance parameters for MAX bandwidth */
+ if (motg->bus_perf_client && debug_bus_voting_enabled) {
+ ret = msm_bus_scale_client_update_request(
+ motg->bus_perf_client, 1);
+ if (ret)
+ dev_err(motg->phy.dev, "%s: Failed to vote for "
+ "bus bandwidth %d\n", __func__, ret);
+ }
+ usb_gadget_vbus_connect(otg->gadget);
} else {
- dev_dbg(phy->dev, "gadget off\n");
- usb_gadget_vbus_disconnect(phy->otg->gadget);
+ dev_dbg(otg->phy->dev, "gadget off\n");
+ usb_gadget_vbus_disconnect(otg->gadget);
+ /* Configure BUS performance parameters to default */
+ if (motg->bus_perf_client) {
+ ret = msm_bus_scale_client_update_request(
+ motg->bus_perf_client, 0);
+ if (ret)
+ dev_err(motg->phy.dev, "%s: Failed to devote "
+ "for bus bw %d\n", __func__, ret);
+ }
if (pdata->setup_gpio)
pdata->setup_gpio(OTG_STATE_UNDEFINED);
}
@@ -757,7 +1339,7 @@
}
static int msm_otg_set_peripheral(struct usb_otg *otg,
- struct usb_gadget *gadget)
+ struct usb_gadget *gadget)
{
struct msm_otg *motg = container_of(otg->phy, struct msm_otg, phy);
@@ -773,10 +1355,10 @@
if (!gadget) {
if (otg->phy->state == OTG_STATE_B_PERIPHERAL) {
pm_runtime_get_sync(otg->phy->dev);
- msm_otg_start_peripheral(otg->phy, 0);
+ msm_otg_start_peripheral(otg, 0);
otg->gadget = NULL;
otg->phy->state = OTG_STATE_UNDEFINED;
- schedule_work(&motg->sm_work);
+ queue_work(system_nrt_wq, &motg->sm_work);
} else {
otg->gadget = NULL;
}
@@ -792,12 +1374,190 @@
*/
if (motg->pdata->mode == USB_PERIPHERAL || otg->host) {
pm_runtime_get_sync(otg->phy->dev);
- schedule_work(&motg->sm_work);
+ queue_work(system_nrt_wq, &motg->sm_work);
}
return 0;
}
+static bool msm_chg_aca_detect(struct msm_otg *motg)
+{
+ struct usb_phy *phy = &motg->phy;
+ u32 int_sts;
+ bool ret = false;
+
+ if (!aca_enabled())
+ goto out;
+
+ if (motg->pdata->phy_type == CI_45NM_INTEGRATED_PHY)
+ goto out;
+
+ int_sts = ulpi_read(phy, 0x87);
+ switch (int_sts & 0x1C) {
+ case 0x08:
+ if (!test_and_set_bit(ID_A, &motg->inputs)) {
+ dev_dbg(phy->dev, "ID_A\n");
+ motg->chg_type = USB_ACA_A_CHARGER;
+ motg->chg_state = USB_CHG_STATE_DETECTED;
+ clear_bit(ID_B, &motg->inputs);
+ clear_bit(ID_C, &motg->inputs);
+ set_bit(ID, &motg->inputs);
+ ret = true;
+ }
+ break;
+ case 0x0C:
+ if (!test_and_set_bit(ID_B, &motg->inputs)) {
+ dev_dbg(phy->dev, "ID_B\n");
+ motg->chg_type = USB_ACA_B_CHARGER;
+ motg->chg_state = USB_CHG_STATE_DETECTED;
+ clear_bit(ID_A, &motg->inputs);
+ clear_bit(ID_C, &motg->inputs);
+ set_bit(ID, &motg->inputs);
+ ret = true;
+ }
+ break;
+ case 0x10:
+ if (!test_and_set_bit(ID_C, &motg->inputs)) {
+ dev_dbg(phy->dev, "ID_C\n");
+ motg->chg_type = USB_ACA_C_CHARGER;
+ motg->chg_state = USB_CHG_STATE_DETECTED;
+ clear_bit(ID_A, &motg->inputs);
+ clear_bit(ID_B, &motg->inputs);
+ set_bit(ID, &motg->inputs);
+ ret = true;
+ }
+ break;
+ case 0x04:
+ if (test_and_clear_bit(ID, &motg->inputs)) {
+ dev_dbg(phy->dev, "ID_GND\n");
+ motg->chg_type = USB_INVALID_CHARGER;
+ motg->chg_state = USB_CHG_STATE_UNDEFINED;
+ clear_bit(ID_A, &motg->inputs);
+ clear_bit(ID_B, &motg->inputs);
+ clear_bit(ID_C, &motg->inputs);
+ ret = true;
+ }
+ break;
+ default:
+ ret = test_and_clear_bit(ID_A, &motg->inputs) |
+ test_and_clear_bit(ID_B, &motg->inputs) |
+ test_and_clear_bit(ID_C, &motg->inputs) |
+ !test_and_set_bit(ID, &motg->inputs);
+ if (ret) {
+ dev_dbg(phy->dev, "ID A/B/C/GND is no more\n");
+ motg->chg_type = USB_INVALID_CHARGER;
+ motg->chg_state = USB_CHG_STATE_UNDEFINED;
+ }
+ }
+out:
+ return ret;
+}
+
+static void msm_chg_enable_aca_det(struct msm_otg *motg)
+{
+ struct usb_phy *phy = &motg->phy;
+
+ if (!aca_enabled())
+ return;
+
+ switch (motg->pdata->phy_type) {
+ case SNPS_28NM_INTEGRATED_PHY:
+ /* Disable ID_GND in link and PHY */
+ writel_relaxed(readl_relaxed(USB_OTGSC) & ~(OTGSC_IDPU |
+ OTGSC_IDIE), USB_OTGSC);
+ ulpi_write(phy, 0x01, 0x0C);
+ ulpi_write(phy, 0x10, 0x0F);
+ ulpi_write(phy, 0x10, 0x12);
+ /* Disable PMIC ID pull-up */
+ pm8xxx_usb_id_pullup(0);
+ /* Enable ACA ID detection */
+ ulpi_write(phy, 0x20, 0x85);
+ aca_id_turned_on = true;
+ break;
+ default:
+ break;
+ }
+}
+
+static void msm_chg_enable_aca_intr(struct msm_otg *motg)
+{
+ struct usb_phy *phy = &motg->phy;
+
+ if (!aca_enabled())
+ return;
+
+ switch (motg->pdata->phy_type) {
+ case SNPS_28NM_INTEGRATED_PHY:
+ /* Enable ACA Detection interrupt (on any RID change) */
+ ulpi_write(phy, 0x01, 0x94);
+ break;
+ default:
+ break;
+ }
+}
+
+static void msm_chg_disable_aca_intr(struct msm_otg *motg)
+{
+ struct usb_phy *phy = &motg->phy;
+
+ if (!aca_enabled())
+ return;
+
+ switch (motg->pdata->phy_type) {
+ case SNPS_28NM_INTEGRATED_PHY:
+ ulpi_write(phy, 0x01, 0x95);
+ break;
+ default:
+ break;
+ }
+}
+
+static bool msm_chg_check_aca_intr(struct msm_otg *motg)
+{
+ struct usb_phy *phy = &motg->phy;
+ bool ret = false;
+
+ if (!aca_enabled())
+ return ret;
+
+ switch (motg->pdata->phy_type) {
+ case SNPS_28NM_INTEGRATED_PHY:
+ if (ulpi_read(phy, 0x91) & 1) {
+ dev_dbg(phy->dev, "RID change\n");
+ ulpi_write(phy, 0x01, 0x92);
+ ret = msm_chg_aca_detect(motg);
+ }
+ default:
+ break;
+ }
+ return ret;
+}
+
+static void msm_otg_id_timer_func(unsigned long data)
+{
+ struct msm_otg *motg = (struct msm_otg *) data;
+
+ if (!aca_enabled())
+ return;
+
+ if (atomic_read(&motg->in_lpm)) {
+ dev_dbg(motg->phy.dev, "timer: in lpm\n");
+ return;
+ }
+
+ if (motg->phy.state == OTG_STATE_A_SUSPEND)
+ goto out;
+
+ if (msm_chg_check_aca_intr(motg)) {
+ dev_dbg(motg->phy.dev, "timer: aca work\n");
+ queue_work(system_nrt_wq, &motg->sm_work);
+ }
+
+out:
+ if (!test_bit(ID, &motg->inputs) || test_bit(ID_A, &motg->inputs))
+ mod_timer(&motg->id_timer, ID_TIMER_FREQ);
+}
+
static bool msm_chg_check_secondary_det(struct msm_otg *motg)
{
struct usb_phy *phy = &motg->phy;
@@ -846,6 +1606,9 @@
ulpi_write(phy, chg_det, 0x34);
break;
case SNPS_28NM_INTEGRATED_PHY:
+ /* Turn off VDP_SRC */
+ ulpi_write(phy, 0x3, 0x86);
+ msleep(20);
/*
* Configure DM as current source, DP as current sink
* and enable battery charging comparators.
@@ -990,7 +1753,7 @@
break;
case SNPS_28NM_INTEGRATED_PHY:
/* Clear charger detecting control bits */
- ulpi_write(phy, 0x3F, 0x86);
+ ulpi_write(phy, 0x1F, 0x86);
/* Clear alt interrupt latch and enable bits */
ulpi_write(phy, 0x1F, 0x92);
ulpi_write(phy, 0x1F, 0x95);
@@ -1031,32 +1794,62 @@
ulpi_write(phy, func_ctrl, ULPI_FUNC_CTRL);
}
+static const char *chg_to_string(enum usb_chg_type chg_type)
+{
+ switch (chg_type) {
+ case USB_SDP_CHARGER: return "USB_SDP_CHARGER";
+ case USB_DCP_CHARGER: return "USB_DCP_CHARGER";
+ case USB_CDP_CHARGER: return "USB_CDP_CHARGER";
+ case USB_ACA_A_CHARGER: return "USB_ACA_A_CHARGER";
+ case USB_ACA_B_CHARGER: return "USB_ACA_B_CHARGER";
+ case USB_ACA_C_CHARGER: return "USB_ACA_C_CHARGER";
+ case USB_ACA_DOCK_CHARGER: return "USB_ACA_DOCK_CHARGER";
+ default: return "INVALID_CHARGER";
+ }
+}
+
#define MSM_CHG_DCD_POLL_TIME (100 * HZ/1000) /* 100 msec */
#define MSM_CHG_DCD_MAX_RETRIES 6 /* Tdcd_tmout = 6 * 100 msec */
-#define MSM_CHG_PRIMARY_DET_TIME (40 * HZ/1000) /* TVDPSRC_ON */
-#define MSM_CHG_SECONDARY_DET_TIME (40 * HZ/1000) /* TVDMSRC_ON */
+#define MSM_CHG_PRIMARY_DET_TIME (50 * HZ/1000) /* TVDPSRC_ON */
+#define MSM_CHG_SECONDARY_DET_TIME (50 * HZ/1000) /* TVDMSRC_ON */
static void msm_chg_detect_work(struct work_struct *w)
{
struct msm_otg *motg = container_of(w, struct msm_otg, chg_work.work);
struct usb_phy *phy = &motg->phy;
- bool is_dcd, tmout, vout;
+ bool is_dcd = false, tmout, vout, is_aca;
unsigned long delay;
dev_dbg(phy->dev, "chg detection work\n");
switch (motg->chg_state) {
case USB_CHG_STATE_UNDEFINED:
- pm_runtime_get_sync(phy->dev);
msm_chg_block_on(motg);
- msm_chg_enable_dcd(motg);
+ if (motg->pdata->enable_dcd)
+ msm_chg_enable_dcd(motg);
+ msm_chg_enable_aca_det(motg);
motg->chg_state = USB_CHG_STATE_WAIT_FOR_DCD;
motg->dcd_retries = 0;
delay = MSM_CHG_DCD_POLL_TIME;
break;
case USB_CHG_STATE_WAIT_FOR_DCD:
- is_dcd = msm_chg_check_dcd(motg);
+ is_aca = msm_chg_aca_detect(motg);
+ if (is_aca) {
+ /*
+ * ID_A can be ACA dock too. continue
+ * primary detection after DCD.
+ */
+ if (test_bit(ID_A, &motg->inputs)) {
+ motg->chg_state = USB_CHG_STATE_WAIT_FOR_DCD;
+ } else {
+ delay = 0;
+ break;
+ }
+ }
+ if (motg->pdata->enable_dcd)
+ is_dcd = msm_chg_check_dcd(motg);
tmout = ++motg->dcd_retries == MSM_CHG_DCD_MAX_RETRIES;
if (is_dcd || tmout) {
- msm_chg_disable_dcd(motg);
+ if (motg->pdata->enable_dcd)
+ msm_chg_disable_dcd(motg);
msm_chg_enable_primary_det(motg);
delay = MSM_CHG_PRIMARY_DET_TIME;
motg->chg_state = USB_CHG_STATE_DCD_DONE;
@@ -1067,10 +1860,22 @@
case USB_CHG_STATE_DCD_DONE:
vout = msm_chg_check_primary_det(motg);
if (vout) {
+ if (test_bit(ID_A, &motg->inputs)) {
+ motg->chg_type = USB_ACA_DOCK_CHARGER;
+ motg->chg_state = USB_CHG_STATE_DETECTED;
+ delay = 0;
+ break;
+ }
msm_chg_enable_secondary_det(motg);
delay = MSM_CHG_SECONDARY_DET_TIME;
motg->chg_state = USB_CHG_STATE_PRIMARY_DONE;
} else {
+ if (test_bit(ID_A, &motg->inputs)) {
+ motg->chg_type = USB_ACA_A_CHARGER;
+ motg->chg_state = USB_CHG_STATE_DETECTED;
+ delay = 0;
+ break;
+ }
motg->chg_type = USB_SDP_CHARGER;
motg->chg_state = USB_CHG_STATE_DETECTED;
delay = 0;
@@ -1088,14 +1893,23 @@
motg->chg_state = USB_CHG_STATE_DETECTED;
case USB_CHG_STATE_DETECTED:
msm_chg_block_off(motg);
- dev_dbg(phy->dev, "charger = %d\n", motg->chg_type);
- schedule_work(&motg->sm_work);
+ msm_chg_enable_aca_det(motg);
+ /*
+ * Spurious interrupt is seen after enabling ACA detection
+ * due to which charger detection fails in case of PET.
+ * Add delay of 100 microsec to avoid that.
+ */
+ udelay(100);
+ msm_chg_enable_aca_intr(motg);
+ dev_dbg(phy->dev, "chg_type = %s\n",
+ chg_to_string(motg->chg_type));
+ queue_work(system_nrt_wq, &motg->sm_work);
return;
default:
return;
}
- schedule_delayed_work(&motg->chg_work, delay);
+ queue_delayed_work(system_nrt_wq, &motg->chg_work, delay);
}
/*
@@ -1112,17 +1926,7 @@
switch (pdata->mode) {
case USB_OTG:
- if (pdata->otg_control == OTG_PHY_CONTROL) {
- if (otgsc & OTGSC_ID)
- set_bit(ID, &motg->inputs);
- else
- clear_bit(ID, &motg->inputs);
-
- if (otgsc & OTGSC_BSV)
- set_bit(B_SESS_VLD, &motg->inputs);
- else
- clear_bit(B_SESS_VLD, &motg->inputs);
- } else if (pdata->otg_control == OTG_USER_CONTROL) {
+ if (pdata->otg_control == OTG_USER_CONTROL) {
if (pdata->default_mode == USB_HOST) {
clear_bit(ID, &motg->inputs);
} else if (pdata->default_mode == USB_PERIPHERAL) {
@@ -1132,6 +1936,32 @@
set_bit(ID, &motg->inputs);
clear_bit(B_SESS_VLD, &motg->inputs);
}
+ } else if (pdata->otg_control == OTG_PHY_CONTROL) {
+ if (otgsc & OTGSC_ID) {
+ set_bit(ID, &motg->inputs);
+ } else {
+ clear_bit(ID, &motg->inputs);
+ set_bit(A_BUS_REQ, &motg->inputs);
+ }
+ if (otgsc & OTGSC_BSV)
+ set_bit(B_SESS_VLD, &motg->inputs);
+ else
+ clear_bit(B_SESS_VLD, &motg->inputs);
+ } else if (pdata->otg_control == OTG_PMIC_CONTROL) {
+ if (pdata->pmic_id_irq) {
+ unsigned long flags;
+ local_irq_save(flags);
+ if (irq_read_line(pdata->pmic_id_irq))
+ set_bit(ID, &motg->inputs);
+ else
+ clear_bit(ID, &motg->inputs);
+ local_irq_restore(flags);
+ }
+ /*
+ * VBUS initial state is reported after PMIC
+ * driver initialization. Wait for it.
+ */
+ wait_for_completion(&pmic_vbus_init);
}
break;
case USB_HOST:
@@ -1139,10 +1969,18 @@
break;
case USB_PERIPHERAL:
set_bit(ID, &motg->inputs);
- if (otgsc & OTGSC_BSV)
- set_bit(B_SESS_VLD, &motg->inputs);
- else
- clear_bit(B_SESS_VLD, &motg->inputs);
+ if (pdata->otg_control == OTG_PHY_CONTROL) {
+ if (otgsc & OTGSC_BSV)
+ set_bit(B_SESS_VLD, &motg->inputs);
+ else
+ clear_bit(B_SESS_VLD, &motg->inputs);
+ } else if (pdata->otg_control == OTG_PMIC_CONTROL) {
+ /*
+ * VBUS initial state is reported after PMIC
+ * driver initialization. Wait for it.
+ */
+ wait_for_completion(&pmic_vbus_init);
+ }
break;
default:
break;
@@ -1153,22 +1991,35 @@
{
struct msm_otg *motg = container_of(w, struct msm_otg, sm_work);
struct usb_otg *otg = motg->phy.otg;
+ bool work = 0, srp_reqd;
+ pm_runtime_resume(otg->phy->dev);
+ pr_debug("%s work\n", otg_state_string(otg->phy->state));
switch (otg->phy->state) {
case OTG_STATE_UNDEFINED:
- dev_dbg(otg->phy->dev, "OTG_STATE_UNDEFINED state\n");
msm_otg_reset(otg->phy);
msm_otg_init_sm(motg);
+ psy = power_supply_get_by_name("usb");
+ if (!psy)
+ pr_err("couldn't get usb power supply\n");
otg->phy->state = OTG_STATE_B_IDLE;
+ if (!test_bit(B_SESS_VLD, &motg->inputs) &&
+ test_bit(ID, &motg->inputs)) {
+ pm_runtime_put_noidle(otg->phy->dev);
+ pm_runtime_suspend(otg->phy->dev);
+ break;
+ }
/* FALL THROUGH */
case OTG_STATE_B_IDLE:
- dev_dbg(otg->phy->dev, "OTG_STATE_B_IDLE state\n");
- if (!test_bit(ID, &motg->inputs) && otg->host) {
- /* disable BSV bit */
- writel(readl(USB_OTGSC) & ~OTGSC_BSVIE, USB_OTGSC);
- msm_otg_start_host(otg->phy, 1);
- otg->phy->state = OTG_STATE_A_HOST;
+ if ((!test_bit(ID, &motg->inputs) ||
+ test_bit(ID_A, &motg->inputs)) && otg->host) {
+ pr_debug("!id || id_A\n");
+ clear_bit(B_BUS_REQ, &motg->inputs);
+ set_bit(A_BUS_REQ, &motg->inputs);
+ otg->phy->state = OTG_STATE_A_IDLE;
+ work = 1;
} else if (test_bit(B_SESS_VLD, &motg->inputs)) {
+ pr_debug("b_sess_vld\n");
switch (motg->chg_state) {
case USB_CHG_STATE_UNDEFINED:
msm_chg_detect_work(&motg->chg_work.work);
@@ -1176,21 +2027,39 @@
case USB_CHG_STATE_DETECTED:
switch (motg->chg_type) {
case USB_DCP_CHARGER:
+ /* Enable VDP_SRC */
+ ulpi_write(otg->phy, 0x2, 0x85);
msm_otg_notify_charger(motg,
IDEV_CHG_MAX);
+ pm_runtime_put_noidle(otg->phy->dev);
+ pm_runtime_suspend(otg->phy->dev);
+ break;
+ case USB_ACA_B_CHARGER:
+ msm_otg_notify_charger(motg,
+ IDEV_ACA_CHG_MAX);
+ /*
+ * (ID_B --> ID_C) PHY_ALT interrupt can
+ * not be detected in LPM.
+ */
break;
case USB_CDP_CHARGER:
msm_otg_notify_charger(motg,
IDEV_CHG_MAX);
- msm_otg_start_peripheral(otg->phy, 1);
- otg->phy->state
- = OTG_STATE_B_PERIPHERAL;
+ msm_otg_start_peripheral(otg, 1);
+ otg->phy->state =
+ OTG_STATE_B_PERIPHERAL;
+ break;
+ case USB_ACA_C_CHARGER:
+ msm_otg_notify_charger(motg,
+ IDEV_ACA_CHG_MAX);
+ msm_otg_start_peripheral(otg, 1);
+ otg->phy->state =
+ OTG_STATE_B_PERIPHERAL;
break;
case USB_SDP_CHARGER:
- msm_otg_notify_charger(motg, IUNIT);
- msm_otg_start_peripheral(otg->phy, 1);
- otg->phy->state
- = OTG_STATE_B_PERIPHERAL;
+ msm_otg_start_peripheral(otg, 1);
+ otg->phy->state =
+ OTG_STATE_B_PERIPHERAL;
break;
default:
break;
@@ -1199,93 +2068,692 @@
default:
break;
}
- } else {
- /*
- * If charger detection work is pending, decrement
- * the pm usage counter to balance with the one that
- * is incremented in charger detection work.
- */
- if (cancel_delayed_work_sync(&motg->chg_work)) {
- pm_runtime_put_sync(otg->phy->dev);
- msm_otg_reset(otg->phy);
+ } else if (test_bit(B_BUS_REQ, &motg->inputs)) {
+ pr_debug("b_sess_end && b_bus_req\n");
+ if (msm_otg_start_srp(otg) < 0) {
+ clear_bit(B_BUS_REQ, &motg->inputs);
+ work = 1;
+ break;
}
- msm_otg_notify_charger(motg, 0);
+ otg->phy->state = OTG_STATE_B_SRP_INIT;
+ msm_otg_start_timer(motg, TB_SRP_FAIL, B_SRP_FAIL);
+ break;
+ } else {
+ pr_debug("chg_work cancel");
+ cancel_delayed_work_sync(&motg->chg_work);
motg->chg_state = USB_CHG_STATE_UNDEFINED;
motg->chg_type = USB_INVALID_CHARGER;
+ msm_otg_notify_charger(motg, 0);
+ msm_otg_reset(otg->phy);
+ pm_runtime_put_noidle(otg->phy->dev);
+ pm_runtime_suspend(otg->phy->dev);
}
- pm_runtime_put_sync(otg->phy->dev);
+ break;
+ case OTG_STATE_B_SRP_INIT:
+ if (!test_bit(ID, &motg->inputs) ||
+ test_bit(ID_A, &motg->inputs) ||
+ test_bit(ID_C, &motg->inputs) ||
+ (test_bit(B_SESS_VLD, &motg->inputs) &&
+ !test_bit(ID_B, &motg->inputs))) {
+ pr_debug("!id || id_a/c || b_sess_vld+!id_b\n");
+ msm_otg_del_timer(motg);
+ otg->phy->state = OTG_STATE_B_IDLE;
+ /*
+ * clear VBUSVLDEXTSEL and VBUSVLDEXT register
+ * bits after SRP initiation.
+ */
+ ulpi_write(otg->phy, 0x0, 0x98);
+ work = 1;
+ } else if (test_bit(B_SRP_FAIL, &motg->tmouts)) {
+ pr_debug("b_srp_fail\n");
+ pr_info("A-device did not respond to SRP\n");
+ clear_bit(B_BUS_REQ, &motg->inputs);
+ clear_bit(B_SRP_FAIL, &motg->tmouts);
+ otg_send_event(OTG_EVENT_NO_RESP_FOR_SRP);
+ ulpi_write(otg->phy, 0x0, 0x98);
+ otg->phy->state = OTG_STATE_B_IDLE;
+ motg->b_last_se0_sess = jiffies;
+ work = 1;
+ }
break;
case OTG_STATE_B_PERIPHERAL:
- dev_dbg(otg->phy->dev, "OTG_STATE_B_PERIPHERAL state\n");
- if (!test_bit(B_SESS_VLD, &motg->inputs) ||
- !test_bit(ID, &motg->inputs)) {
- msm_otg_notify_charger(motg, 0);
- msm_otg_start_peripheral(otg->phy, 0);
+ if (!test_bit(ID, &motg->inputs) ||
+ test_bit(ID_A, &motg->inputs) ||
+ test_bit(ID_B, &motg->inputs) ||
+ !test_bit(B_SESS_VLD, &motg->inputs)) {
+ pr_debug("!id || id_a/b || !b_sess_vld\n");
motg->chg_state = USB_CHG_STATE_UNDEFINED;
motg->chg_type = USB_INVALID_CHARGER;
+ msm_otg_notify_charger(motg, 0);
+ srp_reqd = otg->gadget->otg_srp_reqd;
+ msm_otg_start_peripheral(otg, 0);
+ if (test_bit(ID_B, &motg->inputs))
+ clear_bit(ID_B, &motg->inputs);
+ clear_bit(B_BUS_REQ, &motg->inputs);
+ otg->phy->state = OTG_STATE_B_IDLE;
+ motg->b_last_se0_sess = jiffies;
+ if (srp_reqd)
+ msm_otg_start_timer(motg,
+ TB_TST_SRP, B_TST_SRP);
+ else
+ work = 1;
+ } else if (test_bit(B_BUS_REQ, &motg->inputs) &&
+ otg->gadget->b_hnp_enable &&
+ test_bit(A_BUS_SUSPEND, &motg->inputs)) {
+ pr_debug("b_bus_req && b_hnp_en && a_bus_suspend\n");
+ msm_otg_start_timer(motg, TB_ASE0_BRST, B_ASE0_BRST);
+ /* D+ pullup should not be disconnected within 4msec
+ * after A device suspends the bus. Otherwise PET will
+ * fail the compliance test.
+ */
+ udelay(1000);
+ msm_otg_start_peripheral(otg, 0);
+ otg->phy->state = OTG_STATE_B_WAIT_ACON;
+ /*
+ * start HCD even before A-device enable
+ * pull-up to meet HNP timings.
+ */
+ otg->host->is_b_host = 1;
+ msm_otg_start_host(otg, 1);
+ } else if (test_bit(A_BUS_SUSPEND, &motg->inputs) &&
+ test_bit(B_SESS_VLD, &motg->inputs)) {
+ pr_debug("a_bus_suspend && b_sess_vld\n");
+ if (motg->caps & ALLOW_LPM_ON_DEV_SUSPEND) {
+ pm_runtime_put_noidle(otg->phy->dev);
+ pm_runtime_suspend(otg->phy->dev);
+ }
+ } else if (test_bit(ID_C, &motg->inputs)) {
+ msm_otg_notify_charger(motg, IDEV_ACA_CHG_MAX);
+ }
+ break;
+ case OTG_STATE_B_WAIT_ACON:
+ if (!test_bit(ID, &motg->inputs) ||
+ test_bit(ID_A, &motg->inputs) ||
+ test_bit(ID_B, &motg->inputs) ||
+ !test_bit(B_SESS_VLD, &motg->inputs)) {
+ pr_debug("!id || id_a/b || !b_sess_vld\n");
+ msm_otg_del_timer(motg);
+ /*
+ * A-device is physically disconnected during
+ * HNP. Remove HCD.
+ */
+ msm_otg_start_host(otg, 0);
+ otg->host->is_b_host = 0;
+
+ clear_bit(B_BUS_REQ, &motg->inputs);
+ clear_bit(A_BUS_SUSPEND, &motg->inputs);
+ motg->b_last_se0_sess = jiffies;
otg->phy->state = OTG_STATE_B_IDLE;
msm_otg_reset(otg->phy);
- schedule_work(w);
+ work = 1;
+ } else if (test_bit(A_CONN, &motg->inputs)) {
+ pr_debug("a_conn\n");
+ clear_bit(A_BUS_SUSPEND, &motg->inputs);
+ otg->phy->state = OTG_STATE_B_HOST;
+ /*
+ * PET disconnects D+ pullup after reset is generated
+ * by B device in B_HOST role which is not detected by
+ * B device. As workaorund , start timer of 300msec
+ * and stop timer if A device is enumerated else clear
+ * A_CONN.
+ */
+ msm_otg_start_timer(motg, TB_TST_CONFIG,
+ B_TST_CONFIG);
+ } else if (test_bit(B_ASE0_BRST, &motg->tmouts)) {
+ pr_debug("b_ase0_brst_tmout\n");
+ pr_info("B HNP fail:No response from A device\n");
+ msm_otg_start_host(otg, 0);
+ msm_otg_reset(otg->phy);
+ otg->host->is_b_host = 0;
+ clear_bit(B_ASE0_BRST, &motg->tmouts);
+ clear_bit(A_BUS_SUSPEND, &motg->inputs);
+ clear_bit(B_BUS_REQ, &motg->inputs);
+ otg_send_event(OTG_EVENT_HNP_FAILED);
+ otg->phy->state = OTG_STATE_B_IDLE;
+ work = 1;
+ } else if (test_bit(ID_C, &motg->inputs)) {
+ msm_otg_notify_charger(motg, IDEV_ACA_CHG_MAX);
+ }
+ break;
+ case OTG_STATE_B_HOST:
+ if (!test_bit(B_BUS_REQ, &motg->inputs) ||
+ !test_bit(A_CONN, &motg->inputs) ||
+ !test_bit(B_SESS_VLD, &motg->inputs)) {
+ pr_debug("!b_bus_req || !a_conn || !b_sess_vld\n");
+ clear_bit(A_CONN, &motg->inputs);
+ clear_bit(B_BUS_REQ, &motg->inputs);
+ msm_otg_start_host(otg, 0);
+ otg->host->is_b_host = 0;
+ otg->phy->state = OTG_STATE_B_IDLE;
+ msm_otg_reset(otg->phy);
+ work = 1;
+ } else if (test_bit(ID_C, &motg->inputs)) {
+ msm_otg_notify_charger(motg, IDEV_ACA_CHG_MAX);
+ }
+ break;
+ case OTG_STATE_A_IDLE:
+ otg->default_a = 1;
+ if (test_bit(ID, &motg->inputs) &&
+ !test_bit(ID_A, &motg->inputs)) {
+ pr_debug("id && !id_a\n");
+ otg->default_a = 0;
+ clear_bit(A_BUS_DROP, &motg->inputs);
+ otg->phy->state = OTG_STATE_B_IDLE;
+ del_timer_sync(&motg->id_timer);
+ msm_otg_link_reset(motg);
+ msm_chg_enable_aca_intr(motg);
+ msm_otg_notify_charger(motg, 0);
+ work = 1;
+ } else if (!test_bit(A_BUS_DROP, &motg->inputs) &&
+ (test_bit(A_SRP_DET, &motg->inputs) ||
+ test_bit(A_BUS_REQ, &motg->inputs))) {
+ pr_debug("!a_bus_drop && (a_srp_det || a_bus_req)\n");
+
+ clear_bit(A_SRP_DET, &motg->inputs);
+ /* Disable SRP detection */
+ writel_relaxed((readl_relaxed(USB_OTGSC) &
+ ~OTGSC_INTSTS_MASK) &
+ ~OTGSC_DPIE, USB_OTGSC);
+
+ otg->phy->state = OTG_STATE_A_WAIT_VRISE;
+ /* VBUS should not be supplied before end of SRP pulse
+ * generated by PET, if not complaince test fail.
+ */
+ usleep_range(10000, 12000);
+ /* ACA: ID_A: Stop charging untill enumeration */
+ if (test_bit(ID_A, &motg->inputs))
+ msm_otg_notify_charger(motg, 0);
+ else
+ msm_hsusb_vbus_power(motg, 1);
+ msm_otg_start_timer(motg, TA_WAIT_VRISE, A_WAIT_VRISE);
+ } else {
+ pr_debug("No session requested\n");
+ clear_bit(A_BUS_DROP, &motg->inputs);
+ if (test_bit(ID_A, &motg->inputs)) {
+ msm_otg_notify_charger(motg,
+ IDEV_ACA_CHG_MAX);
+ } else if (!test_bit(ID, &motg->inputs)) {
+ msm_otg_notify_charger(motg, 0);
+ /*
+ * A-device is not providing power on VBUS.
+ * Enable SRP detection.
+ */
+ writel_relaxed(0x13, USB_USBMODE);
+ writel_relaxed((readl_relaxed(USB_OTGSC) &
+ ~OTGSC_INTSTS_MASK) |
+ OTGSC_DPIE, USB_OTGSC);
+ mb();
+ }
+ }
+ break;
+ case OTG_STATE_A_WAIT_VRISE:
+ if ((test_bit(ID, &motg->inputs) &&
+ !test_bit(ID_A, &motg->inputs)) ||
+ test_bit(A_BUS_DROP, &motg->inputs) ||
+ test_bit(A_WAIT_VRISE, &motg->tmouts)) {
+ pr_debug("id || a_bus_drop || a_wait_vrise_tmout\n");
+ clear_bit(A_BUS_REQ, &motg->inputs);
+ msm_otg_del_timer(motg);
+ msm_hsusb_vbus_power(motg, 0);
+ otg->phy->state = OTG_STATE_A_WAIT_VFALL;
+ msm_otg_start_timer(motg, TA_WAIT_VFALL, A_WAIT_VFALL);
+ } else if (test_bit(A_VBUS_VLD, &motg->inputs)) {
+ pr_debug("a_vbus_vld\n");
+ otg->phy->state = OTG_STATE_A_WAIT_BCON;
+ if (TA_WAIT_BCON > 0)
+ msm_otg_start_timer(motg, TA_WAIT_BCON,
+ A_WAIT_BCON);
+ msm_otg_start_host(otg, 1);
+ msm_chg_enable_aca_det(motg);
+ msm_chg_disable_aca_intr(motg);
+ mod_timer(&motg->id_timer, ID_TIMER_FREQ);
+ if (msm_chg_check_aca_intr(motg))
+ work = 1;
+ }
+ break;
+ case OTG_STATE_A_WAIT_BCON:
+ if ((test_bit(ID, &motg->inputs) &&
+ !test_bit(ID_A, &motg->inputs)) ||
+ test_bit(A_BUS_DROP, &motg->inputs) ||
+ test_bit(A_WAIT_BCON, &motg->tmouts)) {
+ pr_debug("(id && id_a/b/c) || a_bus_drop ||"
+ "a_wait_bcon_tmout\n");
+ if (test_bit(A_WAIT_BCON, &motg->tmouts)) {
+ pr_info("Device No Response\n");
+ otg_send_event(OTG_EVENT_DEV_CONN_TMOUT);
+ }
+ msm_otg_del_timer(motg);
+ clear_bit(A_BUS_REQ, &motg->inputs);
+ clear_bit(B_CONN, &motg->inputs);
+ msm_otg_start_host(otg, 0);
+ /*
+ * ACA: ID_A with NO accessory, just the A plug is
+ * attached to ACA: Use IDCHG_MAX for charging
+ */
+ if (test_bit(ID_A, &motg->inputs))
+ msm_otg_notify_charger(motg, IDEV_CHG_MIN);
+ else
+ msm_hsusb_vbus_power(motg, 0);
+ otg->phy->state = OTG_STATE_A_WAIT_VFALL;
+ msm_otg_start_timer(motg, TA_WAIT_VFALL, A_WAIT_VFALL);
+ } else if (!test_bit(A_VBUS_VLD, &motg->inputs)) {
+ pr_debug("!a_vbus_vld\n");
+ clear_bit(B_CONN, &motg->inputs);
+ msm_otg_del_timer(motg);
+ msm_otg_start_host(otg, 0);
+ otg->phy->state = OTG_STATE_A_VBUS_ERR;
+ msm_otg_reset(otg->phy);
+ } else if (test_bit(ID_A, &motg->inputs)) {
+ msm_hsusb_vbus_power(motg, 0);
+ } else if (!test_bit(A_BUS_REQ, &motg->inputs)) {
+ /*
+ * If TA_WAIT_BCON is infinite, we don;t
+ * turn off VBUS. Enter low power mode.
+ */
+ if (TA_WAIT_BCON < 0)
+ pm_runtime_put_sync(otg->phy->dev);
+ } else if (!test_bit(ID, &motg->inputs)) {
+ msm_hsusb_vbus_power(motg, 1);
}
break;
case OTG_STATE_A_HOST:
- dev_dbg(otg->phy->dev, "OTG_STATE_A_HOST state\n");
- if (test_bit(ID, &motg->inputs)) {
- msm_otg_start_host(otg->phy, 0);
- otg->phy->state = OTG_STATE_B_IDLE;
+ if ((test_bit(ID, &motg->inputs) &&
+ !test_bit(ID_A, &motg->inputs)) ||
+ test_bit(A_BUS_DROP, &motg->inputs)) {
+ pr_debug("id_a/b/c || a_bus_drop\n");
+ clear_bit(B_CONN, &motg->inputs);
+ clear_bit(A_BUS_REQ, &motg->inputs);
+ msm_otg_del_timer(motg);
+ otg->phy->state = OTG_STATE_A_WAIT_VFALL;
+ msm_otg_start_host(otg, 0);
+ if (!test_bit(ID_A, &motg->inputs))
+ msm_hsusb_vbus_power(motg, 0);
+ msm_otg_start_timer(motg, TA_WAIT_VFALL, A_WAIT_VFALL);
+ } else if (!test_bit(A_VBUS_VLD, &motg->inputs)) {
+ pr_debug("!a_vbus_vld\n");
+ clear_bit(B_CONN, &motg->inputs);
+ msm_otg_del_timer(motg);
+ otg->phy->state = OTG_STATE_A_VBUS_ERR;
+ msm_otg_start_host(otg, 0);
msm_otg_reset(otg->phy);
- schedule_work(w);
+ } else if (!test_bit(A_BUS_REQ, &motg->inputs)) {
+ /*
+ * a_bus_req is de-asserted when root hub is
+ * suspended or HNP is in progress.
+ */
+ pr_debug("!a_bus_req\n");
+ msm_otg_del_timer(motg);
+ otg->phy->state = OTG_STATE_A_SUSPEND;
+ if (otg->host->b_hnp_enable)
+ msm_otg_start_timer(motg, TA_AIDL_BDIS,
+ A_AIDL_BDIS);
+ else
+ pm_runtime_put_sync(otg->phy->dev);
+ } else if (!test_bit(B_CONN, &motg->inputs)) {
+ pr_debug("!b_conn\n");
+ msm_otg_del_timer(motg);
+ otg->phy->state = OTG_STATE_A_WAIT_BCON;
+ if (TA_WAIT_BCON > 0)
+ msm_otg_start_timer(motg, TA_WAIT_BCON,
+ A_WAIT_BCON);
+ if (msm_chg_check_aca_intr(motg))
+ work = 1;
+ } else if (test_bit(ID_A, &motg->inputs)) {
+ msm_otg_del_timer(motg);
+ msm_hsusb_vbus_power(motg, 0);
+ if (motg->chg_type == USB_ACA_DOCK_CHARGER)
+ msm_otg_notify_charger(motg,
+ IDEV_ACA_CHG_MAX);
+ else
+ msm_otg_notify_charger(motg,
+ IDEV_CHG_MIN - motg->mA_port);
+ } else if (!test_bit(ID, &motg->inputs)) {
+ motg->chg_state = USB_CHG_STATE_UNDEFINED;
+ motg->chg_type = USB_INVALID_CHARGER;
+ msm_otg_notify_charger(motg, 0);
+ msm_hsusb_vbus_power(motg, 1);
+ }
+ break;
+ case OTG_STATE_A_SUSPEND:
+ if ((test_bit(ID, &motg->inputs) &&
+ !test_bit(ID_A, &motg->inputs)) ||
+ test_bit(A_BUS_DROP, &motg->inputs) ||
+ test_bit(A_AIDL_BDIS, &motg->tmouts)) {
+ pr_debug("id_a/b/c || a_bus_drop ||"
+ "a_aidl_bdis_tmout\n");
+ msm_otg_del_timer(motg);
+ clear_bit(B_CONN, &motg->inputs);
+ otg->phy->state = OTG_STATE_A_WAIT_VFALL;
+ msm_otg_start_host(otg, 0);
+ msm_otg_reset(otg->phy);
+ if (!test_bit(ID_A, &motg->inputs))
+ msm_hsusb_vbus_power(motg, 0);
+ msm_otg_start_timer(motg, TA_WAIT_VFALL, A_WAIT_VFALL);
+ } else if (!test_bit(A_VBUS_VLD, &motg->inputs)) {
+ pr_debug("!a_vbus_vld\n");
+ msm_otg_del_timer(motg);
+ clear_bit(B_CONN, &motg->inputs);
+ otg->phy->state = OTG_STATE_A_VBUS_ERR;
+ msm_otg_start_host(otg, 0);
+ msm_otg_reset(otg->phy);
+ } else if (!test_bit(B_CONN, &motg->inputs) &&
+ otg->host->b_hnp_enable) {
+ pr_debug("!b_conn && b_hnp_enable");
+ otg->phy->state = OTG_STATE_A_PERIPHERAL;
+ msm_otg_host_hnp_enable(otg, 1);
+ otg->gadget->is_a_peripheral = 1;
+ msm_otg_start_peripheral(otg, 1);
+ } else if (!test_bit(B_CONN, &motg->inputs) &&
+ !otg->host->b_hnp_enable) {
+ pr_debug("!b_conn && !b_hnp_enable");
+ /*
+ * bus request is dropped during suspend.
+ * acquire again for next device.
+ */
+ set_bit(A_BUS_REQ, &motg->inputs);
+ otg->phy->state = OTG_STATE_A_WAIT_BCON;
+ if (TA_WAIT_BCON > 0)
+ msm_otg_start_timer(motg, TA_WAIT_BCON,
+ A_WAIT_BCON);
+ } else if (test_bit(ID_A, &motg->inputs)) {
+ msm_hsusb_vbus_power(motg, 0);
+ msm_otg_notify_charger(motg,
+ IDEV_CHG_MIN - motg->mA_port);
+ } else if (!test_bit(ID, &motg->inputs)) {
+ msm_otg_notify_charger(motg, 0);
+ msm_hsusb_vbus_power(motg, 1);
+ }
+ break;
+ case OTG_STATE_A_PERIPHERAL:
+ if ((test_bit(ID, &motg->inputs) &&
+ !test_bit(ID_A, &motg->inputs)) ||
+ test_bit(A_BUS_DROP, &motg->inputs)) {
+ pr_debug("id _f/b/c || a_bus_drop\n");
+ /* Clear BIDL_ADIS timer */
+ msm_otg_del_timer(motg);
+ otg->phy->state = OTG_STATE_A_WAIT_VFALL;
+ msm_otg_start_peripheral(otg, 0);
+ otg->gadget->is_a_peripheral = 0;
+ msm_otg_start_host(otg, 0);
+ msm_otg_reset(otg->phy);
+ if (!test_bit(ID_A, &motg->inputs))
+ msm_hsusb_vbus_power(motg, 0);
+ msm_otg_start_timer(motg, TA_WAIT_VFALL, A_WAIT_VFALL);
+ } else if (!test_bit(A_VBUS_VLD, &motg->inputs)) {
+ pr_debug("!a_vbus_vld\n");
+ /* Clear BIDL_ADIS timer */
+ msm_otg_del_timer(motg);
+ otg->phy->state = OTG_STATE_A_VBUS_ERR;
+ msm_otg_start_peripheral(otg, 0);
+ otg->gadget->is_a_peripheral = 0;
+ msm_otg_start_host(otg, 0);
+ } else if (test_bit(A_BIDL_ADIS, &motg->tmouts)) {
+ pr_debug("a_bidl_adis_tmout\n");
+ msm_otg_start_peripheral(otg, 0);
+ otg->gadget->is_a_peripheral = 0;
+ otg->phy->state = OTG_STATE_A_WAIT_BCON;
+ set_bit(A_BUS_REQ, &motg->inputs);
+ msm_otg_host_hnp_enable(otg, 0);
+ if (TA_WAIT_BCON > 0)
+ msm_otg_start_timer(motg, TA_WAIT_BCON,
+ A_WAIT_BCON);
+ } else if (test_bit(ID_A, &motg->inputs)) {
+ msm_hsusb_vbus_power(motg, 0);
+ msm_otg_notify_charger(motg,
+ IDEV_CHG_MIN - motg->mA_port);
+ } else if (!test_bit(ID, &motg->inputs)) {
+ msm_otg_notify_charger(motg, 0);
+ msm_hsusb_vbus_power(motg, 1);
+ }
+ break;
+ case OTG_STATE_A_WAIT_VFALL:
+ if (test_bit(A_WAIT_VFALL, &motg->tmouts)) {
+ clear_bit(A_VBUS_VLD, &motg->inputs);
+ otg->phy->state = OTG_STATE_A_IDLE;
+ work = 1;
+ }
+ break;
+ case OTG_STATE_A_VBUS_ERR:
+ if ((test_bit(ID, &motg->inputs) &&
+ !test_bit(ID_A, &motg->inputs)) ||
+ test_bit(A_BUS_DROP, &motg->inputs) ||
+ test_bit(A_CLR_ERR, &motg->inputs)) {
+ otg->phy->state = OTG_STATE_A_WAIT_VFALL;
+ if (!test_bit(ID_A, &motg->inputs))
+ msm_hsusb_vbus_power(motg, 0);
+ msm_otg_start_timer(motg, TA_WAIT_VFALL, A_WAIT_VFALL);
+ motg->chg_state = USB_CHG_STATE_UNDEFINED;
+ motg->chg_type = USB_INVALID_CHARGER;
+ msm_otg_notify_charger(motg, 0);
}
break;
default:
break;
}
+ if (work)
+ queue_work(system_nrt_wq, &motg->sm_work);
}
static irqreturn_t msm_otg_irq(int irq, void *data)
{
struct msm_otg *motg = data;
- struct usb_phy *phy = &motg->phy;
- u32 otgsc = 0;
+ struct usb_otg *otg = motg->phy.otg;
+ u32 otgsc = 0, usbsts, pc;
+ bool work = 0;
+ irqreturn_t ret = IRQ_HANDLED;
if (atomic_read(&motg->in_lpm)) {
+ pr_debug("OTG IRQ: in LPM\n");
disable_irq_nosync(irq);
motg->async_int = 1;
- pm_runtime_get(phy->dev);
+ if (atomic_read(&motg->pm_suspended))
+ motg->sm_work_pending = true;
+ else
+ pm_request_resume(otg->phy->dev);
return IRQ_HANDLED;
}
+ usbsts = readl(USB_USBSTS);
otgsc = readl(USB_OTGSC);
- if (!(otgsc & (OTGSC_IDIS | OTGSC_BSVIS)))
+
+ if (!(otgsc & OTG_OTGSTS_MASK) && !(usbsts & OTG_USBSTS_MASK))
return IRQ_NONE;
if ((otgsc & OTGSC_IDIS) && (otgsc & OTGSC_IDIE)) {
- if (otgsc & OTGSC_ID)
+ if (otgsc & OTGSC_ID) {
+ pr_debug("Id set\n");
set_bit(ID, &motg->inputs);
- else
+ } else {
+ pr_debug("Id clear\n");
+ /*
+ * Assert a_bus_req to supply power on
+ * VBUS when Micro/Mini-A cable is connected
+ * with out user intervention.
+ */
+ set_bit(A_BUS_REQ, &motg->inputs);
clear_bit(ID, &motg->inputs);
- dev_dbg(phy->dev, "ID set/clear\n");
- pm_runtime_get_noresume(phy->dev);
- } else if ((otgsc & OTGSC_BSVIS) && (otgsc & OTGSC_BSVIE)) {
- if (otgsc & OTGSC_BSV)
+ msm_chg_enable_aca_det(motg);
+ }
+ writel_relaxed(otgsc, USB_OTGSC);
+ work = 1;
+ } else if (otgsc & OTGSC_DPIS) {
+ pr_debug("DPIS detected\n");
+ writel_relaxed(otgsc, USB_OTGSC);
+ set_bit(A_SRP_DET, &motg->inputs);
+ set_bit(A_BUS_REQ, &motg->inputs);
+ work = 1;
+ } else if (otgsc & OTGSC_BSVIS) {
+ writel_relaxed(otgsc, USB_OTGSC);
+ /*
+ * BSV interrupt comes when operating as an A-device
+ * (VBUS on/off).
+ * But, handle BSV when charger is removed from ACA in ID_A
+ */
+ if ((otg->phy->state >= OTG_STATE_A_IDLE) &&
+ !test_bit(ID_A, &motg->inputs))
+ return IRQ_HANDLED;
+ if (otgsc & OTGSC_BSV) {
+ pr_debug("BSV set\n");
set_bit(B_SESS_VLD, &motg->inputs);
- else
+ } else {
+ pr_debug("BSV clear\n");
clear_bit(B_SESS_VLD, &motg->inputs);
- dev_dbg(phy->dev, "BSV set/clear\n");
- pm_runtime_get_noresume(phy->dev);
+ clear_bit(A_BUS_SUSPEND, &motg->inputs);
+
+ msm_chg_check_aca_intr(motg);
+ }
+ work = 1;
+ } else if (usbsts & STS_PCI) {
+ pc = readl_relaxed(USB_PORTSC);
+ pr_debug("portsc = %x\n", pc);
+ ret = IRQ_NONE;
+ /*
+ * HCD Acks PCI interrupt. We use this to switch
+ * between different OTG states.
+ */
+ work = 1;
+ switch (otg->phy->state) {
+ case OTG_STATE_A_SUSPEND:
+ if (otg->host->b_hnp_enable && (pc & PORTSC_CSC) &&
+ !(pc & PORTSC_CCS)) {
+ pr_debug("B_CONN clear\n");
+ clear_bit(B_CONN, &motg->inputs);
+ msm_otg_del_timer(motg);
+ }
+ break;
+ case OTG_STATE_A_PERIPHERAL:
+ /*
+ * A-peripheral observed activity on bus.
+ * clear A_BIDL_ADIS timer.
+ */
+ msm_otg_del_timer(motg);
+ work = 0;
+ break;
+ case OTG_STATE_B_WAIT_ACON:
+ if ((pc & PORTSC_CSC) && (pc & PORTSC_CCS)) {
+ pr_debug("A_CONN set\n");
+ set_bit(A_CONN, &motg->inputs);
+ /* Clear ASE0_BRST timer */
+ msm_otg_del_timer(motg);
+ }
+ break;
+ case OTG_STATE_B_HOST:
+ if ((pc & PORTSC_CSC) && !(pc & PORTSC_CCS)) {
+ pr_debug("A_CONN clear\n");
+ clear_bit(A_CONN, &motg->inputs);
+ msm_otg_del_timer(motg);
+ }
+ break;
+ case OTG_STATE_A_WAIT_BCON:
+ if (TA_WAIT_BCON < 0)
+ set_bit(A_BUS_REQ, &motg->inputs);
+ default:
+ work = 0;
+ break;
+ }
+ } else if (usbsts & STS_URI) {
+ ret = IRQ_NONE;
+ switch (otg->phy->state) {
+ case OTG_STATE_A_PERIPHERAL:
+ /*
+ * A-peripheral observed activity on bus.
+ * clear A_BIDL_ADIS timer.
+ */
+ msm_otg_del_timer(motg);
+ work = 0;
+ break;
+ default:
+ work = 0;
+ break;
+ }
+ } else if (usbsts & STS_SLI) {
+ ret = IRQ_NONE;
+ work = 0;
+ switch (otg->phy->state) {
+ case OTG_STATE_B_PERIPHERAL:
+ if (otg->gadget->b_hnp_enable) {
+ set_bit(A_BUS_SUSPEND, &motg->inputs);
+ set_bit(B_BUS_REQ, &motg->inputs);
+ work = 1;
+ }
+ break;
+ case OTG_STATE_A_PERIPHERAL:
+ msm_otg_start_timer(motg, TA_BIDL_ADIS,
+ A_BIDL_ADIS);
+ break;
+ default:
+ break;
+ }
+ } else if ((usbsts & PHY_ALT_INT)) {
+ writel_relaxed(PHY_ALT_INT, USB_USBSTS);
+ if (msm_chg_check_aca_intr(motg))
+ work = 1;
+ ret = IRQ_HANDLED;
+ }
+ if (work)
+ queue_work(system_nrt_wq, &motg->sm_work);
+
+ return ret;
+}
+
+static void msm_otg_set_vbus_state(int online)
+{
+ static bool init;
+ struct msm_otg *motg = the_msm_otg;
+
+ if (online) {
+ pr_debug("PMIC: BSV set\n");
+ set_bit(B_SESS_VLD, &motg->inputs);
+ } else {
+ pr_debug("PMIC: BSV clear\n");
+ clear_bit(B_SESS_VLD, &motg->inputs);
}
- writel(otgsc, USB_OTGSC);
- schedule_work(&motg->sm_work);
+ if (!init) {
+ init = true;
+ complete(&pmic_vbus_init);
+ pr_debug("PMIC: BSV init complete\n");
+ return;
+ }
+
+ if (atomic_read(&motg->pm_suspended))
+ motg->sm_work_pending = true;
+ else
+ queue_work(system_nrt_wq, &motg->sm_work);
+}
+
+static irqreturn_t msm_pmic_id_irq(int irq, void *data)
+{
+ struct msm_otg *motg = data;
+
+ if (aca_id_turned_on)
+ return IRQ_HANDLED;
+
+ if (irq_read_line(motg->pdata->pmic_id_irq)) {
+ pr_debug("PMIC: ID set\n");
+ set_bit(ID, &motg->inputs);
+ } else {
+ pr_debug("PMIC: ID clear\n");
+ clear_bit(ID, &motg->inputs);
+ set_bit(A_BUS_REQ, &motg->inputs);
+ }
+
+ if (motg->phy.state != OTG_STATE_UNDEFINED) {
+ if (atomic_read(&motg->pm_suspended))
+ motg->sm_work_pending = true;
+ else
+ queue_work(system_nrt_wq, &motg->sm_work);
+ }
+
return IRQ_HANDLED;
}
static int msm_otg_mode_show(struct seq_file *s, void *unused)
{
struct msm_otg *motg = s->private;
- struct usb_otg *otg = motg->phy.otg;
+ struct usb_phy *phy = &motg->phy;
- switch (otg->phy->state) {
+ switch (phy->state) {
case OTG_STATE_A_HOST:
seq_printf(s, "host\n");
break;
@@ -1311,7 +2779,7 @@
struct seq_file *s = file->private_data;
struct msm_otg *motg = s->private;
char buf[16];
- struct usb_otg *otg = motg->phy.otg;
+ struct usb_phy *phy = &motg->phy;
int status = count;
enum usb_mode_type req_mode;
@@ -1335,7 +2803,7 @@
switch (req_mode) {
case USB_NONE:
- switch (otg->phy->state) {
+ switch (phy->state) {
case OTG_STATE_A_HOST:
case OTG_STATE_B_PERIPHERAL:
set_bit(ID, &motg->inputs);
@@ -1346,7 +2814,7 @@
}
break;
case USB_PERIPHERAL:
- switch (otg->phy->state) {
+ switch (phy->state) {
case OTG_STATE_B_IDLE:
case OTG_STATE_A_HOST:
set_bit(ID, &motg->inputs);
@@ -1357,7 +2825,7 @@
}
break;
case USB_HOST:
- switch (otg->phy->state) {
+ switch (phy->state) {
case OTG_STATE_B_IDLE:
case OTG_STATE_B_PERIPHERAL:
clear_bit(ID, &motg->inputs);
@@ -1370,8 +2838,8 @@
goto out;
}
- pm_runtime_get_sync(otg->phy->dev);
- schedule_work(&motg->sm_work);
+ pm_runtime_resume(phy->dev);
+ queue_work(system_nrt_wq, &motg->sm_work);
out:
return status;
}
@@ -1384,31 +2852,320 @@
.release = single_release,
};
+static int msm_otg_show_otg_state(struct seq_file *s, void *unused)
+{
+ struct msm_otg *motg = s->private;
+ struct usb_phy *phy = &motg->phy;
+
+ seq_printf(s, "%s\n", otg_state_string(phy->state));
+ return 0;
+}
+
+static int msm_otg_otg_state_open(struct inode *inode, struct file *file)
+{
+ return single_open(file, msm_otg_show_otg_state, inode->i_private);
+}
+
+const struct file_operations msm_otg_state_fops = {
+ .open = msm_otg_otg_state_open,
+ .read = seq_read,
+ .llseek = seq_lseek,
+ .release = single_release,
+};
+
+static int msm_otg_show_chg_type(struct seq_file *s, void *unused)
+{
+ struct msm_otg *motg = s->private;
+
+ seq_printf(s, "%s\n", chg_to_string(motg->chg_type));
+ return 0;
+}
+
+static int msm_otg_chg_open(struct inode *inode, struct file *file)
+{
+ return single_open(file, msm_otg_show_chg_type, inode->i_private);
+}
+
+const struct file_operations msm_otg_chg_fops = {
+ .open = msm_otg_chg_open,
+ .read = seq_read,
+ .llseek = seq_lseek,
+ .release = single_release,
+};
+
+static int msm_otg_aca_show(struct seq_file *s, void *unused)
+{
+ if (debug_aca_enabled)
+ seq_printf(s, "enabled\n");
+ else
+ seq_printf(s, "disabled\n");
+
+ return 0;
+}
+
+static int msm_otg_aca_open(struct inode *inode, struct file *file)
+{
+ return single_open(file, msm_otg_aca_show, inode->i_private);
+}
+
+static ssize_t msm_otg_aca_write(struct file *file, const char __user *ubuf,
+ size_t count, loff_t *ppos)
+{
+ char buf[8];
+
+ memset(buf, 0x00, sizeof(buf));
+
+ if (copy_from_user(&buf, ubuf, min_t(size_t, sizeof(buf) - 1, count)))
+ return -EFAULT;
+
+ if (!strncmp(buf, "enable", 6))
+ debug_aca_enabled = true;
+ else
+ debug_aca_enabled = false;
+
+ return count;
+}
+
+const struct file_operations msm_otg_aca_fops = {
+ .open = msm_otg_aca_open,
+ .read = seq_read,
+ .write = msm_otg_aca_write,
+ .llseek = seq_lseek,
+ .release = single_release,
+};
+
+static int msm_otg_bus_show(struct seq_file *s, void *unused)
+{
+ if (debug_bus_voting_enabled)
+ seq_printf(s, "enabled\n");
+ else
+ seq_printf(s, "disabled\n");
+
+ return 0;
+}
+
+static int msm_otg_bus_open(struct inode *inode, struct file *file)
+{
+ return single_open(file, msm_otg_bus_show, inode->i_private);
+}
+
+static ssize_t msm_otg_bus_write(struct file *file, const char __user *ubuf,
+ size_t count, loff_t *ppos)
+{
+ char buf[8];
+ int ret;
+ struct seq_file *s = file->private_data;
+ struct msm_otg *motg = s->private;
+
+ memset(buf, 0x00, sizeof(buf));
+
+ if (copy_from_user(&buf, ubuf, min_t(size_t, sizeof(buf) - 1, count)))
+ return -EFAULT;
+
+ if (!strncmp(buf, "enable", 6)) {
+ /* Do not vote here. Let OTG statemachine decide when to vote */
+ debug_bus_voting_enabled = true;
+ } else {
+ debug_bus_voting_enabled = false;
+ if (motg->bus_perf_client) {
+ ret = msm_bus_scale_client_update_request(
+ motg->bus_perf_client, 0);
+ if (ret)
+ dev_err(motg->phy.dev, "%s: Failed to devote "
+ "for bus bw %d\n", __func__, ret);
+ }
+ }
+
+ return count;
+}
+
+const struct file_operations msm_otg_bus_fops = {
+ .open = msm_otg_bus_open,
+ .read = seq_read,
+ .write = msm_otg_bus_write,
+ .llseek = seq_lseek,
+ .release = single_release,
+};
+
static struct dentry *msm_otg_dbg_root;
-static struct dentry *msm_otg_dbg_mode;
static int msm_otg_debugfs_init(struct msm_otg *motg)
{
+ struct dentry *msm_otg_dentry;
+
msm_otg_dbg_root = debugfs_create_dir("msm_otg", NULL);
if (!msm_otg_dbg_root || IS_ERR(msm_otg_dbg_root))
return -ENODEV;
- msm_otg_dbg_mode = debugfs_create_file("mode", S_IRUGO | S_IWUSR,
- msm_otg_dbg_root, motg, &msm_otg_mode_fops);
- if (!msm_otg_dbg_mode) {
- debugfs_remove(msm_otg_dbg_root);
- msm_otg_dbg_root = NULL;
+ if (motg->pdata->mode == USB_OTG &&
+ motg->pdata->otg_control == OTG_USER_CONTROL) {
+
+ msm_otg_dentry = debugfs_create_file("mode", S_IRUGO |
+ S_IWUSR, msm_otg_dbg_root, motg,
+ &msm_otg_mode_fops);
+
+ if (!msm_otg_dentry) {
+ debugfs_remove(msm_otg_dbg_root);
+ msm_otg_dbg_root = NULL;
+ return -ENODEV;
+ }
+ }
+
+ msm_otg_dentry = debugfs_create_file("chg_type", S_IRUGO,
+ msm_otg_dbg_root, motg,
+ &msm_otg_chg_fops);
+
+ if (!msm_otg_dentry) {
+ debugfs_remove_recursive(msm_otg_dbg_root);
return -ENODEV;
}
+ msm_otg_dentry = debugfs_create_file("aca", S_IRUGO | S_IWUSR,
+ msm_otg_dbg_root, motg,
+ &msm_otg_aca_fops);
+
+ if (!msm_otg_dentry) {
+ debugfs_remove_recursive(msm_otg_dbg_root);
+ return -ENODEV;
+ }
+
+ msm_otg_dentry = debugfs_create_file("bus_voting", S_IRUGO | S_IWUSR,
+ msm_otg_dbg_root, motg,
+ &msm_otg_bus_fops);
+
+ if (!msm_otg_dentry) {
+ debugfs_remove_recursive(msm_otg_dbg_root);
+ return -ENODEV;
+ }
+
+ msm_otg_dentry = debugfs_create_file("otg_state", S_IRUGO,
+ msm_otg_dbg_root, motg, &msm_otg_state_fops);
+
+ if (!msm_otg_dentry) {
+ debugfs_remove_recursive(msm_otg_dbg_root);
+ return -ENODEV;
+ }
return 0;
}
static void msm_otg_debugfs_cleanup(void)
{
- debugfs_remove(msm_otg_dbg_mode);
- debugfs_remove(msm_otg_dbg_root);
+ debugfs_remove_recursive(msm_otg_dbg_root);
+}
+
+static u64 msm_otg_dma_mask = DMA_BIT_MASK(64);
+static struct platform_device *msm_otg_add_pdev(
+ struct platform_device *ofdev, const char *name)
+{
+ struct platform_device *pdev;
+ const struct resource *res = ofdev->resource;
+ unsigned int num = ofdev->num_resources;
+ int retval;
+
+ pdev = platform_device_alloc(name, -1);
+ if (!pdev) {
+ retval = -ENOMEM;
+ goto error;
+ }
+
+ pdev->dev.coherent_dma_mask = DMA_BIT_MASK(32);
+ pdev->dev.dma_mask = &msm_otg_dma_mask;
+
+ if (num) {
+ retval = platform_device_add_resources(pdev, res, num);
+ if (retval)
+ goto error;
+ }
+
+ retval = platform_device_add(pdev);
+ if (retval)
+ goto error;
+
+ return pdev;
+
+error:
+ platform_device_put(pdev);
+ return ERR_PTR(retval);
+}
+
+static int msm_otg_setup_devices(struct platform_device *ofdev,
+ enum usb_mode_type mode, bool init)
+{
+ const char *gadget_name = "msm_hsusb";
+ const char *host_name = "msm_hsusb_host";
+ static struct platform_device *gadget_pdev;
+ static struct platform_device *host_pdev;
+ int retval = 0;
+
+ if (!init) {
+ if (gadget_pdev)
+ platform_device_unregister(gadget_pdev);
+ if (host_pdev)
+ platform_device_unregister(host_pdev);
+ return 0;
+ }
+
+ switch (mode) {
+ case USB_OTG:
+ /* fall through */
+ case USB_PERIPHERAL:
+ gadget_pdev = msm_otg_add_pdev(ofdev, gadget_name);
+ if (IS_ERR(gadget_pdev)) {
+ retval = PTR_ERR(gadget_pdev);
+ break;
+ }
+ if (mode == USB_PERIPHERAL)
+ break;
+ /* fall through */
+ case USB_HOST:
+ host_pdev = msm_otg_add_pdev(ofdev, host_name);
+ if (IS_ERR(host_pdev)) {
+ retval = PTR_ERR(host_pdev);
+ if (mode == USB_OTG)
+ platform_device_unregister(gadget_pdev);
+ }
+ break;
+ default:
+ break;
+ }
+
+ return retval;
+}
+
+struct msm_otg_platform_data *msm_otg_dt_to_pdata(struct platform_device *pdev)
+{
+ struct device_node *node = pdev->dev.of_node;
+ struct msm_otg_platform_data *pdata;
+ int len = 0;
+
+ pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
+ if (!pdata) {
+ pr_err("unable to allocate platform data\n");
+ return NULL;
+ }
+ of_get_property(node, "qcom,hsusb-otg-phy-init-seq", &len);
+ if (len) {
+ pdata->phy_init_seq = devm_kzalloc(&pdev->dev, len, GFP_KERNEL);
+ if (!pdata->phy_init_seq)
+ return NULL;
+ of_property_read_u32_array(node, "qcom,hsusb-otg-phy-init-seq",
+ pdata->phy_init_seq,
+ len/sizeof(*pdata->phy_init_seq));
+ }
+ of_property_read_u32(node, "qcom,hsusb-otg-power-budget",
+ &pdata->power_budget);
+ of_property_read_u32(node, "qcom,hsusb-otg-mode",
+ &pdata->mode);
+ of_property_read_u32(node, "qcom,hsusb-otg-otg-control",
+ &pdata->otg_control);
+ of_property_read_u32(node, "qcom,hsusb-otg-default-mode",
+ &pdata->default_mode);
+ of_property_read_u32(node, "qcom,hsusb-otg-phy-type",
+ &pdata->phy_type);
+ of_property_read_u32(node, "qcom,hsusb-otg-pmic-id-irq",
+ &pdata->pmic_id_irq);
+ return pdata;
}
static int __init msm_otg_probe(struct platform_device *pdev)
@@ -1417,11 +3174,25 @@
struct resource *res;
struct msm_otg *motg;
struct usb_phy *phy;
+ struct msm_otg_platform_data *pdata;
dev_info(&pdev->dev, "msm_otg probe\n");
- if (!pdev->dev.platform_data) {
+
+ if (pdev->dev.of_node) {
+ dev_dbg(&pdev->dev, "device tree enabled\n");
+ pdata = msm_otg_dt_to_pdata(pdev);
+ if (!pdata)
+ return -ENOMEM;
+ ret = msm_otg_setup_devices(pdev, pdata->mode, true);
+ if (ret) {
+ dev_err(&pdev->dev, "devices setup failed\n");
+ return ret;
+ }
+ } else if (!pdev->dev.platform_data) {
dev_err(&pdev->dev, "No platform data given. Bailing out\n");
return -ENODEV;
+ } else {
+ pdata = pdev->dev.platform_data;
}
motg = kzalloc(sizeof(struct msm_otg), GFP_KERNEL);
@@ -1432,75 +3203,80 @@
motg->phy.otg = kzalloc(sizeof(struct usb_otg), GFP_KERNEL);
if (!motg->phy.otg) {
- dev_err(&pdev->dev, "unable to allocate msm_otg\n");
- return -ENOMEM;
- }
-
- motg->pdata = pdev->dev.platform_data;
- phy = &motg->phy;
- phy->dev = &pdev->dev;
-
- motg->phy_reset_clk = clk_get(&pdev->dev, "usb_phy_clk");
- if (IS_ERR(motg->phy_reset_clk)) {
- dev_err(&pdev->dev, "failed to get usb_phy_clk\n");
- ret = PTR_ERR(motg->phy_reset_clk);
+ dev_err(&pdev->dev, "unable to allocate usb_otg\n");
+ ret = -ENOMEM;
goto free_motg;
}
- motg->clk = clk_get(&pdev->dev, "usb_hs_clk");
- if (IS_ERR(motg->clk)) {
- dev_err(&pdev->dev, "failed to get usb_hs_clk\n");
- ret = PTR_ERR(motg->clk);
- goto put_phy_reset_clk;
- }
- clk_set_rate(motg->clk, 60000000);
+ the_msm_otg = motg;
+ motg->pdata = pdata;
+ phy = &motg->phy;
+ phy->dev = &pdev->dev;
/*
- * If USB Core is running its protocol engine based on CORE CLK,
+ * ACA ID_GND threshold range is overlapped with OTG ID_FLOAT. Hence
+ * PHY treat ACA ID_GND as float and no interrupt is generated. But
+ * PMIC can detect ACA ID_GND and generate an interrupt.
+ */
+ if (aca_enabled() && motg->pdata->otg_control != OTG_PMIC_CONTROL) {
+ dev_err(&pdev->dev, "ACA can not be enabled without PMIC\n");
+ ret = -EINVAL;
+ goto free_otg;
+ }
+
+ /* initialize reset counter */
+ motg->reset_counter = 0;
+
+ /* Some targets don't support PHY clock. */
+ motg->phy_reset_clk = clk_get(&pdev->dev, "phy_clk");
+ if (IS_ERR(motg->phy_reset_clk))
+ dev_err(&pdev->dev, "failed to get phy_clk\n");
+
+ /*
+ * Targets on which link uses asynchronous reset methodology,
+ * free running clock is not required during the reset.
+ */
+ motg->clk = clk_get(&pdev->dev, "alt_core_clk");
+ if (IS_ERR(motg->clk))
+ dev_dbg(&pdev->dev, "alt_core_clk is not present\n");
+ else
+ clk_set_rate(motg->clk, 60000000);
+
+ /*
+ * USB Core is running its protocol engine based on CORE CLK,
* CORE CLK must be running at >55Mhz for correct HSUSB
* operation and USB core cannot tolerate frequency changes on
* CORE CLK. For such USB cores, vote for maximum clk frequency
* on pclk source
*/
- if (motg->pdata->pclk_src_name) {
- motg->pclk_src = clk_get(&pdev->dev,
- motg->pdata->pclk_src_name);
- if (IS_ERR(motg->pclk_src))
- goto put_clk;
- clk_set_rate(motg->pclk_src, INT_MAX);
- clk_enable(motg->pclk_src);
- } else
- motg->pclk_src = ERR_PTR(-ENOENT);
-
-
- motg->pclk = clk_get(&pdev->dev, "usb_hs_pclk");
- if (IS_ERR(motg->pclk)) {
- dev_err(&pdev->dev, "failed to get usb_hs_pclk\n");
- ret = PTR_ERR(motg->pclk);
- goto put_pclk_src;
- }
-
- /*
- * USB core clock is not present on all MSM chips. This
- * clock is introduced to remove the dependency on AXI
- * bus frequency.
- */
- motg->core_clk = clk_get(&pdev->dev, "usb_hs_core_clk");
- if (IS_ERR(motg->core_clk))
+ motg->core_clk = clk_get(&pdev->dev, "core_clk");
+ if (IS_ERR(motg->core_clk)) {
motg->core_clk = NULL;
+ dev_err(&pdev->dev, "failed to get core_clk\n");
+ ret = PTR_ERR(motg->core_clk);
+ goto put_clk;
+ }
+ clk_set_rate(motg->core_clk, INT_MAX);
+
+ motg->pclk = clk_get(&pdev->dev, "iface_clk");
+ if (IS_ERR(motg->pclk)) {
+ dev_err(&pdev->dev, "failed to get iface_clk\n");
+ ret = PTR_ERR(motg->pclk);
+ goto put_core_clk;
+ }
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (!res) {
dev_err(&pdev->dev, "failed to get platform resource mem\n");
ret = -ENODEV;
- goto put_core_clk;
+ goto put_pclk;
}
motg->regs = ioremap(res->start, resource_size(res));
if (!motg->regs) {
dev_err(&pdev->dev, "ioremap failed\n");
ret = -ENOMEM;
- goto put_core_clk;
+ goto put_pclk;
}
dev_info(&pdev->dev, "OTG regs = %p\n", motg->regs);
@@ -1511,49 +3287,97 @@
goto free_regs;
}
- clk_enable(motg->clk);
- clk_enable(motg->pclk);
+ motg->xo_handle = msm_xo_get(MSM_XO_TCXO_D0, "usb");
+ if (IS_ERR(motg->xo_handle)) {
+ dev_err(&pdev->dev, "%s not able to get the handle "
+ "to vote for TCXO D0 buffer\n", __func__);
+ ret = PTR_ERR(motg->xo_handle);
+ goto free_regs;
+ }
- ret = msm_hsusb_init_vddcx(motg, 1);
+ ret = msm_xo_mode_vote(motg->xo_handle, MSM_XO_MODE_ON);
+ if (ret) {
+ dev_err(&pdev->dev, "%s failed to vote for TCXO "
+ "D0 buffer%d\n", __func__, ret);
+ goto free_xo_handle;
+ }
+
+ clk_prepare_enable(motg->pclk);
+
+ motg->vdd_type = VDDCX_CORNER;
+ hsusb_vddcx = devm_regulator_get(motg->phy.dev, "hsusb_vdd_dig");
+ if (IS_ERR(hsusb_vddcx)) {
+ hsusb_vddcx = devm_regulator_get(motg->phy.dev, "HSUSB_VDDCX");
+ if (IS_ERR(hsusb_vddcx)) {
+ dev_err(motg->phy.dev, "unable to get hsusb vddcx\n");
+ goto devote_xo_handle;
+ }
+ motg->vdd_type = VDDCX;
+ }
+
+ ret = msm_hsusb_config_vddcx(1);
if (ret) {
dev_err(&pdev->dev, "hsusb vddcx configuration failed\n");
- goto free_regs;
+ goto devote_xo_handle;
+ }
+
+ ret = regulator_enable(hsusb_vddcx);
+ if (ret) {
+ dev_err(&pdev->dev, "unable to enable the hsusb vddcx\n");
+ goto free_config_vddcx;
}
ret = msm_hsusb_ldo_init(motg, 1);
if (ret) {
dev_err(&pdev->dev, "hsusb vreg configuration failed\n");
- goto vddcx_exit;
- }
- ret = msm_hsusb_ldo_set_mode(1);
- if (ret) {
- dev_err(&pdev->dev, "hsusb vreg enable failed\n");
- goto ldo_exit;
+ goto free_hsusb_vddcx;
}
- if (motg->core_clk)
- clk_enable(motg->core_clk);
+ if (pdata->mhl_enable) {
+ mhl_analog_switch = devm_regulator_get(motg->phy.dev,
+ "mhl_ext_3p3v");
+ if (IS_ERR(mhl_analog_switch)) {
+ dev_err(&pdev->dev, "Unable to get mhl_analog_switch\n");
+ goto free_ldo_init;
+ }
+ }
+
+ ret = msm_hsusb_ldo_enable(motg, 1);
+ if (ret) {
+ dev_err(&pdev->dev, "hsusb vreg enable failed\n");
+ goto free_ldo_init;
+ }
+ clk_prepare_enable(motg->core_clk);
writel(0, USB_USBINTR);
writel(0, USB_OTGSC);
+ /* Ensure that above STOREs are completed before enabling interrupts */
+ mb();
+ wake_lock_init(&motg->wlock, WAKE_LOCK_SUSPEND, "msm_otg");
+ msm_otg_init_timer(motg);
INIT_WORK(&motg->sm_work, msm_otg_sm_work);
INIT_DELAYED_WORK(&motg->chg_work, msm_chg_detect_work);
+ setup_timer(&motg->id_timer, msm_otg_id_timer_func,
+ (unsigned long) motg);
ret = request_irq(motg->irq, msm_otg_irq, IRQF_SHARED,
"msm_otg", motg);
if (ret) {
dev_err(&pdev->dev, "request irq failed\n");
- goto disable_clks;
+ goto destroy_wlock;
}
phy->init = msm_otg_reset;
phy->set_power = msm_otg_set_power;
+ phy->set_suspend = msm_otg_set_suspend;
phy->io_ops = &msm_otg_io_ops;
phy->otg->phy = &motg->phy;
phy->otg->set_host = msm_otg_set_host;
phy->otg->set_peripheral = msm_otg_set_peripheral;
+ phy->otg->start_hnp = msm_otg_start_hnp;
+ phy->otg->start_srp = msm_otg_start_srp;
ret = usb_set_transceiver(&motg->phy);
if (ret) {
@@ -1561,47 +3385,104 @@
goto free_irq;
}
- platform_set_drvdata(pdev, motg);
- device_init_wakeup(&pdev->dev, 1);
-
if (motg->pdata->mode == USB_OTG &&
- motg->pdata->otg_control == OTG_USER_CONTROL) {
- ret = msm_otg_debugfs_init(motg);
- if (ret)
- dev_dbg(&pdev->dev, "mode debugfs file is"
- "not available\n");
+ motg->pdata->otg_control == OTG_PMIC_CONTROL) {
+ if (motg->pdata->pmic_id_irq) {
+ ret = request_irq(motg->pdata->pmic_id_irq,
+ msm_pmic_id_irq,
+ IRQF_TRIGGER_RISING |
+ IRQF_TRIGGER_FALLING,
+ "msm_otg", motg);
+ if (ret) {
+ dev_err(&pdev->dev, "request irq failed for PMIC ID\n");
+ goto remove_phy;
+ }
+ } else {
+ ret = -ENODEV;
+ dev_err(&pdev->dev, "PMIC IRQ for ID notifications doesn't exist\n");
+ goto remove_phy;
+ }
}
+ msm_hsusb_mhl_switch_enable(motg, 1);
+
+ platform_set_drvdata(pdev, motg);
+ device_init_wakeup(&pdev->dev, 1);
+ motg->mA_port = IUNIT;
+
+ ret = msm_otg_debugfs_init(motg);
+ if (ret)
+ dev_dbg(&pdev->dev, "mode debugfs file is"
+ "not available\n");
+
+ if (motg->pdata->otg_control == OTG_PMIC_CONTROL)
+ pm8921_charger_register_vbus_sn(&msm_otg_set_vbus_state);
+
+ if (motg->pdata->phy_type == SNPS_28NM_INTEGRATED_PHY) {
+ if (motg->pdata->otg_control == OTG_PMIC_CONTROL &&
+ (!(motg->pdata->mode == USB_OTG) ||
+ motg->pdata->pmic_id_irq))
+ motg->caps = ALLOW_PHY_POWER_COLLAPSE |
+ ALLOW_PHY_RETENTION;
+
+ if (motg->pdata->otg_control == OTG_PHY_CONTROL)
+ motg->caps = ALLOW_PHY_RETENTION;
+ }
+
+ if (motg->pdata->enable_lpm_on_dev_suspend)
+ motg->caps |= ALLOW_LPM_ON_DEV_SUSPEND;
+
+ wake_lock(&motg->wlock);
pm_runtime_set_active(&pdev->dev);
pm_runtime_enable(&pdev->dev);
+ if (motg->pdata->bus_scale_table) {
+ motg->bus_perf_client =
+ msm_bus_scale_register_client(motg->pdata->bus_scale_table);
+ if (!motg->bus_perf_client)
+ dev_err(motg->phy.dev, "%s: Failed to register BUS "
+ "scaling client!!\n", __func__);
+ else
+ debug_bus_voting_enabled = true;
+ }
+
return 0;
+
+remove_phy:
+ usb_set_transceiver(NULL);
free_irq:
free_irq(motg->irq, motg);
-disable_clks:
- clk_disable(motg->pclk);
- clk_disable(motg->clk);
-ldo_exit:
+destroy_wlock:
+ wake_lock_destroy(&motg->wlock);
+ clk_disable_unprepare(motg->core_clk);
+ msm_hsusb_ldo_enable(motg, 0);
+free_ldo_init:
msm_hsusb_ldo_init(motg, 0);
-vddcx_exit:
- msm_hsusb_init_vddcx(motg, 0);
+free_hsusb_vddcx:
+ regulator_disable(hsusb_vddcx);
+free_config_vddcx:
+ regulator_set_voltage(hsusb_vddcx,
+ vdd_val[motg->vdd_type][VDD_NONE],
+ vdd_val[motg->vdd_type][VDD_MAX]);
+devote_xo_handle:
+ clk_disable_unprepare(motg->pclk);
+ msm_xo_mode_vote(motg->xo_handle, MSM_XO_MODE_OFF);
+free_xo_handle:
+ msm_xo_put(motg->xo_handle);
free_regs:
iounmap(motg->regs);
-put_core_clk:
- if (motg->core_clk)
- clk_put(motg->core_clk);
+put_pclk:
clk_put(motg->pclk);
-put_pclk_src:
- if (!IS_ERR(motg->pclk_src)) {
- clk_disable(motg->pclk_src);
- clk_put(motg->pclk_src);
- }
+put_core_clk:
+ clk_put(motg->core_clk);
put_clk:
- clk_put(motg->clk);
-put_phy_reset_clk:
- clk_put(motg->phy_reset_clk);
-free_motg:
+ if (!IS_ERR(motg->clk))
+ clk_put(motg->clk);
+ if (!IS_ERR(motg->phy_reset_clk))
+ clk_put(motg->phy_reset_clk);
+free_otg:
kfree(motg->phy.otg);
+free_motg:
kfree(motg);
return ret;
}
@@ -1609,12 +3490,16 @@
static int __devexit msm_otg_remove(struct platform_device *pdev)
{
struct msm_otg *motg = platform_get_drvdata(pdev);
- struct usb_phy *phy = &motg->phy;
+ struct usb_otg *otg = motg->phy.otg;
int cnt = 0;
- if (phy->otg->host || phy->otg->gadget)
+ if (otg->host || otg->gadget)
return -EBUSY;
+ if (pdev->dev.of_node)
+ msm_otg_setup_devices(pdev, motg->pdata->mode, false);
+ if (motg->pdata->otg_control == OTG_PMIC_CONTROL)
+ pm8921_charger_unregister_vbus_sn(0);
msm_otg_debugfs_cleanup();
cancel_delayed_work_sync(&motg->chg_work);
cancel_work_sync(&motg->sm_work);
@@ -1623,15 +3508,19 @@
device_init_wakeup(&pdev->dev, 0);
pm_runtime_disable(&pdev->dev);
+ wake_lock_destroy(&motg->wlock);
+ msm_hsusb_mhl_switch_enable(motg, 0);
+ if (motg->pdata->pmic_id_irq)
+ free_irq(motg->pdata->pmic_id_irq, motg);
usb_set_transceiver(NULL);
free_irq(motg->irq, motg);
/*
* Put PHY in low power mode.
*/
- ulpi_read(phy, 0x14);
- ulpi_write(phy, 0x08, 0x09);
+ ulpi_read(otg->phy, 0x14);
+ ulpi_write(otg->phy, 0x08, 0x09);
writel(readl(USB_PORTSC) | PORTSC_PHCD, USB_PORTSC);
while (cnt < PHY_SUSPEND_TIMEOUT_USEC) {
@@ -1641,30 +3530,33 @@
cnt++;
}
if (cnt >= PHY_SUSPEND_TIMEOUT_USEC)
- dev_err(phy->dev, "Unable to suspend PHY\n");
+ dev_err(otg->phy->dev, "Unable to suspend PHY\n");
- clk_disable(motg->pclk);
- clk_disable(motg->clk);
- if (motg->core_clk)
- clk_disable(motg->core_clk);
- if (!IS_ERR(motg->pclk_src)) {
- clk_disable(motg->pclk_src);
- clk_put(motg->pclk_src);
- }
+ clk_disable_unprepare(motg->pclk);
+ clk_disable_unprepare(motg->core_clk);
+ msm_xo_put(motg->xo_handle);
+ msm_hsusb_ldo_enable(motg, 0);
msm_hsusb_ldo_init(motg, 0);
+ regulator_disable(hsusb_vddcx);
+ regulator_set_voltage(hsusb_vddcx,
+ vdd_val[motg->vdd_type][VDD_NONE],
+ vdd_val[motg->vdd_type][VDD_MAX]);
iounmap(motg->regs);
pm_runtime_set_suspended(&pdev->dev);
- clk_put(motg->phy_reset_clk);
+ if (!IS_ERR(motg->phy_reset_clk))
+ clk_put(motg->phy_reset_clk);
clk_put(motg->pclk);
- clk_put(motg->clk);
- if (motg->core_clk)
- clk_put(motg->core_clk);
+ if (!IS_ERR(motg->clk))
+ clk_put(motg->clk);
+ clk_put(motg->core_clk);
+
+ if (motg->bus_perf_client)
+ msm_bus_scale_unregister_client(motg->bus_perf_client);
kfree(motg->phy.otg);
kfree(motg);
-
return 0;
}
@@ -1672,20 +3564,14 @@
static int msm_otg_runtime_idle(struct device *dev)
{
struct msm_otg *motg = dev_get_drvdata(dev);
- struct usb_otg *otg = motg->phy.otg;
+ struct usb_phy *phy = &motg->phy;
dev_dbg(dev, "OTG runtime idle\n");
- /*
- * It is observed some times that a spurious interrupt
- * comes when PHY is put into LPM immediately after PHY reset.
- * This 1 sec delay also prevents entering into LPM immediately
- * after asynchronous interrupt.
- */
- if (otg->phy->state != OTG_STATE_UNDEFINED)
- pm_schedule_suspend(dev, 1000);
-
- return -EAGAIN;
+ if (phy->state == OTG_STATE_UNDEFINED)
+ return -EAGAIN;
+ else
+ return 0;
}
static int msm_otg_runtime_suspend(struct device *dev)
@@ -1701,6 +3587,7 @@
struct msm_otg *motg = dev_get_drvdata(dev);
dev_dbg(dev, "OTG runtime resume\n");
+ pm_runtime_get_noresume(dev);
return msm_otg_resume(motg);
}
#endif
@@ -1708,32 +3595,42 @@
#ifdef CONFIG_PM_SLEEP
static int msm_otg_pm_suspend(struct device *dev)
{
+ int ret = 0;
struct msm_otg *motg = dev_get_drvdata(dev);
dev_dbg(dev, "OTG PM suspend\n");
- return msm_otg_suspend(motg);
+
+ atomic_set(&motg->pm_suspended, 1);
+ ret = msm_otg_suspend(motg);
+ if (ret)
+ atomic_set(&motg->pm_suspended, 0);
+
+ return ret;
}
static int msm_otg_pm_resume(struct device *dev)
{
+ int ret = 0;
struct msm_otg *motg = dev_get_drvdata(dev);
- int ret;
dev_dbg(dev, "OTG PM resume\n");
- ret = msm_otg_resume(motg);
- if (ret)
- return ret;
+ atomic_set(&motg->pm_suspended, 0);
+ if (motg->sm_work_pending) {
+ motg->sm_work_pending = false;
- /*
- * Runtime PM Documentation recommends bringing the
- * device to full powered state upon resume.
- */
- pm_runtime_disable(dev);
- pm_runtime_set_active(dev);
- pm_runtime_enable(dev);
+ pm_runtime_get_noresume(dev);
+ ret = msm_otg_resume(motg);
- return 0;
+ /* Update runtime PM status */
+ pm_runtime_disable(dev);
+ pm_runtime_set_active(dev);
+ pm_runtime_enable(dev);
+
+ queue_work(system_nrt_wq, &motg->sm_work);
+ }
+
+ return ret;
}
#endif
@@ -1745,6 +3642,12 @@
};
#endif
+static struct of_device_id msm_otg_dt_match[] = {
+ { .compatible = "qcom,hsusb-otg",
+ },
+ {}
+};
+
static struct platform_driver msm_otg_driver = {
.remove = __devexit_p(msm_otg_remove),
.driver = {
@@ -1753,6 +3656,7 @@
#ifdef CONFIG_PM
.pm = &msm_otg_dev_pm_ops,
#endif
+ .of_match_table = msm_otg_dt_match,
},
};
diff --git a/drivers/usb/otg/otg.c b/drivers/usb/otg/otg.c
index 801e597..cf8676f 100644
--- a/drivers/usb/otg/otg.c
+++ b/drivers/usb/otg/otg.c
@@ -100,3 +100,18 @@
}
}
EXPORT_SYMBOL(otg_state_string);
+
+int otg_send_event(enum usb_otg_event event)
+{
+ struct usb_phy *phy = usb_get_transceiver();
+ int ret = -ENOTSUPP;
+
+ if (phy && phy->otg && phy->otg->send_event)
+ ret = phy->otg->send_event(phy->otg, event);
+
+ if (phy)
+ usb_put_transceiver(phy);
+
+ return ret;
+}
+EXPORT_SYMBOL(otg_send_event);
diff --git a/drivers/usb/otg/otg_id.c b/drivers/usb/otg/otg_id.c
new file mode 100644
index 0000000..7c38390
--- /dev/null
+++ b/drivers/usb/otg/otg_id.c
@@ -0,0 +1,205 @@
+/*
+ * Copyright (C) 2011 Google, Inc.
+ *
+ * Author:
+ * Colin Cross <ccross@android.com>
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <linux/kernel.h>
+#include <linux/mutex.h>
+#include <linux/notifier.h>
+#include <linux/usb/otg_id.h>
+
+static DEFINE_MUTEX(otg_id_lock);
+static struct plist_head otg_id_plist =
+ PLIST_HEAD_INIT(otg_id_plist);
+static struct otg_id_notifier_block *otg_id_active;
+static bool otg_id_cancelling;
+static bool otg_id_inited;
+static int otg_id_suspended;
+static bool otg_id_pending;
+
+static void otg_id_cancel(void)
+{
+ if (otg_id_active) {
+ otg_id_cancelling = true;
+ mutex_unlock(&otg_id_lock);
+
+ otg_id_active->cancel(otg_id_active);
+
+ mutex_lock(&otg_id_lock);
+ otg_id_cancelling = false;
+ }
+}
+
+static void __otg_id_notify(void)
+{
+ int ret = 0;
+ struct otg_id_notifier_block *otg_id_nb;
+ bool proxy_wait = false;
+ if (plist_head_empty(&otg_id_plist))
+ return;
+
+ plist_for_each_entry(otg_id_nb, &otg_id_plist, p) {
+ if (proxy_wait) {
+ if (otg_id_nb->proxy_wait)
+ ret = otg_id_nb->proxy_wait(otg_id_nb);
+ } else {
+ ret = otg_id_nb->detect(otg_id_nb);
+ }
+ if (ret == OTG_ID_HANDLED) {
+ otg_id_active = otg_id_nb;
+ return;
+ }
+ if (ret == OTG_ID_PROXY_WAIT)
+ proxy_wait = true;
+
+ }
+
+ WARN(1, "otg id event not handled");
+ otg_id_active = NULL;
+}
+
+int otg_id_init(void)
+{
+ mutex_lock(&otg_id_lock);
+
+ otg_id_inited = true;
+ __otg_id_notify();
+
+ mutex_unlock(&otg_id_lock);
+ return 0;
+}
+late_initcall(otg_id_init);
+
+/**
+ * otg_id_register_notifier
+ * @otg_id_nb: notifier block containing priority and callback function
+ *
+ * Register a notifier that will be called on any USB cable state change.
+ * The priority determines the order the callback will be called in, a higher
+ * number will be called first. A callback function needs to determine the
+ * type of USB cable that is connected. If it can determine the type, it
+ * should notify the appropriate drivers (for example, call an otg notifier
+ * with USB_EVENT_VBUS), and return OTG_ID_HANDLED. Once a callback has
+ * returned OTG_ID_HANDLED, it is responsible for calling otg_id_notify() when
+ * the detected USB cable is disconnected.
+ */
+int otg_id_register_notifier(struct otg_id_notifier_block *otg_id_nb)
+{
+ plist_node_init(&otg_id_nb->p, otg_id_nb->priority);
+
+ mutex_lock(&otg_id_lock);
+ plist_add(&otg_id_nb->p, &otg_id_plist);
+
+ if (otg_id_inited) {
+ otg_id_cancel();
+ __otg_id_notify();
+ }
+
+ mutex_unlock(&otg_id_lock);
+
+ return 0;
+}
+
+void otg_id_unregister_notifier(struct otg_id_notifier_block *otg_id_nb)
+{
+ mutex_lock(&otg_id_lock);
+
+ plist_del(&otg_id_nb->p, &otg_id_plist);
+
+ if (otg_id_inited && (otg_id_active == otg_id_nb)) {
+ otg_id_cancel();
+ __otg_id_notify();
+ }
+
+ mutex_unlock(&otg_id_lock);
+}
+
+/**
+ * otg_id_notify
+ *
+ * Notify listeners on any USB cable state change.
+ *
+ * A driver may only call otg_id_notify if it returned OTG_ID_HANDLED the last
+ * time it's notifier was called, and it's cancel function has not been called.
+ */
+void otg_id_notify(void)
+{
+ mutex_lock(&otg_id_lock);
+
+ if (otg_id_cancelling)
+ goto out;
+
+ if (otg_id_suspended != 0) {
+ otg_id_pending = true;
+ goto out;
+ }
+
+ __otg_id_notify();
+out:
+ mutex_unlock(&otg_id_lock);
+}
+
+/**
+ * otg_id_suspend
+ *
+ * Mark the otg_id subsystem as going into suspend. From here on out,
+ * any notifications will be deferred until the last otg_id client resumes.
+ * If there is a pending notification when calling this function, it will
+ * return a negative errno and expects that the caller will abort suspend.
+ * Returs 0 on success.
+ */
+int otg_id_suspend(void)
+{
+ int ret = 0;
+
+ mutex_lock(&otg_id_lock);
+
+ /*
+ * if there's a pending notification, tell the caller to abort suspend
+ */
+ if (otg_id_suspended != 0 && otg_id_pending) {
+ pr_info("otg_id: pending notification, should abort suspend\n");
+ ret = -EBUSY;
+ goto out;
+ }
+
+ otg_id_suspended++;
+out:
+ mutex_unlock(&otg_id_lock);
+ return ret;
+}
+
+/**
+ * otg_id_resume
+ *
+ * Inform the otg_id subsystem that a client is resuming. If this is the
+ * last client to be resumed and there's a pending notification,
+ * otg_id_notify() is called.
+ */
+void otg_id_resume(void)
+{
+ mutex_lock(&otg_id_lock);
+ if (WARN(!otg_id_suspended, "unbalanced otg_id_resume\n"))
+ goto out;
+ if (--otg_id_suspended == 0) {
+ if (otg_id_pending) {
+ pr_info("otg_id: had pending notification\n");
+ otg_id_pending = false;
+ __otg_id_notify();
+ }
+ }
+out:
+ mutex_unlock(&otg_id_lock);
+}