commit f4ea0826578b0e8438a5496509910187bece5892
author Jeremy Gebben <jgebben@codeaurora.org> Thu Apr 05 16:27:08 2012 -0600
committer Jeremy Gebben <jgebben@codeaurora.org> Tue May 08 09:26:45 2012 -0600
tree 27a0603a11f7f856b77470858e96f227396e9e8e
parent abe3c9c88f9cd1cbc5d3a3eec4bdbba6e3ce2107

msm: kgsl: expand axi error logging

Read and log the gpu virtual and physical address that MH thinks
caused the AXI error from the debug bus.

Change-Id: I2c381845f3e1e4f82bc42732c46a8ffa14658a92
Signed-off-by: Jeremy Gebben <jgebben@codeaurora.org>

drivers/gpu/msm/kgsl_mmu.c

diff --git a/drivers/gpu/msm/kgsl_mmu.c b/drivers/gpu/msm/kgsl_mmu.c
index e11b119..4ba9e7f 100644
--- a/drivers/gpu/msm/kgsl_mmu.c
+++ b/drivers/gpu/msm/kgsl_mmu.c
@@ -382,18 +382,35 @@
 }
 EXPORT_SYMBOL(kgsl_mmu_start);
 
+static void mh_axi_error(struct kgsl_device *device, const char* type)
+{
+	unsigned int reg, gpu_err, phys_err, pt_base;
+
+	kgsl_regread(device, MH_AXI_ERROR, &reg);
+	pt_base = kgsl_mmu_get_current_ptbase(&device->mmu);
+	/*
+	 * Read gpu virtual and physical addresses that
+	 * caused the error from the debug data.
+	 */
+	kgsl_regwrite(device, MH_DEBUG_CTRL, 44);
+	kgsl_regread(device, MH_DEBUG_DATA, &gpu_err);
+	kgsl_regwrite(device, MH_DEBUG_CTRL, 45);
+	kgsl_regread(device, MH_DEBUG_DATA, &phys_err);
+	KGSL_MEM_CRIT(device,
+			"axi %s error: %08x pt %08x gpu %08x phys %08x\n",
+			type, reg, pt_base, gpu_err, phys_err);
+}
+
 void kgsl_mh_intrcallback(struct kgsl_device *device)
 {
 	unsigned int status = 0;
-	unsigned int reg;
 
 	kgsl_regread(device, MH_INTERRUPT_STATUS, &status);
-	kgsl_regread(device, MH_AXI_ERROR, &reg);
 
 	if (status & MH_INTERRUPT_MASK__AXI_READ_ERROR)
-		KGSL_MEM_CRIT(device, "axi read error interrupt: %08x\n", reg);
+		mh_axi_error(device, "read");
 	if (status & MH_INTERRUPT_MASK__AXI_WRITE_ERROR)
-		KGSL_MEM_CRIT(device, "axi write error interrupt: %08x\n", reg);
+		mh_axi_error(device, "write");
 	if (status & MH_INTERRUPT_MASK__MMU_PAGE_FAULT)
 		device->mmu.mmu_ops->mmu_pagefault(&device->mmu);