msm: acpuclock: Add PVS data for 8960ab
Add data for all seven PVS bins.
Change-Id: Iadb010dd4ce83400eeb540318f6f9e7f166f0f47
Signed-off-by: Patrick Daly <pdaly@codeaurora.org>
diff --git a/arch/arm/mach-msm/acpuclock-8960ab.c b/arch/arm/mach-msm/acpuclock-8960ab.c
index ae1cd7b..03a2004 100644
--- a/arch/arm/mach-msm/acpuclock-8960ab.c
+++ b/arch/arm/mach-msm/acpuclock-8960ab.c
@@ -105,40 +105,140 @@
{ }
};
-static struct acpu_level acpu_freq_tbl_slow[] __initdata = {
+static struct acpu_level freq_tbl_PVS0[] __initdata = {
{ 1, { 384000, PLL_8, 0, 0x00 }, L2(0), 950000 },
- { 0, { 432000, HFPLL, 2, 0x20 }, L2(3), 975000 },
- { 1, { 486000, HFPLL, 2, 0x24 }, L2(3), 975000 },
- { 0, { 540000, HFPLL, 2, 0x28 }, L2(3), 1000000 },
- { 1, { 594000, HFPLL, 1, 0x16 }, L2(3), 1000000 },
- { 0, { 648000, HFPLL, 1, 0x18 }, L2(3), 1025000 },
- { 1, { 702000, HFPLL, 1, 0x1A }, L2(3), 1025000 },
- { 0, { 756000, HFPLL, 1, 0x1C }, L2(3), 1075000 },
- { 1, { 810000, HFPLL, 1, 0x1E }, L2(3), 1075000 },
- { 0, { 864000, HFPLL, 1, 0x20 }, L2(3), 1100000 },
- { 1, { 918000, HFPLL, 1, 0x22 }, L2(3), 1100000 },
- { 0, { 972000, HFPLL, 1, 0x24 }, L2(3), 1125000 },
- { 1, { 1026000, HFPLL, 1, 0x26 }, L2(3), 1125000 },
- { 0, { 1080000, HFPLL, 1, 0x28 }, L2(9), 1175000 },
- { 1, { 1134000, HFPLL, 1, 0x2A }, L2(9), 1175000 },
- { 0, { 1188000, HFPLL, 1, 0x2C }, L2(9), 1200000 },
- { 1, { 1242000, HFPLL, 1, 0x2E }, L2(9), 1200000 },
- { 0, { 1296000, HFPLL, 1, 0x30 }, L2(9), 1225000 },
- { 1, { 1350000, HFPLL, 1, 0x32 }, L2(9), 1225000 },
- { 0, { 1404000, HFPLL, 1, 0x34 }, L2(9), 1237500 },
- { 1, { 1458000, HFPLL, 1, 0x36 }, L2(9), 1237500 },
- { 1, { 1512000, HFPLL, 1, 0x38 }, L2(9), 1250000 },
- { 1, { 1566000, HFPLL, 1, 0x3A }, L2(9), 1250000 },
- { 1, { 1620000, HFPLL, 1, 0x3C }, L2(9), 1250000 },
- { 1, { 1674000, HFPLL, 1, 0x3E }, L2(9), 1250000 },
+ { 1, { 486000, HFPLL, 2, 0x24 }, L2(3), 950000 },
+ { 1, { 594000, HFPLL, 1, 0x16 }, L2(3), 975000 },
+ { 1, { 702000, HFPLL, 1, 0x1A }, L2(3), 1000000 },
+ { 1, { 810000, HFPLL, 1, 0x1E }, L2(3), 1025000 },
+ { 1, { 918000, HFPLL, 1, 0x22 }, L2(3), 1050000 },
+ { 1, { 1026000, HFPLL, 1, 0x26 }, L2(3), 1075000 },
+ { 1, { 1134000, HFPLL, 1, 0x2A }, L2(9), 1100000 },
+ { 1, { 1242000, HFPLL, 1, 0x2E }, L2(9), 1125000 },
+ { 1, { 1350000, HFPLL, 1, 0x32 }, L2(9), 1150000 },
+ { 1, { 1458000, HFPLL, 1, 0x36 }, L2(9), 1175000 },
+ { 1, { 1566000, HFPLL, 1, 0x3A }, L2(9), 1200000 },
+ { 1, { 1674000, HFPLL, 1, 0x3E }, L2(9), 1225000 },
{ 1, { 1728000, HFPLL, 1, 0x40 }, L2(9), 1250000 },
{ 0, { 0 } }
};
+static struct acpu_level freq_tbl_PVS1[] __initdata = {
+ { 1, { 384000, PLL_8, 0, 0x00 }, L2(0), 925000 },
+ { 1, { 486000, HFPLL, 2, 0x24 }, L2(3), 925000 },
+ { 1, { 594000, HFPLL, 1, 0x16 }, L2(3), 950000 },
+ { 1, { 702000, HFPLL, 1, 0x1A }, L2(3), 975000 },
+ { 1, { 810000, HFPLL, 1, 0x1E }, L2(3), 1000000 },
+ { 1, { 918000, HFPLL, 1, 0x22 }, L2(3), 1025000 },
+ { 1, { 1026000, HFPLL, 1, 0x26 }, L2(3), 1050000 },
+ { 1, { 1134000, HFPLL, 1, 0x2A }, L2(9), 1075000 },
+ { 1, { 1242000, HFPLL, 1, 0x2E }, L2(9), 1100000 },
+ { 1, { 1350000, HFPLL, 1, 0x32 }, L2(9), 1125000 },
+ { 1, { 1458000, HFPLL, 1, 0x36 }, L2(9), 1150000 },
+ { 1, { 1566000, HFPLL, 1, 0x3A }, L2(9), 1175000 },
+ { 1, { 1674000, HFPLL, 1, 0x3E }, L2(9), 1200000 },
+ { 1, { 1728000, HFPLL, 1, 0x40 }, L2(9), 1225000 },
+ { 0, { 0 } }
+};
+
+static struct acpu_level freq_tbl_PVS2[] __initdata = {
+ { 1, { 384000, PLL_8, 0, 0x00 }, L2(0), 900000 },
+ { 1, { 486000, HFPLL, 2, 0x24 }, L2(3), 900000 },
+ { 1, { 594000, HFPLL, 1, 0x16 }, L2(3), 925000 },
+ { 1, { 702000, HFPLL, 1, 0x1A }, L2(3), 950000 },
+ { 1, { 810000, HFPLL, 1, 0x1E }, L2(3), 975000 },
+ { 1, { 918000, HFPLL, 1, 0x22 }, L2(3), 1000000 },
+ { 1, { 1026000, HFPLL, 1, 0x26 }, L2(3), 1025000 },
+ { 1, { 1134000, HFPLL, 1, 0x2A }, L2(9), 1050000 },
+ { 1, { 1242000, HFPLL, 1, 0x2E }, L2(9), 1075000 },
+ { 1, { 1350000, HFPLL, 1, 0x32 }, L2(9), 1100000 },
+ { 1, { 1458000, HFPLL, 1, 0x36 }, L2(9), 1125000 },
+ { 1, { 1566000, HFPLL, 1, 0x3A }, L2(9), 1150000 },
+ { 1, { 1674000, HFPLL, 1, 0x3E }, L2(9), 1175000 },
+ { 1, { 1728000, HFPLL, 1, 0x40 }, L2(9), 1200000 },
+ { 0, { 0 } }
+};
+
+static struct acpu_level freq_tbl_PVS3[] __initdata = {
+ { 1, { 384000, PLL_8, 0, 0x00 }, L2(0), 900000 },
+ { 1, { 486000, HFPLL, 2, 0x24 }, L2(3), 900000 },
+ { 1, { 594000, HFPLL, 1, 0x16 }, L2(3), 900000 },
+ { 1, { 702000, HFPLL, 1, 0x1A }, L2(3), 925000 },
+ { 1, { 810000, HFPLL, 1, 0x1E }, L2(3), 950000 },
+ { 1, { 918000, HFPLL, 1, 0x22 }, L2(3), 975000 },
+ { 1, { 1026000, HFPLL, 1, 0x26 }, L2(3), 1000000 },
+ { 1, { 1134000, HFPLL, 1, 0x2A }, L2(9), 1025000 },
+ { 1, { 1242000, HFPLL, 1, 0x2E }, L2(9), 1050000 },
+ { 1, { 1350000, HFPLL, 1, 0x32 }, L2(9), 1075000 },
+ { 1, { 1458000, HFPLL, 1, 0x36 }, L2(9), 1100000 },
+ { 1, { 1566000, HFPLL, 1, 0x3A }, L2(9), 1125000 },
+ { 1, { 1674000, HFPLL, 1, 0x3E }, L2(9), 1150000 },
+ { 1, { 1728000, HFPLL, 1, 0x40 }, L2(9), 1175000 },
+ { 0, { 0 } }
+};
+
+static struct acpu_level freq_tbl_PVS4[] __initdata = {
+ { 1, { 384000, PLL_8, 0, 0x00 }, L2(0), 875000 },
+ { 1, { 486000, HFPLL, 2, 0x24 }, L2(3), 875000 },
+ { 1, { 594000, HFPLL, 1, 0x16 }, L2(3), 875000 },
+ { 1, { 702000, HFPLL, 1, 0x1A }, L2(3), 900000 },
+ { 1, { 810000, HFPLL, 1, 0x1E }, L2(3), 925000 },
+ { 1, { 918000, HFPLL, 1, 0x22 }, L2(3), 950000 },
+ { 1, { 1026000, HFPLL, 1, 0x26 }, L2(3), 975000 },
+ { 1, { 1134000, HFPLL, 1, 0x2A }, L2(9), 1000000 },
+ { 1, { 1242000, HFPLL, 1, 0x2E }, L2(9), 1025000 },
+ { 1, { 1350000, HFPLL, 1, 0x32 }, L2(9), 1050000 },
+ { 1, { 1458000, HFPLL, 1, 0x36 }, L2(9), 1075000 },
+ { 1, { 1566000, HFPLL, 1, 0x3A }, L2(9), 1100000 },
+ { 1, { 1674000, HFPLL, 1, 0x3E }, L2(9), 1125000 },
+ { 1, { 1728000, HFPLL, 1, 0x40 }, L2(9), 1150000 },
+ { 0, { 0 } }
+};
+
+static struct acpu_level freq_tbl_PVS5[] __initdata = {
+ { 1, { 384000, PLL_8, 0, 0x00 }, L2(0), 875000 },
+ { 1, { 486000, HFPLL, 2, 0x24 }, L2(3), 875000 },
+ { 1, { 594000, HFPLL, 1, 0x16 }, L2(3), 875000 },
+ { 1, { 702000, HFPLL, 1, 0x1A }, L2(3), 875000 },
+ { 1, { 810000, HFPLL, 1, 0x1E }, L2(3), 900000 },
+ { 1, { 918000, HFPLL, 1, 0x22 }, L2(3), 925000 },
+ { 1, { 1026000, HFPLL, 1, 0x26 }, L2(3), 950000 },
+ { 1, { 1134000, HFPLL, 1, 0x2A }, L2(9), 975000 },
+ { 1, { 1242000, HFPLL, 1, 0x2E }, L2(9), 1000000 },
+ { 1, { 1350000, HFPLL, 1, 0x32 }, L2(9), 1025000 },
+ { 1, { 1458000, HFPLL, 1, 0x36 }, L2(9), 1050000 },
+ { 1, { 1566000, HFPLL, 1, 0x3A }, L2(9), 1075000 },
+ { 1, { 1674000, HFPLL, 1, 0x3E }, L2(9), 1100000 },
+ { 1, { 1728000, HFPLL, 1, 0x40 }, L2(9), 1125000 },
+ { 0, { 0 } }
+};
+
+static struct acpu_level freq_tbl_PVS6[] __initdata = {
+ { 1, { 384000, PLL_8, 0, 0x00 }, L2(0), 850000 },
+ { 1, { 486000, HFPLL, 2, 0x24 }, L2(3), 850000 },
+ { 1, { 594000, HFPLL, 1, 0x16 }, L2(3), 850000 },
+ { 1, { 702000, HFPLL, 1, 0x1A }, L2(3), 850000 },
+ { 1, { 810000, HFPLL, 1, 0x1E }, L2(3), 875000 },
+ { 1, { 918000, HFPLL, 1, 0x22 }, L2(3), 900000 },
+ { 1, { 1026000, HFPLL, 1, 0x26 }, L2(3), 925000 },
+ { 1, { 1134000, HFPLL, 1, 0x2A }, L2(9), 950000 },
+ { 1, { 1242000, HFPLL, 1, 0x2E }, L2(9), 975000 },
+ { 1, { 1350000, HFPLL, 1, 0x32 }, L2(9), 1000000 },
+ { 1, { 1458000, HFPLL, 1, 0x36 }, L2(9), 1025000 },
+ { 1, { 1566000, HFPLL, 1, 0x3A }, L2(9), 1050000 },
+ { 1, { 1674000, HFPLL, 1, 0x3E }, L2(9), 1075000 },
+ { 1, { 1728000, HFPLL, 1, 0x40 }, L2(9), 1100000 },
+ { 0, { 0 } }
+};
+
static struct pvs_table pvs_tables[NUM_SPEED_BINS][NUM_PVS] __initdata = {
-[0][PVS_SLOW] = { acpu_freq_tbl_slow, sizeof(acpu_freq_tbl_slow), 0 },
-[0][PVS_NOMINAL] = { acpu_freq_tbl_slow, sizeof(acpu_freq_tbl_slow), 0 },
-[0][PVS_FAST] = { acpu_freq_tbl_slow, sizeof(acpu_freq_tbl_slow), 0 },
+[0][0] = { freq_tbl_PVS0, sizeof(freq_tbl_PVS0), 0 },
+[0][1] = { freq_tbl_PVS1, sizeof(freq_tbl_PVS1), 0 },
+[0][2] = { freq_tbl_PVS2, sizeof(freq_tbl_PVS2), 0 },
+[0][3] = { freq_tbl_PVS3, sizeof(freq_tbl_PVS3), 0 },
+[0][4] = { freq_tbl_PVS4, sizeof(freq_tbl_PVS4), 0 },
+[0][5] = { freq_tbl_PVS5, sizeof(freq_tbl_PVS5), 0 },
+[0][6] = { freq_tbl_PVS6, sizeof(freq_tbl_PVS6), 0 },
};
static struct acpuclk_krait_params acpuclk_8960ab_params __initdata = {