)]}'
{
  "commit": "f84c39da766b4c8f13872282f58286a57ad05b3e",
  "tree": "22241d3e48d2d765b7f6c92467956e6d0cb1763d",
  "parents": [
    "b910ecf6bf221bb06f37e44765307c42b20db205"
  ],
  "author": {
    "name": "Liu Dave-r63238",
    "email": "DaveLiu@freescale.com",
    "time": "Wed Oct 18 16:36:56 2006 +0800"
  },
  "committer": {
    "name": "Paul Mackerras",
    "email": "paulus@samba.org",
    "time": "Wed Oct 25 13:49:22 2006 +1000"
  },
  "message": "[POWERPC] Fix the UCC rx/tx clock of QE\n\nMPC8323EMDS board ethernet interface with RMII uses the CLK16 divisor\nfor the rx and tx clock, but the ucc_set_qe_mux_rxtx() function doesn\u0027t\nhandle the CLK16 setting of the CMXUCR3 and CMXUCR4 registers.  This\nfixes it.\n\nSigned-off-by: Dave Liu \u003cdaveliu@freescale.com\u003e\nSigned-off-by: Paul Mackerras \u003cpaulus@samba.org\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "916c9e5df57faa67afb71b0d7d90220929b639dd",
      "old_mode": 33188,
      "old_path": "arch/powerpc/sysdev/qe_lib/ucc.c",
      "new_id": "ac12a44d516f6ceb6d987ec4f09d7c85a67ee77a",
      "new_mode": 33188,
      "new_path": "arch/powerpc/sysdev/qe_lib/ucc.c"
    }
  ]
}