)]}'
{
  "commit": "f93611fac7eed3aa175795fb8e452aa30af33b6a",
  "tree": "37b3e9e8e9065ee80aefb02800fe1b88c697cf4b",
  "parents": [
    "e090aa80321b64c3b793f3b047e31ecf1af9538d"
  ],
  "author": {
    "name": "Anton Vorontsov",
    "email": "avorontsov@ru.mvista.com",
    "time": "Tue Dec 08 01:54:35 2009 +0300"
  },
  "committer": {
    "name": "Kumar Gala",
    "email": "galak@kernel.crashing.org",
    "time": "Wed Dec 09 14:50:40 2009 -0600"
  },
  "message": "powerpc/fsl_pci: Fix P2P bridge handling for MPC83xx PCIe controllers\n\nIt appears that we wrongly calculate dev_base for type1 config cycles.\nThe thing is: we shouldn\u0027t subtract hose-\u003efirst_busno because PCI core\nsets PCI primary, secondary and subordinate bus numbers, and PCIe\ncontroller actually takes the registers into account. So we should use\njust bus-\u003enumber.\n\nAlso, according to MPC8315 reference manual, primary bus number should\nalways remain 0. We have PPC_INDIRECT_TYPE_SURPRESS_PRIMARY_BUS quirk\nin indirect_pci.c, but since 83xx is somewhat special, it doesn\u0027t use\nindirect_pci.c routines, so we have to implement the quirk specifically\nfor 83xx PCIe controllers.\n\nSigned-off-by: Anton Vorontsov \u003cavorontsov@ru.mvista.com\u003e\nSigned-off-by: Kumar Gala \u003cgalak@kernel.crashing.org\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "4e3a3e345ab33cd5b8d435c3415e244e664f70c7",
      "old_mode": 33188,
      "old_path": "arch/powerpc/sysdev/fsl_pci.c",
      "new_id": "e1a028c1f18d0a94a415038c343f160309eb034c",
      "new_mode": 33188,
      "new_path": "arch/powerpc/sysdev/fsl_pci.c"
    }
  ]
}