[SPARC64]: Send all device interrupts via one PIL.
This is the first in a series of cleanups that will hopefully
allow a seamless attempt at using the generic IRQ handling
infrastructure in the Linux kernel.
Define PIL_DEVICE_IRQ and vector all device interrupts through
there.
Get rid of the ugly pil0_dummy_{bucket,desc}, instead vector
the timer interrupt directly to a specific handler since the
timer interrupt is the only event that will be signaled on
PIL 14.
The irq_worklist is now in the per-cpu trap_block[].
Signed-off-by: David S. Miller <davem@davemloft.net>
diff --git a/arch/sparc64/kernel/sun4v_ivec.S b/arch/sparc64/kernel/sun4v_ivec.S
index b49a68b..f70e477 100644
--- a/arch/sparc64/kernel/sun4v_ivec.S
+++ b/arch/sparc64/kernel/sun4v_ivec.S
@@ -5,6 +5,7 @@
#include <asm/cpudata.h>
#include <asm/intr_queue.h>
+#include <asm/pil.h>
.text
.align 32
@@ -106,19 +107,13 @@
or %g4, %lo(ivector_table), %g4
add %g4, %g3, %g4
- /* Load IRQ %pil into %g5. */
- ldub [%g4 + 0x04], %g5
-
/* Insert ivector_table[] entry into __irq_work[] queue. */
- sllx %g5, 2, %g3
- lduw [%g1 + %g3], %g2 /* g2 = irq_work(cpu, pil) */
+ lduw [%g1], %g2 /* g2 = irq_work(cpu) */
stw %g2, [%g4 + 0x00] /* bucket->irq_chain = g2 */
- stw %g4, [%g1 + %g3] /* irq_work(cpu, pil) = bucket */
+ stw %g4, [%g1] /* irq_work(cpu) = bucket */
/* Signal the interrupt by setting (1 << pil) in %softint. */
- mov 1, %g2
- sllx %g2, %g5, %g2
- wr %g2, 0x0, %set_softint
+ wr %g0, 1 << PIL_DEVICE_IRQ, %set_softint
sun4v_dev_mondo_queue_empty:
retry