* MSM PM-8x60

PM-8x60 is the low power management device for MSM (Snapdragon class) chipsets.
This device sets up different components to do low power modes and registers with
the kernel to be notified of idle and suspend states and when called, follows
through the set of instructions in putting the application cores to the lowest
power mode possible.
The PC debug counter reserves 16 registers in the IMEM memory space which maintains
a count on the state of power collapse on each core. This count will be useful to
debug the power collapse state on each core.

The required properties for PM-8x60 are:

- compatible: "qcom,pm-8x60"

The optional properties are:

- reg: physical IMEM address reserved for PC counters and the size
- qcom,use-sync-timer: Indicates whether the target uses the synchronized QTimer.
- qcom,pc-mode: Indicates the type of power collapse used by the target. The
           valid values for this are:
	"tz_l2_int"  (Power collapse terminates in TZ; integrated L2 cache controller)
	"no_tz_l2_ext", (Power collapse doesn't terminate in TZ; external L2 cache controller)
	"tz_l2_ext"  (Power collapse terminates in TZ; external L2 cache controller)
- qcom,saw-turns-off-pll: Version of SAW2.1 or can turn off the HFPLL, when
	doing power collapse and so the core need to switch to Global PLL before
	PC.
- qcom,pc-resets-timer: Indicates that the timer gets reset during power collapse.

Example:

qcom,pm-8x60@fe800664 {
		compatible = "qcom,pm-8x60";
		reg = <0xfe800664 0x40>;
		qcom,pc-mode = "tz_l2_int";
		qcom,use-sync-timer;
	};
